| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v9_4_3.c | 1569 /* reset read and write pointers, similar to CP_RB0_WPTR/_RPTR */ in gfx_v9_4_3_xcc_mqd_init()
1690 /* reset read and write pointers, similar to CP_RB0_WPTR/_RPTR */ in gfx_v9_4_3_xcc_kiq_init_register()
1760 /* GPU could be in bad state during probe, driver trigger the reset in gfx_v9_4_3_xcc_kiq_init_queue()
1767 /* for GPU_RESET case , reset MQD to a clean status */ in gfx_v9_4_3_xcc_kiq_init_queue()
1771 /* reset ring buffer */ in gfx_v9_4_3_xcc_kiq_init_queue()
1828 /* reset ring buffer */ in gfx_v9_4_3_xcc_kcq_init_queue()
2357 /* reset CGCG/CGLS bits */ in gfx_v9_4_3_xcc_update_coarse_grain_clock_gating()
2411 .reset = gfx_v9_4_3_rlc_reset,
|
| H A D | gfx_v10_0.c | 6423 /* reset read and write pointers, similar to CP_RB0_WPTR/_RPTR */ in gfx_v10_0_gfx_mqd_init()
6460 /* reset the ring */ in gfx_v10_0_gfx_init_queue()
6590 /* reset read and write pointers, similar to CP_RB0_WPTR/_RPTR */ in gfx_v10_0_compute_mqd_init()
6701 /* reset read and write pointers, similar to CP_RB0_WPTR/_RPTR */ in gfx_v10_0_kiq_init_register()
6731 /* reset MQD to a clean status */ in gfx_v10_0_kiq_init_queue()
6735 /* reset ring buffer */ in gfx_v10_0_kiq_init_queue()
6782 /* reset ring buffer */ in gfx_v10_0_kcq_init_queue()
7702 /* reset CGCG/CGLS bits */ in gfx_v10_0_update_coarse_grain_clock_gating()
7739 /* reset FGCG bits */ in gfx_v10_0_update_fine_grain_clock_gating()
7746 /* reset RL in gfx_v10_0_update_fine_grain_clock_gating()
[all...] |
| H A D | gfx_v9_0.c | 3347 /* reset read and write pointers, similar to CP_RB0_WPTR/_RPTR */ in gfx_v9_0_mqd_init()
3468 /* reset read and write pointers, similar to CP_RB0_WPTR/_RPTR */ in gfx_v9_0_kiq_init_register()
3537 /* GPU could be in bad state during probe, driver trigger the reset in gfx_v9_0_kiq_init_queue()
3544 /* for GPU_RESET case , reset MQD to a clean status */ in gfx_v9_0_kiq_init_queue()
3548 /* reset ring buffer */ in gfx_v9_0_kiq_init_queue()
3606 /* reset ring buffer */ in gfx_v9_0_kcq_init_queue()
3811 /* Skip stopping RLC with A+A reset or when RLC controls GFX clock */ in gfx_v9_0_hw_fini()
3956 /* don't wait anymore for gpu reset case because this way may in gfx_v9_0_kiq_read_clock()
4847 /* reset CGCG/CGLS bits */ in gfx_v9_0_update_coarse_grain_clock_gating()
4950 .reset
[all...] |
| H A D | gfx_v11_0.c | 2217 * Program CP_ME_CNTL to reset given PIPE to take in gfx_v11_0_config_pfp_cache_rs64()
2229 /* Clear pfp pipe0 reset bit. */ in gfx_v11_0_config_pfp_cache_rs64()
2340 * Program CP_ME_CNTL to reset given PIPE to take in gfx_v11_0_config_me_cache_rs64()
2352 /* Clear pfp pipe0 reset bit. */ in gfx_v11_0_config_me_cache_rs64()
2503 /* reset pfp pipe */ in gfx_v11_0_config_gfx_rs64()
2509 /* clear pfp pipe reset */ in gfx_v11_0_config_gfx_rs64()
2525 /* reset me pipe */ in gfx_v11_0_config_gfx_rs64()
2531 /* clear me pipe reset */ in gfx_v11_0_config_gfx_rs64()
2547 /* reset mec pipe */ in gfx_v11_0_config_gfx_rs64()
2555 /* clear mec pipe reset */ in gfx_v11_0_config_gfx_rs64()
[all...] |
| /kernel/linux/linux-6.6/drivers/net/wireless/broadcom/brcm80211/brcmfmac/ |
| H A D | sdio.c | 151 /* Force SD->SB reset mapping (rev 11) */
155 /* Force backplane reset */
157 /* Force no backplane reset */
1450 /* no need to check the reset for subframe */ in brcmf_sdio_hdparse()
2827 /* reset bus_flags in packet cb */ in brcmf_sdio_bus_txdata()
3412 /* Take arm out of reset */ in brcmf_sdio_download_firmware()
3414 brcmf_err("error getting out of ARM core reset\n"); in brcmf_sdio_download_firmware()
3900 /* Write reset vector to address 0 */ in brcmf_sdio_buscore_activate()
4044 /* Set card control so an SDIO card reset does a WLAN backplane reset */ in brcmf_sdio_probe_attach()
[all...] |
| /kernel/linux/linux-6.6/drivers/net/wireless/realtek/rtw89/ |
| H A D | pci.c | 2556 rtw89_warn(rtwdev, "reset bdram busy\n"); in rtw89_pci_ops_mac_pre_init()
3799 .reset = rtw89_pci_ops_reset,
|
| /kernel/linux/linux-6.6/drivers/phy/cadence/ |
| H A D | phy-cadence-torrent.c | 22 #include <linux/reset.h>
808 /* Set reset register values to disable SSC */ in cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz()
929 /* Set reset register values to disable SSC */ in cdns_torrent_dp_pma_cmn_vco_cfg_25mhz()
1462 /* reset the link by asserting master lane phy_l0*_reset_n low */ in cdns_torrent_dp_set_lanes()
1467 * Assert lane reset on unused lanes and master lane so they remain in reset in cdns_torrent_dp_set_lanes()
1489 /* Wait, until PHY gets ready after releasing PHY reset signal. */ in cdns_torrent_dp_set_lanes()
1631 /* Take the PHY lane group out of reset */ in cdns_torrent_phy_on()
1634 /* Take the PHY out of reset */ in cdns_torrent_phy_on()
1732 /* take out of reset */ in cdns_torrent_dp_common_init()
[all...] |
| /kernel/linux/linux-6.6/drivers/phy/qualcomm/ |
| H A D | phy-qcom-qmp-pcie.c | 22 #include <linux/reset.h>
3184 dev_err(qmp->dev, "reset assert failed\n"); in qmp_pcie_init()
3190 dev_err(qmp->dev, "no-csr reset assert failed\n"); in qmp_pcie_init()
3198 dev_err(qmp->dev, "reset deassert failed\n"); in qmp_pcie_init()
3257 dev_err(qmp->dev, "no-csr reset deassert failed\n"); in qmp_pcie_power_on()
3261 /* Pull PHY out of reset state */ in qmp_pcie_power_on()
3294 /* PHY reset */ in qmp_pcie_power_off()
3398 "failed to get no-csr reset\n"); in qmp_pcie_reset_init()
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/ |
| H A D | intel_ddi.c | 3302 "[CONNECTOR:%d:%s] Failed to reset sink scrambling/TMDS bit clock ratio\n", in intel_disable_ddi_hdmi()
4243 .reset = intel_ddi_encoder_reset,
|
| /kernel/linux/linux-5.10/kernel/events/ |
| H A D | core.c | 3337 * rotate_necessary, is will be reset by in ctx_sched_out()
5487 u64 perf_event_pause(struct perf_event *event, bool reset) in perf_event_pause() argument
5496 if (reset) in perf_event_pause()
|
| /kernel/linux/linux-6.6/kernel/events/ |
| H A D | core.c | 3271 * rotate_necessary, is will be reset by in __pmu_ctx_sched_out()
5711 u64 perf_event_pause(struct perf_event *event, bool reset) in perf_event_pause() argument
5720 if (reset) in perf_event_pause()
|
| /kernel/linux/linux-6.6/drivers/accel/habanalabs/gaudi2/ |
| H A D | gaudi2.c | 2859 /* No point of asking this information again when not doing hard reset, as the device in gaudi2_cpucp_info_get()
2860 * CPU hasn't been reset in gaudi2_cpucp_info_get()
2994 dev_dbg(hdev->dev, "H/W state is dirty, must reset before initializing\n"); in gaudi2_early_init()
2997 dev_err(hdev->dev, "failed to reset HW in dirty state (%d)\n", rc); in gaudi2_early_init()
4346 * before apply core reset. in gaudi2_stop_dcore_dec()
4386 * before apply core reset. in gaudi2_stop_pcie_dec()
4687 * in case of soft reset do a manual flush for QMANs (currently called in gaudi2_halt_engines()
5530 /* Need to manually reset the status to 0 */ in gaudi2_mmu_invalidate_cache_status_poll()
5945 * we need to reset the chip before doing H/W init. This register is in gaudi2_hw_init()
5946 * cleared by the H/W upon H/W reset in gaudi2_hw_init()
[all...] |
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v10_0.c | 6200 /* reset read and write pointers, similar to CP_RB0_WPTR/_RPTR */ in gfx_v10_0_gfx_mqd_init()
6278 /* reset mqd with the backup copy */ in gfx_v10_0_gfx_init_queue()
6281 /* reset the ring */ in gfx_v10_0_gfx_init_queue()
6485 /* reset read and write pointers, similar to CP_RB0_WPTR/_RPTR */ in gfx_v10_0_compute_mqd_init()
6601 /* reset read and write pointers, similar to CP_RB0_WPTR/_RPTR */ in gfx_v10_0_kiq_init_register()
6632 /* reset MQD to a clean status */ in gfx_v10_0_kiq_init_queue()
6636 /* reset ring buffer */ in gfx_v10_0_kiq_init_queue()
6678 /* reset MQD to a clean status */ in gfx_v10_0_kcq_init_queue()
6682 /* reset ring buffer */ in gfx_v10_0_kcq_init_queue()
7488 /* reset CGC in gfx_v10_0_update_coarse_grain_clock_gating()
[all...] |
| H A D | gfx_v9_0.c | 3535 /* reset read and write pointers, similar to CP_RB0_WPTR/_RPTR */ in gfx_v9_0_mqd_init()
3656 /* reset read and write pointers, similar to CP_RB0_WPTR/_RPTR */ in gfx_v9_0_kiq_init_register()
3726 /* reset MQD to a clean status */ in gfx_v9_0_kiq_init_queue()
3730 /* reset ring buffer */ in gfx_v9_0_kiq_init_queue()
3776 /* reset MQD to a clean status */ in gfx_v9_0_kcq_init_queue()
3780 /* reset ring buffer */ in gfx_v9_0_kcq_init_queue()
4122 /* don't wait anymore for gpu reset case because this way may in gfx_v9_0_kiq_read_clock()
4997 /* reset CGCG/CGLS bits */ in gfx_v9_0_update_coarse_grain_clock_gating()
5090 .reset = gfx_v9_0_rlc_reset,
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/broadcom/bnx2x/ |
| H A D | bnx2x_link.c | 578 * reset value or init tool in bnx2x_ets_e3b0_nig_disabled()
697 * TODO_ETS - Should be done by reset value or init tool in bnx2x_ets_e3b0_pbf_disabled()
706 /* TODO_ETS - Should be done by reset value or init tool */ in bnx2x_ets_e3b0_pbf_disabled()
1470 /* reset and unreset the emac core */ in bnx2x_emac_init()
1484 /* self clear reset */ in bnx2x_emac_init()
1491 DP(NETIF_MSG_LINK, "EMAC reset reg is %u\n", val); in bnx2x_emac_init()
1608 /* Set MAC address for source TX Pause/PFC frames (under SW reset) */ in bnx2x_umac_enable()
1650 * already out of reset, it means the mode has already been set, in bnx2x_xmac_init()
1651 * and it must not* reset the XMAC again, since it controls both in bnx2x_xmac_init()
1662 "XMAC already out of reset i in bnx2x_xmac_init()
4274 bnx2x_warpcore_reset_lane(struct bnx2x *bp, struct bnx2x_phy *phy, u8 reset) bnx2x_warpcore_reset_lane() argument
[all...] |
| /kernel/linux/linux-6.6/drivers/net/ethernet/broadcom/bnx2x/ |
| H A D | bnx2x_link.c | 578 * reset value or init tool in bnx2x_ets_e3b0_nig_disabled()
697 * TODO_ETS - Should be done by reset value or init tool in bnx2x_ets_e3b0_pbf_disabled()
706 /* TODO_ETS - Should be done by reset value or init tool */ in bnx2x_ets_e3b0_pbf_disabled()
1470 /* reset and unreset the emac core */ in bnx2x_emac_init()
1484 /* self clear reset */ in bnx2x_emac_init()
1491 DP(NETIF_MSG_LINK, "EMAC reset reg is %u\n", val); in bnx2x_emac_init()
1608 /* Set MAC address for source TX Pause/PFC frames (under SW reset) */ in bnx2x_umac_enable()
1650 * already out of reset, it means the mode has already been set, in bnx2x_xmac_init()
1651 * and it must not* reset the XMAC again, since it controls both in bnx2x_xmac_init()
1662 "XMAC already out of reset i in bnx2x_xmac_init()
4274 bnx2x_warpcore_reset_lane(struct bnx2x *bp, struct bnx2x_phy *phy, u8 reset) bnx2x_warpcore_reset_lane() argument
[all...] |
| /kernel/linux/linux-5.10/drivers/media/i2c/cx25840/ |
| H A D | cx25840-core.c | 574 *reset configuration is described on page 3-77 in cx25836_initialize()
795 /* DIF in reset? */ in cx23885_initialize()
1043 /* DIF in reset? */ in cx231xx_initialize()
2318 * Alternatively, you can call the reset operation instead of this one.
5727 .reset = cx25840_reset,
5870 "A method to reset it from the cx25840 driver software is not known at this time\n"); in cx25840_probe()
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/ |
| H A D | intel_dp.c | 3201 /* ILK workaround: disable reset around power sequence */ in edp_panel_on()
3218 pp |= PANEL_POWER_RESET; /* restore panel reset bit */ in edp_panel_on()
3781 /* Assert data lane reset */ in chv_post_disable_dp()
6819 .reset = intel_dp_encoder_reset,
|
| /kernel/linux/linux-6.6/drivers/net/ethernet/hisilicon/hns3/ |
| H A D | hns3_enet.c | 844 * during reset process, because driver may not be able in hns3_nic_net_down()
1194 /* reset l3&l4 pointers from outer to inner headers */ in hns3_set_tso()
2891 /* request the reset, and let the hclge to determine in hns3_nic_net_timeout()
2892 * which reset level should be done in hns3_nic_net_timeout()
3093 * and a hardware reset occur.
3255 /* request the reset */ in hns3_slot_reset()
3262 dev_info(dev, "requesting reset due to PCI error\n"); in hns3_slot_reset()
5427 static void hns3_client_uninit(struct hnae3_handle *handle, bool reset) in hns3_client_uninit() argument
5601 * function is called in reset flow, so we reuse all desc. in hns3_nic_reset_all_ring()
5885 * during reset proces in hns3_external_lb_prepare()
[all...] |
| /kernel/linux/linux-6.6/drivers/net/ethernet/stmicro/stmmac/ |
| H A D | stmmac_main.c | 48 #include <linux/reset.h>
2957 dev_err(priv->device, "Failed to reset the dma\n"); in stmmac_init_dma_engine()
3313 * dma engine is reset, the core registers are configured (e.g. AXI,
3329 /* DMA initialization and SW reset */ in stmmac_hw_setup()
4520 * segment is reset and the timer re-started to clean the tx status. in stmmac_xmit()
5672 * netdev structure and arrange for the device to be reset to a sane state
6773 * watchdogs during reset in stmmac_xdp_release()
7416 /* Some reset controllers have only reset callback instead of in stmmac_dvr_probe()
7425 dev_err(priv->device, "unable to bring out of ahb reset in stmmac_dvr_probe()
[all...] |
| /kernel/linux/linux-6.6/drivers/media/i2c/cx25840/ |
| H A D | cx25840-core.c | 574 *reset configuration is described on page 3-77 in cx25836_initialize()
795 /* DIF in reset? */ in cx23885_initialize()
1043 /* DIF in reset? */ in cx231xx_initialize()
2318 * Alternatively, you can call the reset operation instead of this one.
5727 .reset = cx25840_reset,
5869 "A method to reset it from the cx25840 driver software is not known at this time\n"); in cx25840_probe()
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/intel/ixgbe/ |
| H A D | ixgbe_main.c | 1050 /* reset the countdown */ in ixgbe_check_tx_hang()
1057 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1063 /* Do the reset outside of interrupt context */ in ixgbe_tx_timeout_reset()
1066 e_warn(drv, "initiating reset due to tx timeout\n"); in ixgbe_tx_timeout_reset()
1214 /* schedule immediate reset if we believe we hung */ in ixgbe_clean_tx_irq()
1239 /* schedule immediate reset if we believe we hung */ in ixgbe_clean_tx_irq()
1242 /* the adapter is about to reset, no point in enabling stuff */ in ixgbe_clean_tx_irq()
2719 /* must write high and low 16 bits to reset counter */ in ixgbe_write_eitr()
3088 e_info(link, "Received ECC Err, initiating reset\n"); in ixgbe_msix_other()
3326 e_info(link, "Received ECC Err, initiating reset\ in ixgbe_intr()
[all...] |
| /kernel/linux/linux-6.6/drivers/net/ethernet/intel/ixgbe/ |
| H A D | ixgbe_main.c | 1054 /* reset the countdown */ in ixgbe_check_tx_hang()
1061 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1067 /* Do the reset outside of interrupt context */ in ixgbe_tx_timeout_reset()
1070 e_warn(drv, "initiating reset due to tx timeout\n"); in ixgbe_tx_timeout_reset()
1219 /* schedule immediate reset if we believe we hung */ in ixgbe_clean_tx_irq()
1244 /* schedule immediate reset if we believe we hung */ in ixgbe_clean_tx_irq()
1247 /* the adapter is about to reset, no point in enabling stuff */ in ixgbe_clean_tx_irq()
2709 /* must write high and low 16 bits to reset counter */ in ixgbe_write_eitr()
3078 e_info(link, "Received ECC Err, initiating reset\n"); in ixgbe_msix_other()
3316 e_info(link, "Received ECC Err, initiating reset\ in ixgbe_intr()
[all...] |