/kernel/linux/linux-5.10/drivers/input/touchscreen/ |
H A D | ad7877.c | 143 u16 reset; member 274 req->reset = AD7877_WRITEADD(AD7877_REG_CTRL1) | AD7877_MODE_NOC; in ad7877_read_adc() 278 req->xfer[0].tx_buf = &req->reset; in ad7877_read_adc()
|
/kernel/linux/linux-5.10/drivers/gpu/drm/meson/ |
H A D | meson_crtc.c | 77 .reset = drm_atomic_helper_crtc_reset, 342 priv->afbcd.ops->reset(priv); in meson_crtc_irq() 382 priv->afbcd.ops->reset(priv); in meson_crtc_irq()
|
/kernel/linux/linux-5.10/drivers/mmc/host/ |
H A D | sdhci-acpi.c | 224 .reset = sdhci_reset, 231 .reset = sdhci_reset, 543 /* AMD sdhci reset dll register. */ 643 .reset = amd_sdhci_reset,
|
H A D | sdhci-pci-gli.c | 181 /* reset the tuning flow after reinit and before starting tuning */ in gli_set_9750() 810 .reset = sdhci_reset, 830 .reset = sdhci_gl9750_reset, 850 .reset = sdhci_gl9763e_reset,
|
/kernel/linux/linux-5.10/drivers/misc/ |
H A D | hpilo.c | 221 fifo_q->reset = 0; in fifo_setup() 375 /* check for this particular channel needing a reset */ in is_channel_reset() 376 return FIFOBARTOHANDLE(ccb->ccb_u1.send_fifobar)->reset; in is_channel_reset() 381 /* set a flag indicating this channel needs a reset */ in set_channel_reset() 382 FIFOBARTOHANDLE(ccb->ccb_u1.send_fifobar)->reset = 1; in set_channel_reset() 397 /* check for global reset condition */ in is_device_reset() 408 /* clear the device (reset bits, pending channel entries) */ in clear_device() 428 * Mapped memory is zeroed on ilo reset, so set a per ccb flag in ilo_set_reset() 449 * If the device has been reset, applications in ilo_read() 665 /* wake up all ccbs if the device was reset */ in ilo_isr() [all...] |
/kernel/linux/linux-5.10/drivers/net/ethernet/seeq/ |
H A D | sgiseeq.c | 131 hregs->reset = HPC3_ERST_CRESET | HPC3_ERST_CLRIRQ; in hpc3_eth_reset() 133 hregs->reset = 0; in hpc3_eth_reset() 515 hregs->reset = HPC3_ERST_CLRIRQ; in sgiseeq_interrupt()
|
/kernel/linux/linux-5.10/drivers/usb/dwc2/ |
H A D | core.c | 351 /* Deassert reset core */ in dwc2_hib_restore_common() 477 * @reset: Enabled in case of restore with reset. 483 int reset, int is_host) in dwc2_exit_hibernation() 486 return dwc2_host_exit_hibernation(hsotg, rem_wakeup, reset); in dwc2_exit_hibernation() 488 return dwc2_gadget_exit_hibernation(hsotg, rem_wakeup, reset); in dwc2_exit_hibernation() 492 * Do core a soft reset of the core. Be careful with this because it 504 * bit being set (which persists after core reset) or the in dwc2_core_reset() 505 * connector id pin, a core soft reset will temporarily reset in dwc2_core_reset() 482 dwc2_exit_hibernation(struct dwc2_hsotg *hsotg, int rem_wakeup, int reset, int is_host) dwc2_exit_hibernation() argument [all...] |
/kernel/linux/linux-5.10/drivers/usb/musb/ |
H A D | musb_dsps.c | 60 unsigned reset:5; member 470 musb_writel(reg_base, wrp->control, (1 << wrp->reset)); in dsps_musb_init() 474 /* reset the otgdisable bit, needed for host mode to work */ in dsps_musb_init() 570 babble_ctl & MUSB_BABBLE_STUCK_J ? "set" : "reset"); in dsps_sw_babble_control() 941 .reset = 0,
|
/kernel/linux/linux-5.10/sound/soc/sof/intel/ |
H A D | byt.c | 349 /* put DSP into reset, set reset vector and stall */ in byt_reset() 358 /* take DSP out of reset and keep stalled for FW loading */ in byt_reset() 589 /* DSP core boot / reset */ 591 .reset = byt_reset, 668 /* Put DSP into reset, set reset vector */ in byt_reset_dsp_disable_int() 830 /* DSP core boot / reset */ 832 .reset = byt_reset, 909 /* DSP core boot / reset */ [all...] |
/kernel/linux/linux-5.10/kernel/sched/rtg/ |
H A D | rtg_ctrl.c | 402 pr_debug("[SCHED_RTG]: Frame state is already reset\n"); in reset_frame() 543 static void clear_rtg_frame_thread(struct frame_info *frame_info, bool reset) in clear_rtg_frame_thread() argument 548 if (!reset && frame_info) in clear_rtg_frame_thread() 556 if (reset) { in clear_rtg_frame_thread()
|
/kernel/linux/linux-5.10/net/dccp/ |
H A D | ipv4.c | 520 /* Never send a reset in response to a reset. */ in dccp_v4_ctl_send_reset() 587 return 0; /* discard, don't send a reset here */ in dccp_v4_conn_request() 660 goto reset; in dccp_v4_do_rcv() 689 goto reset; in dccp_v4_do_rcv() 692 reset: in dccp_v4_do_rcv()
|
/kernel/linux/linux-5.10/net/mptcp/ |
H A D | options.c | 664 /* prevent adding of any MPTCP related options on reset packet in mptcp_established_options() 752 goto reset; in check_fully_established() 766 * then fallback to TCP. Fallback scenarios requires a reset for in check_fully_established() 771 goto reset; in check_fully_established() 795 reset: in check_fully_established()
|
/kernel/linux/linux-5.10/drivers/gpu/drm/v3d/ |
H A D | v3d_gem.c | 10 #include <linux/reset.h> 86 * of the unit, so reset it to its power-on value here. in v3d_reset_by_bridge() 101 if (v3d->reset) in v3d_reset_v3d() 102 reset_control_reset(v3d->reset); in v3d_reset_v3d() 119 /* XXX: only needed for safe powerdown, not reset. */ in v3d_reset()
|
/kernel/linux/linux-5.10/drivers/gpu/drm/tilcdc/ |
H A D | tilcdc_crtc.c | 179 static void reset(struct drm_crtc *crtc) in reset() function 458 reset(crtc); in tilcdc_crtc_enable() 729 .reset = tilcdc_crtc_reset,
|
/kernel/linux/linux-6.6/drivers/mmc/host/ |
H A D | sdhci-acpi.c | 223 .reset = sdhci_reset, 230 .reset = sdhci_reset, 468 /* AMD sdhci reset dll register. */ 599 .reset = amd_sdhci_reset,
|
H A D | sdhci_am654.c | 399 * Do a command and data reset to get rid of it in sdhci_am654_execute_tuning() 467 .reset = sdhci_and_cqhci_reset, 497 .reset = sdhci_and_cqhci_reset, 521 .reset = sdhci_am654_reset,
|
H A D | sdhci-sprd.c | 67 * 0 : hardware reset 164 * is defined as hardware reset on Spreadtrum's platform and clearing in sdhci_sprd_writeb() 453 .reset = sdhci_reset, 511 goto reset; in sdhci_sprd_voltage_switch() 540 reset: in sdhci_sprd_voltage_switch()
|
/kernel/linux/linux-6.6/drivers/misc/ |
H A D | hpilo.c | 223 fifo_q->reset = 0; in fifo_setup() 377 /* check for this particular channel needing a reset */ in is_channel_reset() 378 return FIFOBARTOHANDLE(ccb->ccb_u1.send_fifobar)->reset; in is_channel_reset() 383 /* set a flag indicating this channel needs a reset */ in set_channel_reset() 384 FIFOBARTOHANDLE(ccb->ccb_u1.send_fifobar)->reset = 1; in set_channel_reset() 404 /* clear the device (reset bits, pending channel entries) */ in clear_device() 424 * Mapped memory is zeroed on ilo reset, so set a per ccb flag in ilo_set_reset() 445 * If the device has been reset, applications in ilo_read() 661 /* wake up all ccbs if the device was reset */ in ilo_isr()
|
/kernel/linux/linux-6.6/drivers/media/dvb-frontends/ |
H A D | dib0070.c | 131 if (state->cfg->reset) { \ 132 state->cfg->reset(state->fe,1); msleep(10); \ 133 state->cfg->reset(state->fe,0); msleep(10); \
|
/kernel/linux/linux-6.6/drivers/media/i2c/ |
H A D | msp3400-driver.c | 102 /* reset and read revision code */ in msp_reset() 107 struct i2c_msg reset[2] = { in msp_reset() local 136 if (i2c_transfer(client->adapter, &reset[0], 1) != 1 || in msp_reset() 137 i2c_transfer(client->adapter, &reset[1], 1) != 1 || in msp_reset() 139 dev_err(&client->dev, "chip reset failed\n"); in msp_reset() 236 * 0 0 0 - SCART 1 to DSP input (reset position) 242 * 0 0 0 - undefined (reset position) 251 * 0 0 0 - SCART 1 DA to SCART 2 Output (reset position) 716 /* These are the reset input/output positions */ in msp_probe()
|
/kernel/linux/linux-6.6/drivers/net/ethernet/seeq/ |
H A D | sgiseeq.c | 131 hregs->reset = HPC3_ERST_CRESET | HPC3_ERST_CLRIRQ; in hpc3_eth_reset() 133 hregs->reset = 0; in hpc3_eth_reset() 515 hregs->reset = HPC3_ERST_CLRIRQ; in sgiseeq_interrupt()
|
/kernel/linux/linux-6.6/drivers/usb/dwc2/ |
H A D | core.c | 246 /* Deassert reset core */ in dwc2_hib_restore_common() 375 * @reset: Enabled in case of restore with reset. 381 int reset, int is_host) in dwc2_exit_hibernation() 384 return dwc2_host_exit_hibernation(hsotg, rem_wakeup, reset); in dwc2_exit_hibernation() 386 return dwc2_gadget_exit_hibernation(hsotg, rem_wakeup, reset); in dwc2_exit_hibernation() 390 * Do core a soft reset of the core. Be careful with this because it 402 * bit being set (which persists after core reset) or the in dwc2_core_reset() 403 * connector id pin, a core soft reset will temporarily reset in dwc2_core_reset() 380 dwc2_exit_hibernation(struct dwc2_hsotg *hsotg, int rem_wakeup, int reset, int is_host) dwc2_exit_hibernation() argument [all...] |
/kernel/linux/linux-6.6/drivers/usb/musb/ |
H A D | musb_dsps.c | 59 unsigned reset:5; member 469 musb_writel(reg_base, wrp->control, (1 << wrp->reset)); in dsps_musb_init() 473 /* reset the otgdisable bit, needed for host mode to work */ in dsps_musb_init() 569 babble_ctl & MUSB_BABBLE_STUCK_J ? "set" : "reset"); in dsps_sw_babble_control() 940 .reset = 0,
|
/kernel/linux/linux-6.6/drivers/net/ethernet/intel/ixgbe/ |
H A D | ixgbe_82598.c | 119 phy->ops.reset = &ixgbe_reset_phy_nl; in ixgbe_init_phy_ops_82598() 643 * ixgbe_reset_hw_82598 - Performs hardware reset 647 * clears all interrupts, performing a PHY reset, and performing a link (MAC) 648 * reset. 668 * they are not automatically restored on reset. in ixgbe_reset_hw_82598() 700 /* PHY ops must be identified and initialized prior to reset */ in ixgbe_reset_hw_82598() 709 hw->phy.ops.reset(hw); in ixgbe_reset_hw_82598() 714 * Issue global reset to the MAC. This needs to be a SW reset. in ixgbe_reset_hw_82598() 715 * If link reset i in ixgbe_reset_hw_82598() [all...] |
/kernel/linux/linux-6.6/drivers/gpu/drm/meson/ |
H A D | meson_crtc.c | 77 .reset = drm_atomic_helper_crtc_reset, 342 priv->afbcd.ops->reset(priv); in meson_crtc_irq() 382 priv->afbcd.ops->reset(priv); in meson_crtc_irq()
|