Home
last modified time | relevance | path

Searched refs:reset (Results 2801 - 2825 of 6992) sorted by relevance

1...<<111112113114115116117118119120>>...280

/kernel/linux/linux-6.6/drivers/gpu/drm/i915/gt/
H A Dselftest_hangcheck.c358 /* Check that we can reset during non-user portions of requests */ in igt_reset_nop()
431 /* Check that we can engine-reset during non-user portions */ in igt_reset_nop_engine()
445 * more. Thus a nop batch cannot be used as a reset test in igt_reset_nop_engine()
462 &gt->reset.flags)); in igt_reset_nop_engine()
467 pr_err("%s failed to idle before reset\n", in igt_reset_nop_engine()
506 pr_err("Full GPU reset recorded! (engine reset expected)\n"); in igt_reset_nop_engine()
513 pr_err("%s engine reset not recorded!\n", in igt_reset_nop_engine()
519 clear_and_wake_up_bit(I915_RESET_ENGINE + id, &gt->reset.flags); in igt_reset_nop_engine()
551 /* Check that we can recover from engine-reset failue in igt_reset_fail_engine()
[all...]
H A Dintel_ring_submission.c39 * lost interrupts following a reset. in set_hwstam()
185 /* Then reset the disabled ring */ in stop_ring()
300 * reset the value in the HWSP. in xcs_sanitize()
313 * We stop engines, otherwise we might get failed reset and a in reset_prepare()
316 * the reset is issued, regardless of READY_TO_RESET ack. in reset_prepare()
318 * where we have a gpu reset. in reset_prepare()
331 /* G45 ring initialization often fails to reset head to zero */ in reset_prepare()
333 "HEAD not reset to zero, " in reset_prepare()
650 .reset = ring_context_reset,
1131 engine->reset in setup_common()
[all...]
/third_party/python/Lib/test/test_asyncio/
H A Dtest_locks.py1105 # and reset
1106 await barrier.reset()
1328 asyncio.create_task(barrier.reset())
1345 await barrier.reset()
1351 # reset the barrier
1376 await barrier.reset()
1405 # reset now: raise asyncio.BrokenBarrierError for waiting tasks
1406 await barrier.reset()
1445 # reset barrier, N-1 waiting tasks raise an BrokenBarrierError
1446 asyncio.create_task(barrier.reset())
[all...]
/third_party/vk-gl-cts/external/vulkancts/modules/vulkan/util/
H A DvktExternalMemoryUtil.cpp211 reset(); in ~NativeHandle()
214 void NativeHandle::reset (void) in reset() function in vkt::ExternalMemoryUtil::NativeHandle
284 reset(); in operator =()
293 reset(); in operator =()
302 reset(); in operator =()
309 reset(); in setWin32Handle()
317 reset(); in setZirconHandle()
324 reset(); in setHostPtr()
/third_party/skia/src/gpu/v1/
H A DClipStack.cpp447 fShape.reset();
536 fShape.reset(); in simplify()
590 fShape.reset(); in simplify()
629 this->fShape.reset(); in combine()
656 fShape.reset(); in combine()
773 fKey.reset(); in invalidate()
872 void ClipStack::SaveRecord::reset(const SkIRect& bounds) { in reset() function in skgpu::v1::ClipStack::SaveRecord
1539 save.reset(fDeviceBounds); in replaceClip()
/third_party/skia/src/pdf/
H A DSkPDFDevice.cpp320 void SkPDFDevice::reset() { in reset() function in SkPDFDevice
321 fGraphicStateResources.reset(); in reset()
322 fXObjectResources.reset(); in reset()
323 fShaderResources.reset(); in reset()
324 fFontResources.reset(); in reset()
325 fContent.reset(); in reset()
1095 inverseTransform.reset(); in makeFormXObjectFromDevice()
1108 this->reset(); in makeFormXObjectFromDevice()
/third_party/skia/src/utils/
H A DSkPolyUtils.cpp438 insetPolygon->reset(); in SkInsetConvexPolygon()
1397 offsetPolygon->reset(); in SkOffsetSimplePolygon()
1519 fGrid[i].reset(); in init()
1757 void reset() { in reset() function
1785 ConvexTracker() { this->reset(); } in ConvexTracker()
1787 void reset() { in reset() function
1789 fDSign.reset(); in reset()
1790 fCSign.reset(); in reset()
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/unittest/AssemblerX8632/
H A DLowLevel.cpp121 reset(); \ in TEST_F()
134 reset(); \ in TEST_F()
148 reset(); \ in TEST_F()
163 reset(); \ in TEST_F()
179 reset(); \ in TEST_F()
196 reset(); \ in TEST_F()
214 reset(); \ in TEST_F()
232 reset(); \ in TEST_F()
/third_party/vk-gl-cts/modules/egl/
H A DteglRobustnessTests.cpp1187 << "Check the reset notification strategy returned by glGetIntegerv() equals GL_NO_RESET_NOTIFICATION\n\n" in iterate()
1215 glw::GLint reset = 0; in iterate() local
1216 gl.getIntegerv(GL_RESET_NOTIFICATION_STRATEGY, &reset); in iterate()
1219 if (reset != GL_NO_RESET_NOTIFICATION) in iterate()
1222 << "Test failed! glGetIntegerv() returned wrong value. [" << glu::getErrorStr(reset) << ", expected " << glu::getErrorStr(GL_NO_RESET_NOTIFICATION) << "]" in iterate()
1247 << "Check the reset notification strategy returned by glGetIntegerv() equals GL_LOSE_CONTEXT_ON_RESET\n\n" in iterate()
1270 glw::GLint reset = 0; in iterate() local
1271 gl.getIntegerv(GL_RESET_NOTIFICATION_STRATEGY, &reset); in iterate()
1274 if (reset != GL_LOSE_CONTEXT_ON_RESET) in iterate()
1277 << "Test failed! glGetIntegerv() returned wrong value. [" << reset << ", expecte in iterate()
[all...]
/kernel/linux/linux-5.10/arch/mips/include/asm/octeon/
H A Dcvmx-lmcx-defs.h491 uint64_t reset:1; member
507 uint64_t reset:1;
540 uint64_t reset:1; member
556 uint64_t reset:1;
583 uint64_t reset:1; member
599 uint64_t reset:1;
627 uint64_t reset:1; member
643 uint64_t reset:1;
1789 uint64_t reset:1; member
1815 uint64_t reset
[all...]
/kernel/linux/linux-6.6/arch/mips/include/asm/octeon/
H A Dcvmx-lmcx-defs.h491 uint64_t reset:1; member
507 uint64_t reset:1;
540 uint64_t reset:1; member
556 uint64_t reset:1;
583 uint64_t reset:1; member
599 uint64_t reset:1;
627 uint64_t reset:1; member
643 uint64_t reset:1;
1789 uint64_t reset:1; member
1815 uint64_t reset
[all...]
/kernel/linux/linux-6.6/arch/arm/mach-omap2/
H A Domap_hwmod.c29 * and reset signaling, supply power, and connect the modules to
36 * to reset, enable, idle, and disable these hardware blocks. And
82 * The OMAP hwmod code also will attempt to reset and idle all on-chip
96 * reset and the integration registers programmed, the INITIALIZED state
179 * Address offset (in bytes) between the reset control and the reset
208 * struct omap_hwmod_reset - IP specific reset functions
211 * @reset: IP specific reset function
218 int (*reset)(struc member
[all...]
/kernel/linux/linux-6.6/kernel/trace/
H A Dftrace.c48 /* Flags that do not get reset */
359 /* Always save the function, and reset at unregistering */ in __register_ftrace_function()
676 /* If the profile is already created, simply reset it */ in ftrace_profile_init_cpu()
3649 * If an lseek was done, then reset and start from beginning. in t_start()
3665 /* reset in case of seek/pread */ in t_start()
4460 int reset, int enable);
5262 int remove, int reset, int enable) in ftrace_set_hash()
5278 if (reset) in ftrace_set_hash()
5311 int remove, int reset, int enable) in ftrace_set_addr()
5313 return ftrace_set_hash(ops, NULL, 0, ips, cnt, remove, reset, enabl in ftrace_set_addr()
5260 ftrace_set_hash(struct ftrace_ops *ops, unsigned char *buf, int len, unsigned long *ips, unsigned int cnt, int remove, int reset, int enable) ftrace_set_hash() argument
5310 ftrace_set_addr(struct ftrace_ops *ops, unsigned long *ips, unsigned int cnt, int remove, int reset, int enable) ftrace_set_addr() argument
5640 ftrace_set_filter_ip(struct ftrace_ops *ops, unsigned long ip, int remove, int reset) ftrace_set_filter_ip() argument
5663 ftrace_set_filter_ips(struct ftrace_ops *ops, unsigned long *ips, unsigned int cnt, int remove, int reset) ftrace_set_filter_ips() argument
5689 ftrace_set_regex(struct ftrace_ops *ops, unsigned char *buf, int len, int reset, int enable) ftrace_set_regex() argument
5709 ftrace_set_filter(struct ftrace_ops *ops, unsigned char *buf, int len, int reset) ftrace_set_filter() argument
5732 ftrace_set_notrace(struct ftrace_ops *ops, unsigned char *buf, int len, int reset) ftrace_set_notrace() argument
5748 ftrace_set_global_filter(unsigned char *buf, int len, int reset) ftrace_set_global_filter() argument
5764 ftrace_set_global_notrace(unsigned char *buf, int len, int reset) ftrace_set_global_notrace() argument
[all...]
/third_party/skia/third_party/externals/angle2/src/libANGLE/renderer/d3d/d3d11/
H A DTextureStorage11.cpp511 mDropStencilTexture.reset(); in markLevelDirty()
700 mLevelSRVs[level].reset(); in clearSRVCache()
701 mLevelBlitSRVs[level].reset(); in clearSRVCache()
892 mMSTexInfo->msTex.reset(); in releaseMultisampledTexStorageForLevel()
1219 // This will reset mAssociatedImages[level] to nullptr too. in releaseAssociatedImage()
1401 mLevelZeroRenderTarget.reset(new TextureRenderTarget11( in getRenderTarget()
1422 mRenderTarget[level].reset(new TextureRenderTarget11( in getRenderTarget()
1442 mRenderTarget[level].reset(new TextureRenderTarget11( in getRenderTarget()
2357 // This will reset mAssociatedImages[level] to nullptr too. in releaseAssociatedImage()
2540 mLevelZeroRenderTarget[faceIndex].reset(ne in getRenderTarget()
[all...]
/third_party/skia/third_party/externals/angle2/src/libANGLE/renderer/vulkan/
H A Dvk_helpers.cpp1028 // Push a scope into the pool allocator so we can easily free and re-init on reset() in initialize()
1043 angle::Result CommandBufferHelper::reset(Context *context) in reset() function in rx::vk::CommandBufferHelper
1074 mColorImages.reset(); in reset()
1075 mColorResolveImages.reset(); in reset()
1426 mPipelineBarrierMask.reset(); in executeBarriers()
1905 return reset(context); in flushToPrimary()
2144 commandBuffer.reset(); in resetCommandBufferHelper()
2407 reset(); in release()
2415 mBuffer.reset(nullptr); in release()
2460 reset(); in destroy()
2526 void DynamicBuffer::reset() reset() function in rx::vk::DynamicBuffer
2591 void DynamicShadowBuffer::reset() reset() function in rx::vk::DynamicShadowBuffer
[all...]
/kernel/linux/linux-5.10/tools/testing/selftests/netfilter/
H A Dnft_concat_range.sh922 nft reset counter inet filter test >/dev/null 2>&1
1146 # Set MAC addresses, send single packet, check that it matches, reset counter
1169 nft reset counter inet filter test >/dev/null
1424 nft reset counter netdev perf test >/dev/null 2>&1
1434 nft reset counter netdev perf test >/dev/null 2>&1
1444 nft reset counter netdev perf test >/dev/null 2>&1
1454 nft reset counter netdev perf test >/dev/null 2>&1
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
H A Dintel_dpio_phy.c138 * @reset_delay: delay in us to wait before setting the common reset
332 "DDI PHY %d powered, but still in reset\n", phy); in bxt_ddi_phy_is_enabled()
746 bool reset) in chv_data_lane_soft_reset()
755 if (reset) in chv_data_lane_soft_reset()
763 if (reset) in chv_data_lane_soft_reset()
772 if (reset) in chv_data_lane_soft_reset()
781 if (reset) in chv_data_lane_soft_reset()
813 /* Assert data lane reset */ in chv_phy_pre_pll_enable()
883 /* allow hardware to manage TX FIFO reset source */ in chv_phy_pre_encoder_enable()
943 /* Deassert data lane reset */ in chv_phy_pre_encoder_enable()
744 chv_data_lane_soft_reset(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, bool reset) chv_data_lane_soft_reset() argument
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/
H A Dintel_ring_submission.c52 * lost interrupts following a reset. in set_hwstam()
234 /* G45 ring initialization often fails to reset head to zero */ in xcs_resume()
235 drm_dbg(&dev_priv->drm, "%s head not reset to zero " in xcs_resume()
331 * We stop engines, otherwise we might get failed reset and a in reset_prepare()
334 * the reset is issued, regardless of READY_TO_RESET ack. in reset_prepare()
336 * where we have a gpu reset. in reset_prepare()
618 .reset = ring_context_reset,
1073 engine->reset.prepare = reset_prepare; in setup_common()
1074 engine->reset.rewind = reset_rewind; in setup_common()
1075 engine->reset in setup_common()
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/sti/
H A Dsti_hdmi.c14 #include <linux/reset.h>
197 /* Sw reset and PLL lock are exclusive so we can use the same in hdmi_irq_thread()
293 * Helper to reset info frame
296 * @slot: infoframe to reset
549 * Software reset of the hdmi subsystem
560 /* Enable hdmi_audio clock only during hdmi reset */ in hdmi_swreset()
564 /* Sw reset */ in hdmi_swreset()
571 /* Wait reset completed */ in hdmi_swreset()
582 DRM_DEBUG_DRIVER("Warning: HDMI sw reset timeout occurs\n"); in hdmi_swreset()
923 /* Sw reset */ in sti_hdmi_pre_enable()
[all...]
/kernel/linux/linux-6.6/drivers/net/wireless/ath/ath11k/
H A Ddp_tx.c1178 int ath11k_dp_tx_htt_monitor_mode_ring_config(struct ath11k *ar, bool reset) in ath11k_dp_tx_htt_monitor_mode_ring_config() argument
1187 dp->mac_id, !reset); in ath11k_dp_tx_htt_monitor_mode_ring_config()
1196 if (!reset) { in ath11k_dp_tx_htt_monitor_mode_ring_config()
1219 } else if (!reset) { in ath11k_dp_tx_htt_monitor_mode_ring_config()
1236 if (!reset) { in ath11k_dp_tx_htt_monitor_mode_ring_config()
/kernel/linux/linux-6.6/drivers/net/ieee802154/
H A Dcc2520.c1038 struct gpio_desc *reset; in cc2520_probe() local
1095 reset = devm_gpiod_get(&spi->dev, "reset", GPIOD_OUT_LOW); in cc2520_probe()
1096 if (IS_ERR(reset)) { in cc2520_probe()
1097 dev_err(&spi->dev, "reset gpio is not valid\n"); in cc2520_probe()
1098 ret = PTR_ERR(reset); in cc2520_probe()
1112 gpiod_set_value(reset, HIGH); in cc2520_probe()
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/
H A Dintel_dpio_phy.c142 * @reset_delay: delay in us to wait before setting the common reset
344 "DDI PHY %d powered, but still in reset\n", phy); in bxt_ddi_phy_is_enabled()
782 bool reset) in chv_data_lane_soft_reset()
791 if (reset) in chv_data_lane_soft_reset()
799 if (reset) in chv_data_lane_soft_reset()
808 if (reset) in chv_data_lane_soft_reset()
817 if (reset) in chv_data_lane_soft_reset()
849 /* Assert data lane reset */ in chv_phy_pre_pll_enable()
919 /* allow hardware to manage TX FIFO reset source */ in chv_phy_pre_encoder_enable()
979 /* Deassert data lane reset */ in chv_phy_pre_encoder_enable()
780 chv_data_lane_soft_reset(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, bool reset) chv_data_lane_soft_reset() argument
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/
H A Ddrm_mipi_dbi.c462 * mipi_dbi_pipe_reset_plane - MIPI DBI plane-reset helper
521 .reset = drm_atomic_helper_connector_reset,
668 * mipi_dbi_hw_reset - Hardware reset of controller
671 * Reset controller if the &mipi_dbi->reset gpio is set.
675 if (!dbi->reset) in mipi_dbi_hw_reset()
678 gpiod_set_value_cansleep(dbi->reset, 0); in mipi_dbi_hw_reset()
680 gpiod_set_value_cansleep(dbi->reset, 1); in mipi_dbi_hw_reset()
706 /* The poweron/reset value is 08h DCS_POWER_MODE_DISPLAY_NORMAL_MODE */ in mipi_dbi_display_is_on()
747 DRM_DEV_ERROR(dev, "Failed to send reset command (%d)\n", ret); in mipi_dbi_poweron_reset_conditional()
756 * If we did a hw reset, w in mipi_dbi_poweron_reset_conditional()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/sti/
H A Dsti_hdmi.c15 #include <linux/reset.h>
204 /* Sw reset and PLL lock are exclusive so we can use the same in hdmi_irq_thread()
301 * Helper to reset info frame
304 * @slot: infoframe to reset
557 * Software reset of the hdmi subsystem
568 /* Enable hdmi_audio clock only during hdmi reset */ in hdmi_swreset()
572 /* Sw reset */ in hdmi_swreset()
579 /* Wait reset completed */ in hdmi_swreset()
590 DRM_DEBUG_DRIVER("Warning: HDMI sw reset timeout occurs\n"); in hdmi_swreset()
931 /* Sw reset */ in sti_hdmi_pre_enable()
[all...]
/kernel/linux/linux-6.6/net/netfilter/
H A Dnft_ct.c640 const struct nft_expr *expr, bool reset) in nft_ct_get_dump()
703 const struct nft_expr *expr, bool reset) in nft_ct_set_dump()
1003 struct nft_object *obj, bool reset) in nft_ct_timeout_obj_dump()
1178 struct nft_object *obj, bool reset) in nft_ct_helper_obj_dump()
1294 struct nft_object *obj, bool reset) in nft_ct_expect_obj_dump()
639 nft_ct_get_dump(struct sk_buff *skb, const struct nft_expr *expr, bool reset) nft_ct_get_dump() argument
702 nft_ct_set_dump(struct sk_buff *skb, const struct nft_expr *expr, bool reset) nft_ct_set_dump() argument
1002 nft_ct_timeout_obj_dump(struct sk_buff *skb, struct nft_object *obj, bool reset) nft_ct_timeout_obj_dump() argument
1177 nft_ct_helper_obj_dump(struct sk_buff *skb, struct nft_object *obj, bool reset) nft_ct_helper_obj_dump() argument
1293 nft_ct_expect_obj_dump(struct sk_buff *skb, struct nft_object *obj, bool reset) nft_ct_expect_obj_dump() argument

Completed in 100 milliseconds

1...<<111112113114115116117118119120>>...280