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Searched refs:reg (Results 601 - 625 of 1579) sorted by relevance

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/third_party/mesa3d/src/gallium/drivers/svga/
H A Dsvga_tgsi_vgpu10.c304 unsigned out_index; /**< the real position output reg */
305 unsigned tmp_index; /**< the fake/temp position output reg */
306 unsigned so_index; /**< the non-adjusted position output reg */
337 unsigned color_tmp_index; /**< fake/temp color output reg */
341 unsigned face_input_index; /**< real fragment shader face reg (bool) */
342 unsigned face_tmp_index; /**< temp face reg converted to -1 / +1 */
347 unsigned fragcoord_input_index; /**< real fragment position input reg */
348 unsigned fragcoord_tmp_index; /**< 1/w modified position temp reg */
353 unsigned sample_pos_tmp_index; /**< which temp reg has the sample pos */
464 /* For all shaders: const reg inde
1269 emit_dst_register(struct svga_shader_emitter_v10 *emit, const struct tgsi_full_dst_register *reg) emit_dst_register() argument
1551 emit_src_register(struct svga_shader_emitter_v10 *emit, const struct tgsi_full_src_register *reg) emit_src_register() argument
2337 struct tgsi_full_src_register reg; make_src_reg() local
2357 struct tgsi_full_src_register reg; make_src_scalar_reg() local
2409 struct tgsi_full_dst_register reg; make_dst_reg() local
2443 negate_src(const struct tgsi_full_src_register *reg) negate_src() argument
2454 absolute_src(const struct tgsi_full_src_register *reg) absolute_src() argument
2464 get_swizzle(const struct tgsi_full_src_register *reg, enum tgsi_swizzle term) get_swizzle() argument
2486 swizzle_src(const struct tgsi_full_src_register *reg, enum tgsi_swizzle swizzleX, enum tgsi_swizzle swizzleY, enum tgsi_swizzle swizzleZ, enum tgsi_swizzle swizzleW) swizzle_src() argument
2505 scalar_src(const struct tgsi_full_src_register *reg, enum tgsi_swizzle swizzle) scalar_src() argument
2522 writemask_dst(const struct tgsi_full_dst_register *reg, unsigned mask) writemask_dst() argument
2534 same_swizzle_terms(const struct tgsi_full_src_register *reg) same_swizzle_terms() argument
2622 struct tgsi_full_src_register reg; make_immediate_reg_4() local
2670 struct tgsi_full_src_register reg; make_immediate_reg() local
2751 struct tgsi_full_src_register reg; make_immediate_reg_double() local
5591 unsigned total_temps, reg, i; emit_temporaries_declaration() local
9280 check_double_src(struct svga_shader_emitter_v10 *emit, const struct tgsi_full_src_register *reg) check_double_src() argument
10051 const struct tgsi_full_dst_register *reg = &inst->Dst[regIndex]; emit_memory_register() local
10060 const struct tgsi_full_src_register *reg = &inst->Src[regIndex]; emit_memory_register() local
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/third_party/cmsis/CMSIS/Core/Include/
H A Dcore_ca.h2720 \param [in] reg Section attributes
2724 __STATIC_INLINE int MMU_GetSectionDescriptor(uint32_t *descriptor, mmu_region_attributes_Type reg) in MMU_GetSectionDescriptor() argument
2728 MMU_MemorySection(descriptor, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t); in MMU_GetSectionDescriptor()
2729 MMU_XNSection(descriptor,reg.xn_t); in MMU_GetSectionDescriptor()
2730 MMU_DomainSection(descriptor, reg.domain); in MMU_GetSectionDescriptor()
2731 MMU_PSection(descriptor, reg.e_t); in MMU_GetSectionDescriptor()
2732 MMU_APSection(descriptor, reg.user_t, reg in MMU_GetSectionDescriptor()
2751 MMU_GetPageDescriptor(uint32_t *descriptor, uint32_t *descriptor2, mmu_region_attributes_Type reg) MMU_GetPageDescriptor() argument
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/device/board/hihope/dayu210/audio_drivers/accessory/es8323/src/
H A Des8323_impl.c27 #define ES8323_I2C_REG_DATA_LEN (1) // reg value length is 8 bits
177 // Read contrl reg bits value
182 if (regAttr == NULL || regAttr->reg < 0 || regValue == NULL) { in Es8323RegBitsRead()
186 regVal.addr = regAttr->reg; in Es8323RegBitsRead()
202 regAttr->reg, regVal.value, regAttr->value); in Es8323RegBitsRead()
209 // Update contrl reg bits value
215 if (regAttr.reg < 0) { in Es8323RegBitsUpdate()
230 regVal.addr = regAttr.reg; in Es8323RegBitsUpdate()
237 regAttr.reg, regVal.value, regAttr.value, newValue); in Es8323RegBitsUpdate()
399 * init control reg t
427 Es8323DeviceRegRead(const struct CodecDevice *codec, uint32_t reg, uint32_t *val) Es8323DeviceRegRead() argument
447 Es8323DeviceRegWrite(const struct CodecDevice *codec, uint32_t reg, uint32_t value) Es8323DeviceRegWrite() argument
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/device/soc/rockchip/common/vendor/drivers/media/platform/rockchip/ispp/
H A Dstream_v20.c23 rkispp_write(stream->isppdev, stream->config->reg.cur_y_base, val); in set_y_addr()
28 rkispp_write(stream->isppdev, stream->config->reg.cur_uv_base, val); in set_uv_addr()
51 stream->id, rkispp_read(dev, stream->config->reg.cur_y_base), in update_mi()
52 rkispp_read(dev, stream->config->reg.cur_uv_base)); in update_mi()
88 stream->config->reg.cur_y_base = RKISPP_FEC_RD_Y_BASE; in config_fec()
89 stream->config->reg.cur_uv_base = RKISPP_FEC_RD_UV_BASE; in config_fec()
90 stream->config->reg.cur_y_base_shd = RKISPP_FEC_RD_Y_BASE_SHD; in config_fec()
91 stream->config->reg.cur_uv_base_shd = RKISPP_FEC_RD_UV_BASE_SHD; in config_fec()
289 stream->id, rkispp_read(dev, stream->config->reg.cur_y_base), in fec_work_event()
290 rkispp_read(dev, stream->config->reg in fec_work_event()
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/device/soc/rockchip/rk3588/kernel/drivers/media/platform/rockchip/ispp/
H A Dstream_v20.c23 rkispp_write(stream->isppdev, stream->config->reg.cur_y_base, val); in set_y_addr()
28 rkispp_write(stream->isppdev, stream->config->reg.cur_uv_base, val); in set_uv_addr()
54 rkispp_read(dev, stream->config->reg.cur_y_base), in update_mi()
55 rkispp_read(dev, stream->config->reg.cur_uv_base)); in update_mi()
90 stream->config->reg.cur_y_base = RKISPP_FEC_RD_Y_BASE; in config_fec()
91 stream->config->reg.cur_uv_base = RKISPP_FEC_RD_UV_BASE; in config_fec()
92 stream->config->reg.cur_y_base_shd = RKISPP_FEC_RD_Y_BASE_SHD; in config_fec()
93 stream->config->reg.cur_uv_base_shd = RKISPP_FEC_RD_UV_BASE_SHD; in config_fec()
297 rkispp_read(dev, stream->config->reg.cur_y_base), in fec_work_event()
298 rkispp_read(dev, stream->config->reg in fec_work_event()
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/third_party/node/deps/v8/src/compiler/
H A Dlinkage.cc24 inline LinkageLocation regloc(Register reg, MachineType type) { in regloc() argument
25 return LinkageLocation::ForRegister(reg.code(), type); in regloc()
28 inline LinkageLocation regloc(DoubleRegister reg, MachineType type) { in regloc() argument
29 return LinkageLocation::ForRegister(reg.code(), type); in regloc()
485 Register reg = descriptor.GetRegisterParameter(i); in GetStubCallDescriptor() local
487 locations.AddParam(regloc(reg, type)); in GetStubCallDescriptor()
563 Register reg = descriptor.GetRegisterParameter(i); in GetBytecodeDispatchCallDescriptor() local
565 locations.AddParam(regloc(reg, type)); in GetBytecodeDispatchCallDescriptor()
617 inline bool IsTaggedReg(const LinkageLocation& loc, Register reg) { in IsTaggedReg() argument
618 return loc.IsRegister() && loc.AsRegister() == reg in IsTaggedReg()
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/third_party/node/deps/v8/src/interpreter/
H A Dbytecode-array-builder.h127 BytecodeArrayBuilder& LoadAccumulatorWithRegister(Register reg);
128 BytecodeArrayBuilder& StoreAccumulatorInRegister(Register reg);
366 BytecodeArrayBuilder& BinaryOperation(Token::Value binop, Register reg,
399 BytecodeArrayBuilder& CompareOperation(Token::Value op, Register reg,
401 BytecodeArrayBuilder& CompareReference(Register reg);
552 uint32_t GetInputRegisterOperand(Register reg);
553 uint32_t GetOutputRegisterOperand(Register reg);
559 void OutputLdarRaw(Register reg);
560 void OutputStarRaw(Register reg);
601 bool RegisterIsValid(Register reg) cons
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/third_party/pcre2/pcre2/src/sljit/
H A DsljitNativePPC_32.c29 static sljit_s32 load_immediate(struct sljit_compiler *compiler, sljit_s32 reg, sljit_sw imm) in load_immediate() argument
32 return push_inst(compiler, ADDI | D(reg) | A(0) | IMM(imm)); in load_immediate()
35 return push_inst(compiler, ORI | S(TMP_ZERO) | A(reg) | IMM(imm)); in load_immediate()
37 FAIL_IF(push_inst(compiler, ADDIS | D(reg) | A(0) | IMM(imm >> 16))); in load_immediate()
38 return (imm & 0xffff) ? push_inst(compiler, ORI | S(reg) | A(reg) | IMM(imm)) : SLJIT_SUCCESS; in load_immediate()
322 static SLJIT_INLINE sljit_s32 emit_const(struct sljit_compiler *compiler, sljit_s32 reg, sljit_sw init_value) in emit_const() argument
324 FAIL_IF(push_inst(compiler, ADDIS | D(reg) | A(0) | IMM(init_value >> 16))); in emit_const()
325 return push_inst(compiler, ORI | S(reg) | A(reg) | IM in emit_const()
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/third_party/mesa3d/src/gallium/drivers/lima/ir/pp/
H A Dcodegen.c114 f->reg.dest = index >> 2; in ppir_codegen_encode_varying()
115 f->reg.mask = dest->write_mask << (index & 0x3); in ppir_codegen_encode_varying()
119 f->reg.source_type = 2; in ppir_codegen_encode_varying()
120 f->reg.perspective = 1; in ppir_codegen_encode_varying()
122 f->reg.source_type = 1; in ppir_codegen_encode_varying()
125 f->reg.perspective = 0; in ppir_codegen_encode_varying()
128 f->reg.perspective = 2; in ppir_codegen_encode_varying()
131 f->reg.perspective = 3; in ppir_codegen_encode_varying()
137 f->reg.source = index >> 2; in ppir_codegen_encode_varying()
138 f->reg in ppir_codegen_encode_varying()
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/third_party/mesa3d/src/amd/vulkan/
H A Dradv_perfcounter.c450 uint32_t reg = pool->counters[i].regs[j]; in radv_pc_init_query_pool() local
451 if (!reg || G_REG_CONSTANT(reg)) in radv_pc_init_query_pool()
456 if (pool->pc_regs[k] == reg) in radv_pc_init_query_pool()
518 unsigned reg = regs->counter0_lo; in radv_pc_emit_block_instance_read() local
524 reg = regs->counters[idx]; in radv_pc_emit_block_instance_read()
529 radeon_emit(cs, reg >> 2); in radv_pc_emit_block_instance_read()
536 reg += reg_delta; in radv_pc_emit_block_instance_read()
762 radv_pc_sum_reg(uint32_t reg, const uint64_t *data) in radv_pc_sum_reg() argument
764 unsigned instances = G_REG_INSTANCES(reg); in radv_pc_sum_reg()
779 radv_pc_max_reg(uint32_t reg, const uint64_t *data) radv_pc_max_reg() argument
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/third_party/node/deps/v8/src/diagnostics/x64/
H A Ddisasm-x64.cc286 const char* NameOfYMMRegister(int reg);
427 const char* NameOfCPURegister(int reg) const { in NameOfCPURegister()
428 return converter_.NameOfCPURegister(reg); in NameOfCPURegister()
431 const char* NameOfByteCPURegister(int reg) const { in NameOfByteCPURegister()
432 return converter_.NameOfByteCPURegister(reg); in NameOfByteCPURegister()
435 const char* NameOfXMMRegister(int reg) const { in NameOfXMMRegister()
436 return converter_.NameOfXMMRegister(reg); in NameOfXMMRegister()
439 const char* NameOfAVXRegister(int reg) const { in NameOfAVXRegister()
441 return NameOfYMMRegister(reg); in NameOfAVXRegister()
443 return converter_.NameOfXMMRegister(reg); in NameOfAVXRegister()
2097 int reg = (opcode - 0xC8) | (rex_r() ? 8 : 0); TwoByteOpcodeInstruction() local
2593 int reg = (*data & 0x7) | (rex_b() ? 8 : 0); InstructionDecode() local
2624 int reg = (opcode & 0x7) | (rex_b() ? 8 : 0); InstructionDecode() local
2823 NameOfYMMRegister(int reg) NameOfYMMRegister() argument
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/third_party/mesa3d/src/nouveau/codegen/
H A Dnv50_ir_emit_gm107.cpp243 emitField(16, 3, insn->getSrc(insn->predSrc)->rep()->reg.data.id); in emitPred()
263 val->reg.data.id : 255); in emitGPR()
269 int id = val ? val->reg.data.id : -1; in emitSYS()
278 case SV_TID : id = 0x21 + val->reg.data.sv.index; break; in emitSYS()
279 case SV_CTAID : id = 0x25 + val->reg.data.sv.index; break; in emitSYS()
285 case SV_CLOCK : id = 0x50 + val->reg.data.sv.index; break; in emitSYS()
298 emitField(pos, 3, val ? val->reg.data.id : 7); in emitPRED()
306 assert(!(v->reg.data.offset & ((1 << shr) - 1))); in emitADDR()
309 emitField(off, len, v->reg.data.offset >> shr); in emitADDR()
319 assert(!(s->reg in emitCBUF()
2572 int reg = entry->reg; gm107_interpApply() local
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/third_party/node/deps/v8/src/codegen/x64/
H A Dassembler-x64.h244 // Does not check the "reg" part of the Operand.
245 bool AddressUsesRegister(Register reg) const;
379 // Distance between the address of the imm64 in the 'movq reg, imm64'
650 void testb(Register reg, Operand op) { testb(op, reg); } in testb() argument
652 void testw(Register reg, Operand op) { testw(op, reg); } in testw() argument
664 void xchgb(Register reg, Operand op);
665 void xchgw(Register reg, Operand op);
672 void negb(Register reg);
978 sse2_instr(XMMRegister reg, byte imm8, byte prefix, byte escape, byte opcode, int extension) sse2_instr() argument
2246 emit_operand(Register reg, Operand adr) emit_operand() argument
2256 emit_modrm(Register reg, Register rm_reg) emit_modrm() argument
2474 emit_test(Register reg, Operand op, int size) emit_test() argument
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/device/soc/rockchip/rk3588/kernel/drivers/pinctrl/
H A Dpinctrl-rk806.c41 * @reg: gpio setting register;
55 u8 reg; member
174 .reg = RK806_SLEEP_GPIO,
181 .reg = RK806_SLEEP_GPIO,
188 .reg = RK806_SLEEP_GPIO,
206 ret = regmap_read(pci->rk806->regmap, pci->pin_cfg[offset].reg, &val); in rk806_gpio_get()
226 pci->pin_cfg[offset].reg, in rk806_gpio_set()
260 pci->pin_cfg[offset].reg, in rk806_gpio_get_direction()
393 pci->pin_cfg[offset].reg, in rk806_pmx_gpio_set_direction()
/third_party/mesa3d/src/gallium/drivers/r600/sfn/
H A Dsfn_virtualvalues.h263 void set_value(PRegister reg) { m_value = reg;} in set_value() argument
279 void set_value(int i, PRegister reg) { in set_value() argument
280 assert(reg->sel() == m_sel); in set_value()
281 m_swz[i] = reg->chan(); in set_value()
282 m_values[i]->set_value(reg); in set_value()
399 LocalArrayValue(PRegister reg, LocalArray& array);
400 LocalArrayValue(PRegister reg, PVirtualValue index, LocalArray &array);
/third_party/mesa3d/src/gallium/drivers/etnaviv/
H A Detnaviv_disasm.c344 printf("t%u", dst->reg); in print_dst()
393 src->reg += 128; in print_src()
396 printf("%u", src->reg); in print_src()
424 printf("a%u", operands->dst->reg); in print_opc_mov()
543 .reg = instr->dst_reg, in print_instr()
558 .reg = instr->src0_reg, in print_instr()
568 .reg = instr->src1_reg, in print_instr()
578 .reg = instr->src2_reg, in print_instr()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
H A DAArch64PBQPRegAlloc.cpp36 bool isFPReg(unsigned reg) { in isFPReg() argument
37 return AArch64::FPR32RegClass.contains(reg) || in isFPReg()
38 AArch64::FPR64RegClass.contains(reg) || in isFPReg()
39 AArch64::FPR128RegClass.contains(reg); in isFPReg()
43 bool isOdd(unsigned reg) { in isOdd() argument
44 switch (reg) { in isOdd()
166 LLVM_DEBUG(dbgs() << "Rd is a physical reg:" in addIntraChainConstraint()
168 LLVM_DEBUG(dbgs() << "Ra is a physical reg:" in addIntraChainConstraint()
216 // Get the maximum cost (excluding unallocatable reg) for same parity in addIntraChainConstraint()
293 // Get the maximum cost (excluding unallocatable reg) fo in addInterChainConstraint()
319 regJustKilledBefore(const LiveIntervals &LIs, unsigned reg, const MachineInstr &MI) regJustKilledBefore() argument
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/third_party/wpa_supplicant/wpa_supplicant-2.9/src/p2p/
H A Dp2p_utils.c259 const struct p2p_reg_class *reg = &channels->reg_class[i]; in p2p_channels_includes() local
260 if (reg->reg_class != reg_class) in p2p_channels_includes()
262 for (j = 0; j < reg->channels; j++) { in p2p_channels_includes()
263 if (reg->channel[j] == channel) in p2p_channels_includes()
276 const struct p2p_reg_class *reg = &channels->reg_class[i]; in p2p_channels_includes_freq() local
277 for (j = 0; j < reg->channels; j++) { in p2p_channels_includes_freq()
278 if (p2p_channel_to_freq(reg->reg_class, in p2p_channels_includes_freq()
279 reg->channel[j]) == (int) freq) in p2p_channels_includes_freq()
/third_party/wpa_supplicant/wpa_supplicant-2.9_standard/src/p2p/
H A Dp2p_utils.c262 const struct p2p_reg_class *reg = &channels->reg_class[i]; in p2p_channels_includes() local
263 if (reg->reg_class != reg_class) in p2p_channels_includes()
265 for (j = 0; j < reg->channels; j++) { in p2p_channels_includes()
266 if (reg->channel[j] == channel) in p2p_channels_includes()
279 const struct p2p_reg_class *reg = &channels->reg_class[i]; in p2p_channels_includes_freq() local
280 for (j = 0; j < reg->channels; j++) { in p2p_channels_includes_freq()
281 if (p2p_channel_to_freq(reg->reg_class, in p2p_channels_includes_freq()
282 reg->channel[j]) == (int) freq) in p2p_channels_includes_freq()
/device/soc/rockchip/common/vendor/drivers/video/rockchip/mpp/
H A Dmpp_rkvdec2_link.c154 u32 *reg = NULL; in rkvdec_link_node_dump() local
158 reg = table_base + i * reg_count; in rkvdec_link_node_dump()
163 mpp_err("reg%03d 0x%08x\n", j, reg[j]); in rkvdec_link_node_dump()
179 u32 reg = i * sizeof(u32); in rkvdec_core_reg_dump() local
181 mpp_err("reg[%03d]: %04x: 0x%08x\n", i, reg, readl_relaxed(mpp->reg_base + reg)); in rkvdec_core_reg_dump()
189 mpp_err("reg 0 %08x - irq status\n", dev->irq_status); in rkvdec_link_reg_dump()
190 mpp_err("reg in rkvdec_link_reg_dump()
378 u32 reg = RKVDEC_CACHE_PERMIT_CACHEABLE_ACCESS | RKVDEC_CACHE_PERMIT_READ_ALLOCATE; rkvdec2_clear_cache() local
1719 rkvdec2_set_core_info(u32 *reg, int idx) rkvdec2_set_core_info() argument
1732 u32 i, reg_en, reg; rkvdec2_soft_ccu_enqueue() local
[all...]
/device/soc/rockchip/rk3588/kernel/drivers/video/rockchip/mpp/
H A Dmpp_rkvdec2_link.c151 u32 *reg = NULL; in rkvdec_link_node_dump() local
155 reg = table_base + i * reg_count; in rkvdec_link_node_dump()
161 mpp_err("reg%03d 0x%08x\n", j, reg[j]); in rkvdec_link_node_dump()
177 u32 reg = i * sizeof(u32); in rkvdec_core_reg_dump() local
179 mpp_err("reg[%03d]: %04x: 0x%08x\n", in rkvdec_core_reg_dump()
180 i, reg, readl_relaxed(mpp->reg_base + reg)); in rkvdec_core_reg_dump()
188 mpp_err("reg 0 %08x - irq status\n", dev->irq_status); in rkvdec_link_reg_dump()
189 mpp_err("reg in rkvdec_link_reg_dump()
377 u32 reg = RKVDEC_CACHE_PERMIT_CACHEABLE_ACCESS | rkvdec2_clear_cache() local
1772 rkvdec2_set_core_info(u32 *reg, int idx) rkvdec2_set_core_info() argument
1785 u32 i, reg_en, reg; rkvdec2_soft_ccu_enqueue() local
[all...]
/device/board/hihope/rk3568/audio_drivers/dai/include/
H A Drk3568_dai_ops.h20 int32_t Rk3568DeviceReadReg(const struct DaiDevice *dai, uint32_t reg, uint32_t *val);
21 int32_t Rk3568DeviceWriteReg(const struct DaiDevice *dai, uint32_t reg, uint32_t value);
/device/board/hihope/dayu210/audio_drivers/dai/include/
H A Drk3588_dai_ops.h21 int32_t Rk3588DeviceReadReg(const struct DaiDevice *dai, uint32_t reg, uint32_t *val);
22 int32_t Rk3588DeviceWriteReg(const struct DaiDevice *dai, uint32_t reg, uint32_t value);
/device/soc/rockchip/rk3588/kernel/drivers/net/ethernet/realtek/r8168/
H A Dr8168_firmware.h42 typedef void (*rtl8168_fw_write_t)(struct rtl8168_private *tp, u16 reg, u16 val);
43 typedef u32 (*rtl8168_fw_read_t)(struct rtl8168_private *tp, u16 reg);
H A Drtl_eeprom.h46 u16 rtl8168_eeprom_read_sc(struct rtl8168_private *tp, u16 reg);
47 void rtl8168_eeprom_write_sc(struct rtl8168_private *tp, u16 reg, u16 data);

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