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/third_party/mesa3d/src/gallium/drivers/radeonsi/
H A Dsi_state_msaa.c35 #define GET_SFIELD(reg, index) SEXT4(((reg) >> ((index)*4)) & 0xf)
36 #define GET_SX(reg, index) GET_SFIELD((reg)[(index) / 4], ((index) % 4) * 2)
37 #define GET_SY(reg, index) GET_SFIELD((reg)[(index) / 4], ((index) % 4) * 2 + 1)
/third_party/node/deps/v8/src/codegen/riscv64/
H A Dconstants-riscv64.cc30 const char* Registers::Name(int reg) { in Name() argument
32 if ((0 <= reg) && (reg < kNumSimuRegisters)) { in Name()
33 result = names_[reg]; in Name()
50 while (aliases_[i].reg != kInvalidRegister) { in Number()
52 return aliases_[i].reg; in Number()
/third_party/mesa3d/src/gallium/drivers/etnaviv/
H A Detnaviv_asm.c50 uni_reg = src->reg; in check_uniforms()
52 if (uni_rgroup != src->rgroup || uni_reg != src->reg) { in check_uniforms()
78 VIV_ISA_WORD_0_DST_REG(inst->dst.reg) | in etna_assemble()
84 VIV_ISA_WORD_1_SRC0_REG(inst->src[0].reg) | in etna_assemble()
92 VIV_ISA_WORD_2_SRC1_REG(inst->src[1].reg) | in etna_assemble()
101 VIV_ISA_WORD_3_SRC2_REG(inst->src[2].reg) | in etna_assemble()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/MCTargetDesc/
H A DSparcTargetStreamer.cpp28 void SparcTargetAsmStreamer::emitSparcRegisterIgnore(unsigned reg) { in emitSparcRegisterIgnore() argument
30 << "%" << StringRef(SparcInstPrinter::getRegisterName(reg)).lower() in emitSparcRegisterIgnore()
34 void SparcTargetAsmStreamer::emitSparcRegisterScratch(unsigned reg) { in emitSparcRegisterScratch() argument
36 << "%" << StringRef(SparcInstPrinter::getRegisterName(reg)).lower() in emitSparcRegisterScratch()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/VE/MCTargetDesc/
H A DVETargetStreamer.cpp28 void VETargetAsmStreamer::emitVERegisterIgnore(unsigned reg) { in emitVERegisterIgnore() argument
30 << "%" << StringRef(VEInstPrinter::getRegisterName(reg)).lower() in emitVERegisterIgnore()
34 void VETargetAsmStreamer::emitVERegisterScratch(unsigned reg) { in emitVERegisterScratch() argument
36 << "%" << StringRef(VEInstPrinter::getRegisterName(reg)).lower() in emitVERegisterScratch()
/third_party/mesa3d/src/nouveau/codegen/
H A Dnv50_ir_emit_nvc0.cpp168 #define SDATA(a) ((a).rep()->reg.data)
169 #define DDATA(a) ((a).rep()->reg.data)
215 return imm && imm->reg.data.u32 & 0xfff; in isLIMM()
217 return imm && (imm->reg.data.s32 > 0x7ffff || in isLIMM()
218 imm->reg.data.s32 < -0x80000); in isLIMM()
284 assert(i->getPredicate()->reg.file == FILE_PREDICATE); in emitPredicate()
318 code[0] |= (sym->reg.data.offset & 0x003f) << 26; in setAddress16()
319 code[1] |= (sym->reg.data.offset & 0xffc0) >> 6; in setAddress16()
329 code[0] |= (sym->reg.data.offset & 0x00003f) << 26; in setAddress24()
330 code[1] |= (sym->reg in setAddress24()
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/third_party/mesa3d/src/intel/perf/
H A Dintel_perf_private.h40 intel_perf_query_add_stat_reg(struct intel_perf_query_info *query, uint32_t reg, in intel_perf_query_add_stat_reg() argument
54 counter->pipeline_stat.reg = reg; in intel_perf_query_add_stat_reg()
63 uint32_t reg, const char *name) in intel_perf_query_add_basic_stat_reg()
65 intel_perf_query_add_stat_reg(query, reg, 1, 1, name, name); in intel_perf_query_add_basic_stat_reg()
62 intel_perf_query_add_basic_stat_reg(struct intel_perf_query_info *query, uint32_t reg, const char *name) intel_perf_query_add_basic_stat_reg() argument
/third_party/node/deps/v8/src/codegen/
H A Dregister-base.h68 inline std::ostream& operator<<(std::ostream& os, RegType reg) { in operator <<() argument
69 return os << RegisterName(reg); in operator <<()
76 inline const char* RegisterName(RegType reg) { \
79 return reg.is_valid() ? Names[reg.code()] : "invalid"; \
/third_party/mesa3d/src/freedreno/ir3/
H A Dir3_delay.c83 * a full-reg is read as a half-reg or when a half-reg is read as a in ir3_delayslots()
84 * full-reg. in ir3_delayslots()
114 post_ra_reg_elems(struct ir3_register *reg) in post_ra_reg_elems() argument
116 if (reg->flags & IR3_REG_RELATIV) in post_ra_reg_elems()
117 return reg->size; in post_ra_reg_elems()
118 return reg_elems(reg); in post_ra_reg_elems()
122 post_ra_reg_num(struct ir3_register *reg) in post_ra_reg_num() argument
124 if (reg in post_ra_reg_num()
[all...]
/third_party/node/deps/v8/src/regexp/arm/
H A Dregexp-macro-assembler-arm.h23 void AdvanceRegister(int reg, int by) override;
65 void IfRegisterGE(int reg, int comparand, Label* if_ge) override;
66 void IfRegisterLT(int reg, int comparand, Label* if_lt) override;
67 void IfRegisterEqPos(int reg, Label* if_eq) override;
77 void ReadCurrentPositionFromRegister(int reg) override;
78 void ReadStackPointerFromRegister(int reg) override;
82 void WriteCurrentPositionToRegister(int reg, int cp_offset) override;
84 void WriteStackPointerToRegister(int reg) override;
/third_party/node/deps/v8/src/regexp/mips64/
H A Dregexp-macro-assembler-mips64.h22 void AdvanceRegister(int reg, int by) override;
64 void IfRegisterGE(int reg, int comparand, Label* if_ge) override;
65 void IfRegisterLT(int reg, int comparand, Label* if_lt) override;
66 void IfRegisterEqPos(int reg, Label* if_eq) override;
76 void ReadCurrentPositionFromRegister(int reg) override;
77 void ReadStackPointerFromRegister(int reg) override;
81 void WriteCurrentPositionToRegister(int reg, int cp_offset) override;
83 void WriteStackPointerToRegister(int reg) override;
/third_party/node/deps/v8/src/regexp/loong64/
H A Dregexp-macro-assembler-loong64.h22 void AdvanceRegister(int reg, int by) override;
64 void IfRegisterGE(int reg, int comparand, Label* if_ge) override;
65 void IfRegisterLT(int reg, int comparand, Label* if_lt) override;
66 void IfRegisterEqPos(int reg, Label* if_eq) override;
76 void ReadCurrentPositionFromRegister(int reg) override;
77 void ReadStackPointerFromRegister(int reg) override;
81 void WriteCurrentPositionToRegister(int reg, int cp_offset) override;
83 void WriteStackPointerToRegister(int reg) override;
/third_party/node/deps/v8/src/regexp/mips/
H A Dregexp-macro-assembler-mips.h22 void AdvanceRegister(int reg, int by) override;
64 void IfRegisterGE(int reg, int comparand, Label* if_ge) override;
65 void IfRegisterLT(int reg, int comparand, Label* if_lt) override;
66 void IfRegisterEqPos(int reg, Label* if_eq) override;
76 void ReadCurrentPositionFromRegister(int reg) override;
77 void ReadStackPointerFromRegister(int reg) override;
81 void WriteCurrentPositionToRegister(int reg, int cp_offset) override;
83 void WriteStackPointerToRegister(int reg) override;
/third_party/node/deps/v8/src/regexp/ia32/
H A Dregexp-macro-assembler-ia32.h24 void AdvanceRegister(int reg, int by) override;
66 void IfRegisterGE(int reg, int comparand, Label* if_ge) override;
67 void IfRegisterLT(int reg, int comparand, Label* if_lt) override;
68 void IfRegisterEqPos(int reg, Label* if_eq) override;
78 void ReadCurrentPositionFromRegister(int reg) override;
79 void ReadStackPointerFromRegister(int reg) override;
83 void WriteCurrentPositionToRegister(int reg, int cp_offset) override;
85 void WriteStackPointerToRegister(int reg) override;
/third_party/node/deps/v8/src/regexp/ppc/
H A Dregexp-macro-assembler-ppc.h22 void AdvanceRegister(int reg, int by) override;
65 void IfRegisterGE(int reg, int comparand, Label* if_ge) override;
66 void IfRegisterLT(int reg, int comparand, Label* if_lt) override;
67 void IfRegisterEqPos(int reg, Label* if_eq) override;
77 void ReadCurrentPositionFromRegister(int reg) override;
78 void ReadStackPointerFromRegister(int reg) override;
82 void WriteCurrentPositionToRegister(int reg, int cp_offset) override;
84 void WriteStackPointerToRegister(int reg) override;
/third_party/node/deps/v8/src/regexp/riscv64/
H A Dregexp-macro-assembler-riscv64.h24 void AdvanceRegister(int reg, int by) override;
66 void IfRegisterGE(int reg, int comparand, Label* if_ge) override;
67 void IfRegisterLT(int reg, int comparand, Label* if_lt) override;
68 void IfRegisterEqPos(int reg, Label* if_eq) override;
78 void ReadCurrentPositionFromRegister(int reg) override;
79 void ReadStackPointerFromRegister(int reg) override;
83 void WriteCurrentPositionToRegister(int reg, int cp_offset) override;
85 void WriteStackPointerToRegister(int reg) override;
/third_party/node/deps/v8/src/regexp/s390/
H A Dregexp-macro-assembler-s390.h22 void AdvanceRegister(int reg, int by) override;
65 void IfRegisterGE(int reg, int comparand, Label* if_ge) override;
66 void IfRegisterLT(int reg, int comparand, Label* if_lt) override;
67 void IfRegisterEqPos(int reg, Label* if_eq) override;
77 void ReadCurrentPositionFromRegister(int reg) override;
78 void ReadStackPointerFromRegister(int reg) override;
82 void WriteCurrentPositionToRegister(int reg, int cp_offset) override;
84 void WriteStackPointerToRegister(int reg) override;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
H A DX86VZeroUpper.cpp142 for (unsigned reg = X86::YMM0; reg <= X86::YMM15; ++reg) { in clobbersAllYmmAndZmmRegs()
143 if (!MO.clobbersPhysReg(reg)) in clobbersAllYmmAndZmmRegs()
146 for (unsigned reg = X86::ZMM0; reg <= X86::ZMM15; ++reg) { in clobbersAllYmmAndZmmRegs()
147 if (!MO.clobbersPhysReg(reg)) in clobbersAllYmmAndZmmRegs()
/third_party/libunwind/libunwind/src/ia64/
H A Dunwind_i.h53 inlined_uc_addr (ucontext_t *uc, int reg, uint8_t *nat_bitnr) in inlined_uc_addr() argument
58 switch (reg) in inlined_uc_addr()
80 addr = &uc->uc_mcontext.sc_gr[reg - UNW_IA64_GR]; in inlined_uc_addr()
86 reg_addr = (unw_word_t) &uc->uc_mcontext.sc_gr[reg - UNW_IA64_NAT]; in inlined_uc_addr()
87 *nat_bitnr = reg - UNW_IA64_NAT; in inlined_uc_addr()
91 addr = &uc->uc_mcontext.sc_br[reg - UNW_IA64_BR]; in inlined_uc_addr()
96 addr = &uc->uc_mcontext.sc_fr[reg - UNW_IA64_FR]; in inlined_uc_addr()
106 uc_addr (ucontext_t *uc, int reg, uint8_t *nat_bitnr) in uc_addr() argument
108 if (__builtin_constant_p (reg)) in uc_addr()
109 return inlined_uc_addr (uc, reg, nat_bitn in uc_addr()
441 struct ia64_reg_info reg[IA64_NUM_PREGS]; /* register save locations */ global() member
589 ia64_get_stacked(struct cursor *c, unw_word_t reg, ia64_loc_t *locp, ia64_loc_t *rnat_locp) ia64_get_stacked() argument
[all...]
/third_party/mesa3d/src/gallium/drivers/r600/sfn/
H A Dsfn_instr_lds.cpp103 auto reg = addr->as_register(); in split() local
104 if (reg) { in split()
105 reg->del_use(this); in split()
106 if (reg->parents().size() == 1) { in split()
107 for (auto& p: reg->parents()) { in split()
265 auto reg = srcs[0]->as_register(); in split() local
266 if (reg) { in split()
267 reg->del_use(this); in split()
268 if (reg->parents().size() == 1) { in split()
269 for (auto& p: reg in split()
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
H A DCalcSpillWeights.cpp50 // Return the preferred allocation register for reg, given a COPY instruction.
51 static Register copyHint(const MachineInstr *mi, unsigned reg, in copyHint() argument
56 if (mi->getOperand(0).getReg() == reg) { in copyHint()
72 const TargetRegisterClass *rc = mri.getRegClass(reg); in copyHint()
77 // Check if reg:sub matches so that a super register could be hinted. in copyHint()
89 unsigned Reg = LI.reg; in isRematerializable()
162 std::pair<unsigned, unsigned> TargetHint = mri.getRegAllocationHint(li.reg); in weightCalcHelper()
207 I = mri.reg_instr_begin(li.reg), E = mri.reg_instr_end(); in weightCalcHelper()
234 std::tie(reads, writes) = mi->readsWritesVirtualRegister(li.reg); in weightCalcHelper()
247 Register hint = copyHint(mi, li.reg, tr in weightCalcHelper()
[all...]
H A DRegAllocGreedy.cpp256 return ExtraRegInfo[VirtReg.reg].Stage; in getStage()
261 ExtraRegInfo[VirtReg.reg].Stage = Stage; in setStage()
685 // The queue holds (size, reg) pairs. in enqueue()
687 const unsigned Reg = LI->reg; in enqueue()
778 if (unsigned Hint = MRI->getSimpleHint(VirtReg.reg)) in tryAssign()
810 AllocationOrder Order(VirtReg.reg, *VRM, RegClassInfo, Matrix); in canReassign()
888 unsigned Cascade = ExtraRegInfo[VirtReg.reg].Cascade; in canEvictInterference()
902 assert(Register::isVirtualRegister(Intf->reg) && in canEvictInterference()
908 if (FixedRegisters.count(Intf->reg)) in canEvictInterference()
922 RegClassInfo.getNumAllocatableRegs(MRI->getRegClass(VirtReg.reg)) < in canEvictInterference()
[all...]
/third_party/libunwind/libunwind/src/aarch64/
H A Dregname.c100 unw_regname (unw_regnum_t reg) in unw_regname() argument
102 if (reg < (unw_regnum_t) ARRAY_SIZE (regname) && regname[reg] != NULL) in unw_regname()
103 return regname[reg]; in unw_regname()
/third_party/mesa3d/src/broadcom/simulator/
H A Dv3d_simulator_wrapper.cpp59 uint32_t v3d_hw_read_reg(struct v3d_hw *hw, uint32_t reg) in v3d_hw_read_reg() argument
61 return hw->read_reg(reg); in v3d_hw_read_reg()
64 void v3d_hw_write_reg(struct v3d_hw *hw, uint32_t reg, uint32_t val) in v3d_hw_write_reg() argument
66 hw->write_reg(reg, val); in v3d_hw_write_reg()
/third_party/mesa3d/src/gallium/auxiliary/tgsi/
H A Dtgsi_util.h46 tgsi_util_get_src_register_swizzle(const struct tgsi_src_register *reg,
52 const struct tgsi_full_src_register *reg,
56 tgsi_util_set_src_register_swizzle(struct tgsi_src_register *reg,
80 tgsi_util_get_src_from_ind(const struct tgsi_ind_register *reg);

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