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Searched refs:rate (Results 876 - 900 of 4265) sorted by relevance

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/kernel/linux/linux-5.10/sound/soc/sof/
H A Dpcm.c176 pcm.params.rate = params_rate(params); in sof_pcm_hw_params()
633 struct snd_interval *rate = hw_param_interval(params, in sof_pcm_dai_link_fixup() local
651 rate->min = 48000; in sof_pcm_dai_link_fixup()
652 rate->max = 48000; in sof_pcm_dai_link_fixup()
681 /* read rate and channels from topology */ in sof_pcm_dai_link_fixup()
684 rate->min = dai->dai_config->ssp.fsync_rate; in sof_pcm_dai_link_fixup()
685 rate->max = dai->dai_config->ssp.fsync_rate; in sof_pcm_dai_link_fixup()
690 "rate_min: %d rate_max: %d\n", rate->min, rate->max); in sof_pcm_dai_link_fixup()
721 rate in sof_pcm_dai_link_fixup()
[all...]
/kernel/linux/linux-5.10/sound/soc/codecs/
H A Dtlv320dac33.c42 #define SAMPLES_TO_US(rate, samples) \
43 (1000000000 / (((rate) * 1000) / (samples)))
45 #define US_TO_SAMPLES(rate, us) \
46 ((rate) / (1000000 / ((us) < 1000000 ? (us) : 1000000)))
289 /* A : DAC sample rate Fsref/1.5 */ in dac33_init_chip()
817 dev_err(component->dev, "unsupported rate %d\n", in dac33_hw_params()
840 #define CALC_OSCSET(rate, refclk) ( \
841 ((((rate * 10000) / refclk) * 4096) + 7000) / 10000)
842 #define CALC_RATIOSET(rate, refclk) ( \
843 ((((refclk * 100000) / rate) * 1638
1053 unsigned int rate = substream->runtime->rate; dac33_calculate_times() local
[all...]
/kernel/linux/linux-6.6/sound/soc/codecs/
H A Dtlv320dac33.c42 #define SAMPLES_TO_US(rate, samples) \
43 (1000000000 / (((rate) * 1000) / (samples)))
45 #define US_TO_SAMPLES(rate, us) \
46 ((rate) / (1000000 / ((us) < 1000000 ? (us) : 1000000)))
289 /* A : DAC sample rate Fsref/1.5 */ in dac33_init_chip()
817 dev_err(component->dev, "unsupported rate %d\n", in dac33_hw_params()
840 #define CALC_OSCSET(rate, refclk) ( \
841 ((((rate * 10000) / refclk) * 4096) + 7000) / 10000)
842 #define CALC_RATIOSET(rate, refclk) ( \
843 ((((refclk * 100000) / rate) * 1638
1053 unsigned int rate = substream->runtime->rate; dac33_calculate_times() local
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/dp/
H A Ddp_ctrl.c96 values[0] = drm_dp_link_rate_to_bw_code(link->rate); in dp_aux_link_configure()
945 in.lclk = ctrl->link->link_params.rate / 1000; in dp_ctrl_calc_tu_parameters()
1140 switch (ctrl->link->link_params.rate) { in dp_ctrl_link_rate_down_shift()
1142 ctrl->link->link_params.rate = 540000; in dp_ctrl_link_rate_down_shift()
1145 ctrl->link->link_params.rate = 270000; in dp_ctrl_link_rate_down_shift()
1148 ctrl->link->link_params.rate = 162000; in dp_ctrl_link_rate_down_shift()
1157 DRM_DEBUG_DP("new rate=0x%x\n", ctrl->link->link_params.rate); in dp_ctrl_link_rate_down_shift()
1169 ctrl->link->link_params.rate = ctrl->panel->link_info.rate; in dp_ctrl_link_lane_down_shift()
1299 dp_ctrl_set_clock_rate(struct dp_ctrl_private *ctrl, enum dp_pm_type module, char *name, unsigned long rate) dp_ctrl_set_clock_rate() argument
1633 u32 rate = 0; dp_ctrl_on_link() local
1739 u32 rate = 0; dp_ctrl_on_stream() local
[all...]
/kernel/linux/linux-5.10/arch/sh/kernel/cpu/sh2/
H A Dclock-sh7619.c25 clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 7]; in master_clk_init()
35 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
44 return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 7]; in bus_clk_recalc()
/kernel/linux/linux-5.10/arch/sh/kernel/cpu/sh2a/
H A Dclock-sh7203.c29 clk->rate *= pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0003] * pll2_mult; in master_clk_init()
39 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
49 return clk->parent->rate / pfc_divisors[idx-2]; in bus_clk_recalc()
/kernel/linux/linux-5.10/drivers/clk/qcom/
H A Dcommon.h45 unsigned long rate);
47 unsigned long rate);
56 const char *name, unsigned long rate);
/kernel/linux/linux-5.10/drivers/clk/sunxi/
H A Dclk-a10-hosc.c23 u32 rate; in sun4i_osc_clk_setup() local
25 if (of_property_read_u32(node, "clock-frequency", &rate)) in sun4i_osc_clk_setup()
28 /* allocate fixed-rate and gate clock structs */ in sun4i_osc_clk_setup()
38 /* set up gate and fixed rate properties */ in sun4i_osc_clk_setup()
42 fixed->fixed_rate = rate; in sun4i_osc_clk_setup()
/kernel/linux/linux-6.6/arch/sh/kernel/cpu/sh2a/
H A Dclock-sh7203.c29 clk->rate *= pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0003] * pll2_mult; in master_clk_init()
39 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
49 return clk->parent->rate / pfc_divisors[idx-2]; in bus_clk_recalc()
/kernel/linux/linux-6.6/arch/sh/kernel/cpu/sh2/
H A Dclock-sh7619.c25 clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 7]; in master_clk_init()
35 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
44 return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 7]; in bus_clk_recalc()
/kernel/linux/linux-5.10/sound/core/
H A Dpcm_iec958.c12 static int create_iec958_consumer(uint rate, uint sample_width, in create_iec958_consumer() argument
20 switch (rate) { in create_iec958_consumer()
84 * @runtime: pcm runtime structure with ->rate filled in
98 return create_iec958_consumer(runtime->rate, in snd_pcm_create_iec958_consumer()
106 * @params: the hw_params instance for extracting rate and sample format
/kernel/linux/linux-6.6/drivers/clk/qcom/
H A Dcommon.h45 unsigned long rate);
47 unsigned long rate);
56 const char *name, unsigned long rate);
/kernel/linux/linux-6.6/drivers/clk/sunxi/
H A Dclk-a10-hosc.c23 u32 rate; in sun4i_osc_clk_setup() local
25 if (of_property_read_u32(node, "clock-frequency", &rate)) in sun4i_osc_clk_setup()
28 /* allocate fixed-rate and gate clock structs */ in sun4i_osc_clk_setup()
38 /* set up gate and fixed rate properties */ in sun4i_osc_clk_setup()
42 fixed->fixed_rate = rate; in sun4i_osc_clk_setup()
/kernel/linux/linux-6.6/drivers/net/ethernet/mellanox/mlx5/core/en/
H A Dhtb.h26 u32 parent_classid, u64 rate, u64 ceil,
30 u64 rate, u64 ceil, struct netlink_ext_ack *extack);
37 mlx5e_htb_node_modify(struct mlx5e_htb *htb, u16 classid, u64 rate, u64 ceil,
/kernel/linux/linux-5.10/drivers/net/wireless/intel/iwlwifi/dvm/
H A Drs.c36 /* max allowed rate miss before sync LQ cmd */
77 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
79 * If there isn't a valid next or previous rate then INV is used which
109 /* HT rate format */ in iwl_hwrate_to_plcp_idx()
125 /* legacy rate forma in iwl_hwrate_to_plcp_idx()
1157 s8 rate = index; rs_get_best_rate() local
1242 s32 rate; rs_switch_to_mimo2() local
1297 s32 rate; rs_switch_to_mimo3() local
1354 s32 rate; rs_switch_to_siso() local
2168 u32 rate; rs_update_rate_tbl() local
2636 u32 rate; rs_initialize_lq() local
[all...]
/kernel/linux/linux-6.6/drivers/net/wireless/intel/iwlwifi/dvm/
H A Drs.c31 /* max allowed rate miss before sync LQ cmd */
72 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
74 * If there isn't a valid next or previous rate then INV is used which
104 /* HT rate format */ in iwl_hwrate_to_plcp_idx()
120 /* legacy rate forma in iwl_hwrate_to_plcp_idx()
1135 s8 rate = index; rs_get_best_rate() local
1220 s32 rate; rs_switch_to_mimo2() local
1275 s32 rate; rs_switch_to_mimo3() local
1332 s32 rate; rs_switch_to_siso() local
2146 u32 rate; rs_update_rate_tbl() local
2614 u32 rate; rs_initialize_lq() local
[all...]
/kernel/linux/linux-5.10/drivers/clk/imx/
H A Dclk-pllv2.c126 static int __clk_pllv2_set_rate(unsigned long rate, unsigned long parent_rate, in __clk_pllv2_set_rate() argument
137 mfi = rate * (pdf+1) / quad_parent_rate; in __clk_pllv2_set_rate()
142 temp64 = rate * (pdf + 1) - quad_parent_rate * mfi; in __clk_pllv2_set_rate()
155 static int clk_pllv2_set_rate(struct clk_hw *hw, unsigned long rate, in clk_pllv2_set_rate() argument
166 ret = __clk_pllv2_set_rate(rate, parent_rate, &dp_op, &dp_mfd, &dp_mfn); in clk_pllv2_set_rate()
181 static long clk_pllv2_round_rate(struct clk_hw *hw, unsigned long rate, in clk_pllv2_round_rate() argument
187 ret = __clk_pllv2_set_rate(rate, *prate, &dp_op, &dp_mfd, &dp_mfn); in clk_pllv2_round_rate()
/kernel/linux/linux-5.10/drivers/clk/ti/
H A Dclk-dra7-atl.c131 static long atl_clk_round_rate(struct clk_hw *hw, unsigned long rate, in atl_clk_round_rate() argument
136 divider = (*parent_rate + rate / 2) / rate; in atl_clk_round_rate()
143 static int atl_clk_set_rate(struct clk_hw *hw, unsigned long rate, in atl_clk_set_rate() argument
149 if (!hw || !rate) in atl_clk_set_rate()
153 divider = ((parent_rate + rate / 2) / rate) - 1; in atl_clk_set_rate()
/kernel/linux/linux-5.10/drivers/clk/
H A Dclk-max9485.c129 static int max9485_clkout_set_rate(struct clk_hw *hw, unsigned long rate, in max9485_clkout_set_rate() argument
136 if (entry->out == rate) in max9485_clkout_set_rate()
162 static long max9485_clkout_round_rate(struct clk_hw *hw, unsigned long rate, in max9485_clkout_round_rate() argument
169 if (curr->out == rate) in max9485_clkout_round_rate()
170 return rate; in max9485_clkout_round_rate()
176 if (curr->out > rate) { in max9485_clkout_round_rate()
192 return (mid > rate) ? prev->out : curr->out; in max9485_clkout_round_rate()
/kernel/linux/linux-5.10/drivers/clocksource/
H A Dtimer-u300.c360 unsigned long rate; in u300_timer_init_of() local
387 rate = clk_get_rate(clk); in u300_timer_init_of()
389 u300_clockevent_data.ticks_per_jiffy = DIV_ROUND_CLOSEST(rate, HZ); in u300_timer_init_of()
391 sched_clock_register(u300_read_sched_clock, 32, rate); in u300_timer_init_of()
394 u300_delay_timer.freq = rate; in u300_timer_init_of()
439 "GPT2", rate, 300, 32, clocksource_mmio_readl_up); in u300_timer_init_of()
446 clockevents_config_and_register(&u300_clockevent_data.cevd, rate, in u300_timer_init_of()
/kernel/linux/linux-5.10/drivers/thunderbolt/
H A Dtmu.c18 switch (sw->tmu.rate) { in tb_switch_tmu_mode_name()
67 static int tb_switch_tmu_rate_write(struct tb_switch *sw, int rate) in tb_switch_tmu_rate_write() argument
78 val |= rate << TMU_RTR_CS_3_TS_PACKET_INTERVAL_SHIFT; in tb_switch_tmu_rate_write()
182 sw->tmu.rate = ret; in tb_switch_tmu_init()
306 if (sw->tmu.rate == TB_SWITCH_TMU_RATE_OFF) in tb_switch_tmu_disable()
326 sw->tmu.rate = TB_SWITCH_TMU_RATE_OFF; in tb_switch_tmu_disable()
379 sw->tmu.rate = TB_SWITCH_TMU_RATE_HIFI; in tb_switch_tmu_enable()
/kernel/linux/linux-5.10/drivers/usb/misc/
H A Dusb3503.c172 u32 rate = 0; in usb3503_probe() local
175 if (!of_property_read_u32(np, "refclk-frequency", &rate)) { in usb3503_probe()
176 switch (rate) { in usb3503_probe()
191 "unsupported reference clock rate (%d)\n", in usb3503_probe()
192 (int) rate); in usb3503_probe()
204 if (rate != 0) { in usb3503_probe()
205 err = clk_set_rate(hub->clk, rate); in usb3503_probe()
208 "unable to set reference clock rate to %d\n", in usb3503_probe()
209 (int)rate); in usb3503_probe()
/kernel/linux/linux-5.10/drivers/pwm/
H A Dpwm-zx.c68 unsigned long rate; in zx_pwm_get_state() local
86 rate = clk_get_rate(zpc->wclk); in zx_pwm_get_state()
90 state->period = DIV_ROUND_CLOSEST_ULL(tmp, rate); in zx_pwm_get_state()
94 state->duty_cycle = DIV_ROUND_CLOSEST_ULL(tmp, rate); in zx_pwm_get_state()
104 unsigned long rate; in zx_pwm_config() local
107 rate = clk_get_rate(zpc->wclk); in zx_pwm_config()
110 c = rate / div; in zx_pwm_config()
/kernel/linux/linux-5.10/drivers/rtc/
H A Drtc-jz4740.c275 unsigned long rate) in jz4740_rtc_set_wakeup_params()
290 wakeup_ticks = (min_wakeup_pin_assert_time * rate) / 1000; in jz4740_rtc_set_wakeup_params()
301 reset_ticks = (reset_pin_assert_time * rate) / 1000; in jz4740_rtc_set_wakeup_params()
314 unsigned long rate; in jz4740_rtc_probe() local
372 rate = clk_get_rate(clk); in jz4740_rtc_probe()
373 jz4740_rtc_set_wakeup_params(rtc, np, rate); in jz4740_rtc_probe()
375 /* Each 1 Hz pulse should happen after (rate) ticks */ in jz4740_rtc_probe()
376 jz4740_rtc_reg_write(rtc, JZ_REG_RTC_REGULATOR, rate - 1); in jz4740_rtc_probe()
273 jz4740_rtc_set_wakeup_params(struct jz4740_rtc *rtc, struct device_node *np, unsigned long rate) jz4740_rtc_set_wakeup_params() argument
/kernel/linux/linux-5.10/drivers/spi/
H A Dspi-sh-hspi.c102 u32 rate, best_rate, min, tmp; in hspi_hw_setup() local
111 rate = clk_get_rate(hspi->clk); in hspi_hw_setup()
115 rate /= 128; in hspi_hw_setup()
117 rate /= 16; in hspi_hw_setup()
120 rate /= (((idiv_clk & 0x1F) + 1) * 2); in hspi_hw_setup()
123 tmp = abs(t->speed_hz - rate); in hspi_hw_setup()
127 best_rate = rate; in hspi_hw_setup()

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