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Searched refs:rate (Results 76 - 100 of 129) sorted by relevance

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/device/soc/hisilicon/common/platform/i2s/
H A Di2s_hi35xx.c237 int32_t rate = Hi35xxSampleRateShift(cfg->sampleRate); in Hi35xxI2sSetCfg() local
238 if (rate == HDF_ERR_INVALID_PARAM) { in Hi35xxI2sSetCfg()
242 if (Hi35xxSetCfgAiaoFsclkDiv(&i2sCfg->regCfg100.aiaoFsclkDiv, (cfg->bclk / rate)) != 0) { in Hi35xxI2sSetCfg()
/device/soc/hisilicon/common/platform/wifi/hi3881v100/driver/wal/
H A Dwal_hipriv.c180 /* 设置rts模式:sh hipriv.sh "vap0 alg_cfg ar_rts_mode [0(都不开)|1(都开)|2(rate[0]动态RTS, rate[1..3]
181 都开RTS)|3(rate[0]不开RTS, rate[1..3]都开RTS)]" */
698 功能描述 : 设置描述符参数配置命令 目前仅支持rate设置
712 "data0", "data1", "data2", "data3", "rate", "power", "shortgi" in wal_hipriv_set_tx_dscr_param()
2303 oam_warning_log0(0, OAM_SF_ANY, "{wal_hipriv_set_rate::invalid rate!}\r\n"); in wal_hipriv_set_rate()
2308 set_rate_param->rate = rate_index; in wal_hipriv_set_rate()
5443 oam_warning_log0(0, OAM_SF_ANY, "{wal_set_rate::invalid rate!}\r\n"); in wal_set_rate()
6125 {"al_tx", wal_hipriv_tx_proc}, /* 设置常收模式: al_tx enable [mode] [bw] [freq] [rate] */
6606 wal_is_set_rate_valid(hi_s32 protocol_mode, hi_s32 rate) wal_is_set_rate_valid() argument
7000 wal_set_cal_rate_power(hi_u8 protol, hi_u8 rate, hi_s32 val) wal_set_cal_rate_power() argument
7052 hi_u8 rate; wal_hipriv_set_cal_rate_power() local
7119 hi_u8 rate; wal_hipriv_set_rate_power() local
[all...]
/device/soc/rockchip/common/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd_wifi6/
H A Dwl_iw.c337 calling example: dev_wlc_intvar_set(dev, "arate", rate)
420 calling example: dev_wlc_bufvar_get(dev, "arate", &rate)
450 calling example: dev_wlc_intvar_get(dev, "arate", &rate)
2090 int error, rate, i, error_bg, error_a; in wl_iw_set_rate() local
2101 /* Select maximum rate */ in wl_iw_set_rate()
2102 rate = rateset.rates[rateset.count - 1] & 0x7f; in wl_iw_set_rate()
2104 /* Select rate by rateset index */ in wl_iw_set_rate()
2105 rate = rateset.rates[vwrq->value] & 0x7f; in wl_iw_set_rate()
2107 /* Specified rate in bps */ in wl_iw_set_rate()
2108 rate in wl_iw_set_rate()
2155 int error, rate; wl_iw_get_rate() local
[all...]
/device/soc/rockchip/common/vendor/drivers/phy/
H A Dphy-rockchip-usbdp.c730 /* If changing link rate was required, verify it's supported. */ in rockchip_dp_phy_verify_config()
737 /* valid bit rate */ in rockchip_dp_phy_verify_config()
1038 unsigned long rate; in rk3588_udphy_refclk_set() local
1042 rate = clk_get_rate(udphy->refclk); in rk3588_udphy_refclk_set()
1043 dev_dbg(udphy->dev, "refclk freq %ld\n", rate); in rk3588_udphy_refclk_set()
1045 switch (rate) { in rk3588_udphy_refclk_set()
1062 dev_err(udphy->dev, "unsupported refclk freq %ld\n", rate); in rk3588_udphy_refclk_set()
/device/soc/rockchip/common/sdk_linux/drivers/clk/rockchip/
H A Dclk.h285 .rate = _rate##U, .fbdiv = (_fbdiv), \
293 .rate = _rate##U, \
302 .rate = _rate##U, .nr = (_nr), .nf = (_nf), .no = (_no), .nb = (_nb), \
323 unsigned long rate; member
360 * ROCKCHIP_PLL_SYNC_RATE - check rate parameters to match against the
444 * DDRCLK flags, including method of setting the rate
445 * ROCKCHIP_DDRCLK_SIP: use SIP call to bl31 to change ddrclk rate.
446 * ROCKCHIP_DDRCLK_SCPI: use SCPI APIs to let mcu change ddrclk rate.
750 int rockchip_pll_clk_rate_to_scale(struct clk *clk, unsigned long rate);
/device/soc/rockchip/rk3588/kernel/drivers/phy/rockchip/
H A Dphy-rockchip-usbdp.c779 /* If changing link rate was required, verify it's supported. */ in rockchip_dp_phy_verify_config()
786 /* valid bit rate */ in rockchip_dp_phy_verify_config()
1077 unsigned long rate; in rk3588_udphy_refclk_set() local
1081 rate = clk_get_rate(udphy->refclk); in rk3588_udphy_refclk_set()
1082 dev_dbg(udphy->dev, "refclk freq %ld\n", rate); in rk3588_udphy_refclk_set()
1084 switch (rate) { in rk3588_udphy_refclk_set()
1099 dev_err(udphy->dev, "unsupported refclk freq %ld\n", rate); in rk3588_udphy_refclk_set()
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/component/hdmi/src/mkp/
H A Ddrv_hdmi_frl.h139 hdmi_work_mode rate; member
/device/board/hisilicon/hispark_taurus/audio_drivers/codec/hi3516/src/
H A Dhi3516_codec_ops.c127 codecDaiParamsVal.frequencyVal = param->rate; in Hi3516CodecDaiHwParams()
/device/soc/rockchip/common/vendor/drivers/media/platform/rockchip/ispp/
H A Dcommon.h139 void rkispp_set_clk_rate(struct clk *clk, unsigned long rate);
H A Ddev.c74 void rkispp_set_clk_rate(struct clk *clk, unsigned long rate) in rkispp_set_clk_rate() argument
80 clk_set_rate(clk, rate); in rkispp_set_clk_rate()
/device/soc/rockchip/rk3588/kernel/drivers/media/platform/rockchip/ispp/
H A Dcommon.h144 void rkispp_set_clk_rate(struct clk *clk, unsigned long rate);
H A Ddev.c71 void rkispp_set_clk_rate(struct clk *clk, unsigned long rate) in rkispp_set_clk_rate() argument
76 clk_set_rate(clk, rate); in rkispp_set_clk_rate()
/test/xts/acts/
H A Dbuild.sh123 ./build.sh --product-name $PRODUCT_NAME --gn-args $system_build_params --build-target $BUILD_TARGET --build-target "deploy_testtools" --gn-args is_standard_system=true $MUSL_ARGS --target-cpu $TARGET_ARCH --get-warning-list=false --stat-ccache=true --compute-overlap-rate=false --deps-guard=false $CACHE_ARG --gn-args skip_generate_module_list_file=true
/test/xts/dcts/
H A Dbuild.sh116 ./build.sh --product-name $PRODUCT_NAME --gn-args build_xts=true --build-target $BUILD_TARGET --build-target "deploy_testtools" --gn-args is_standard_system=true $MUSL_ARGS --target-cpu $TARGET_ARCH --get-warning-list=false --stat-ccache=true --compute-overlap-rate=false --deps-guard=false --generate-ninja-trace=false $CACHE_ARG --gn-args skip_generate_module_list_file=true
/test/xts/hats/
H A Dbuild.sh109 ./build.sh --product-name $PRODUCT_NAME --gn-args build_xts=true --build-target $BUILD_TARGET --build-target "deploy_testtools" --gn-args is_standard_system=true $MUSL_ARGS --target-cpu $TARGET_ARCH --get-warning-list=false --stat-ccache=true --compute-overlap-rate=false --deps-guard=false --generate-ninja-trace=false $CACHE_ARG --gn-args skip_generate_module_list_file=true
/device/soc/rockchip/rk3588/kernel/drivers/soc/rockchip/
H A Dopp.h60 * @rate: Frequency in hertz
82 unsigned long rate; member
/device/soc/hisilicon/common/platform/wifi/hi3881v100/driver/mac/common/
H A Dmac_cfg.h363 wlan_legacy_rate_value_enum_uint8 rate; /* 速率值 */ member
719 hi_u8 rate; member
/device/soc/rockchip/common/vendor/drivers/cpufreq/
H A Drockchip-cpufreq.c343 unsigned long old_freq = data->old_opp.rate; in cpu_opp_helper()
344 unsigned long new_freq = data->new_opp.rate; in cpu_opp_helper()
372 dev_err(dev, "%s: failed to set clk rate: %d\n", __func__, ret); in cpu_opp_helper()
/device/qemu/drivers/virtio/
H A Dvirtnet.c609 uint16_t rate; member
628 p->cap.supportedRates = &p->rate; in FakeWalGetHwCapability()
633 p->rate = FAKE_MAGIC_RATE; in FakeWalGetHwCapability()
/test/xts/acts/multimedia_lite/media_lite_posix/recorder_native/src/
H A DActsMediaRecorderTest.cpp902 int32_t rate = 4096; in HWTEST_F() local
905 ret = recorder->SetVideoEncodingBitRate(sourceId, rate); in HWTEST_F()
913 * @tc.name : Set Video Encoding BitRate with invalid rate
920 int32_t rate = 0; in HWTEST_F() local
923 ret = recorder->SetVideoEncodingBitRate(sourceId, rate); in HWTEST_F()
938 int32_t rate = 4096; in HWTEST_F() local
939 int32_t ret = recorder->SetVideoEncodingBitRate(sourceId, rate); in HWTEST_F()
1201 * @tc.name : Set Audio Sample Rate with invalid sample rate
/device/soc/rockchip/common/vendor/drivers/media/platform/rockchip/isp/
H A Dcommon.h199 void rkisp_set_clk_rate(struct clk *clk, unsigned long rate);
H A Ddev.c94 void rkisp_set_clk_rate(struct clk *clk, unsigned long rate) in rkisp_set_clk_rate() argument
100 clk_set_rate(clk, rate); in rkisp_set_clk_rate()
228 v4l2_warn(&dev->v4l2_dev, "No pixel rate control in subdev\n"); in isp_pipeline_s_isp_clk()
232 /* calculate data rate */ in isp_pipeline_s_isp_clk()
250 /* set isp clock rate */ in isp_pipeline_s_isp_clk()
/device/soc/rockchip/rk3588/kernel/drivers/media/platform/rockchip/isp/
H A Dcommon.h211 void rkisp_set_clk_rate(struct clk *clk, unsigned long rate);
/device/soc/rockchip/rk3588/kernel/drivers/cpufreq/
H A Drockchip-cpufreq.c380 unsigned long old_freq = data->old_opp.rate; in cpu_opp_helper()
381 unsigned long new_freq = data->new_opp.rate; in cpu_opp_helper()
394 dev_err(dev, "%s: failed to set clk rate: %lu\n", in cpu_opp_helper()
415 dev_err(dev, "%s: failed to set clk rate: %d\n", __func__, ret); in cpu_opp_helper()
/test/xts/acts/multimedia/audio_ndk/oh_audio_render_test/src/
H A Doh_audio_render_unit_test.cpp573 int32_t rate; in HWTEST() local
574 result = OH_AudioRenderer_GetSamplingRate(audioRenderer, &rate); in HWTEST()
576 EXPECT_TRUE(rate == SAMPLE_RATE_48000); in HWTEST()

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