Home
last modified time | relevance | path

Searched refs:isReg (Results 276 - 300 of 337) sorted by relevance

1...<<11121314

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCCodeEmitter.cpp204 if (MO.isReg()) in getMachineOpValue()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
H A DGCNIterativeScheduler.cpp392 if (Op.isReg() && Op.isDef()) in scheduleRegion()
H A DGCNSchedStrategy.cpp419 if (Op.isReg() && Op.isDef()) in schedule()
H A DGCNRegBankReassign.cpp365 if (!Op.isReg() || Op.isUndef())
H A DSILowerI1Copies.cpp776 if (MO.isReg() && MO.getReg() == AMDGPU::SCC) {
H A DR600InstrInfo.cpp100 if (I->isReg() && !Register::isVirtualRegister(I->getReg()) && I->isUse() && in isLegalToSplitMBBAt()
245 if (!I->isReg() || !I->isUse() || Register::isVirtualRegister(I->getReg())) in readsLDSSrcReg()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
H A DARMCallLowering.cpp521 bool IsDirect = !Info.Callee.isReg(); in lowerCall()
H A DARMConstantIslandPass.cpp2062 if (!MO.isReg() || !MO.getReg()) in preserveBaseRegister()
2081 if (!MO.isReg() || !MO.getReg()) in preserveBaseRegister()
2142 if (!MO.isReg() || !MO.getReg()) in RemoveDeadAddBetweenLEAAndJT()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
H A DMipsRegisterBankInfo.cpp423 if (Op.isReg()) { in getInstrMapping()
H A DMipsBranchExpansion.cpp345 if (!MO.isReg()) { in replaceBranch()
H A DMipsCallLowering.cpp570 Info.Callee.isReg() || IsCalleeGlobalPIC ? Mips::JALRPseudo : Mips::JAL); in lowerCall()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/AsmParser/
H A DX86Operand.h452 bool isReg() const override { return Kind == Register; }
H A DX86AsmParser.cpp1335 if (FinalOp.isReg() && in VerifyAndAdjustOperands()
1336 (!OrigOp.isReg() || FinalOp.getReg() != OrigOp.getReg())) in VerifyAndAdjustOperands()
2757 if (Op1.isReg() && Op2.isReg() && in ParseInstruction()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
H A DX86ATTInstPrinter.cpp356 if (Op.isReg()) { in printOperand()
H A DX86IntelInstPrinter.cpp333 if (Op.isReg()) { in printOperand()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
H A DX86OptimizeLEAs.cpp204 (!MO1.isReg() || !Register::isPhysicalRegister(MO1.getReg())); in isIdenticalOp()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
H A DMachineInstrBuilder.h497 assert(RegOp.isReg() && "Not a register operand"); in getRegState()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/MIRParser/
H A DMIParser.cpp392 assert(Operand.isReg() && Operand.isUse() && in ParsedMachineOperand()
954 if (OpCode == TargetOpcode::DBG_VALUE && MO.isReg()) in parse()
1416 if (!DefOperand.isReg() || !DefOperand.isDef()) in assignRegisterTies()
2656 if (Dest.isReg())
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
H A DMachineScheduler.cpp934 if (!MO.isReg()) in collectVRegUses()
949 if (MO2.isReg() && MO2.isDef() && MO2.getReg() == Reg && !MO2.isDead()) { in collectVRegUses()
1484 if (BaseOp->isReg()) in operator <()
2936 if (Op.isReg() && !Register::isPhysicalRegister(Op.getReg())) { in biasPhysReg()
H A DMachineOutliner.cpp1254 if (!MOP.isReg()) in outline()
H A DTailDuplicator.cpp392 if (!MO.isReg()) in duplicateInstruction()
H A DIfConversion.cpp1953 if (!MO.isReg()) in IfConvertDiamondCommon()
2121 if (!MO.isReg()) in MaySpeculate()
H A DRegisterPressure.cpp500 if (!MO.isReg() || !MO.getReg())
531 if (!MO.isReg() || !MO.getReg())
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/AsmParser/
H A DWebAssemblyAsmParser.cpp95 bool isReg() const override { return false; }
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUInstPrinter.cpp518 if (Op.isReg()) { in printOperand()
1469 if (Op.isReg()) { in printOperand()

Completed in 46 milliseconds

1...<<11121314