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Searched refs:isReg (Results 176 - 200 of 335) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
H A DWebAssemblyPeephole.cpp163 if (!Op2.isReg()) in runOnMachineFunction()
H A DWebAssemblyRegisterInfo.cpp93 if (OtherMO.isReg()) { in eliminateFrameIndex()
H A DWebAssemblyMCInstLower.cpp244 if (MO.isReg()) in lower()
337 if (MO.isReg()) { in removeRegisterOperands()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
H A DBranchFolding.cpp843 if (MO.isReg() && MO.isUndef()) { in mergeOperations()
1848 if (!MO.isReg()) in findHoistingInsertPosAndDeps()
1886 if (!MO.isReg() || MO.isUse()) in findHoistingInsertPosAndDeps()
1914 if (!MO.isReg()) in findHoistingInsertPosAndDeps()
1987 if (!MO.isReg()) in HoistCommonCodeInSuccs()
2037 if (!MO.isReg() || !MO.isUse() || !MO.isKill()) in HoistCommonCodeInSuccs()
2055 if (!MO.isReg() || !MO.isDef() || MO.isDead()) in HoistCommonCodeInSuccs()
H A DLiveIntervals.cpp790 if (!MO.isReg() || MO.getReg() != Reg) in addKillFlags()
990 if (!MO.isReg()) in updateAllRanges()
1076 if (MOP.isReg() && MOP.isUse()) in handleMoveDown()
1377 if (MO->isReg() && !MO->isUse()) in handleMoveUp()
1457 if (MO->isReg() && !MO->isUndef() && in findLastUseBefore()
1525 if (!MO.isReg() || MO.getReg() != Reg) in repairOldRegInRange()
1614 if (MOI->isReg() && Register::isVirtualRegister(MOI->getReg()) && in repairIntervalsInRange()
H A DModuloSchedule.cpp79 if (!Op.isReg() || !Op.isDef()) in expand()
626 if (!MO.isReg() || !MO.isDef() || in generatePhis()
728 if (!MOI->isReg() || !MOI->isDef()) in removeDeadInstructions()
919 if (!BaseOp->isReg()) in computeDelta()
987 if (MO.isReg() && MO.isUse()) in cloneInstr()
1028 if (!MO.isReg() || !Register::isVirtualRegister(MO.getReg())) in updateInstruction()
1321 if (!MO.isReg() || MO.getReg().isPhysical() || MO.isImplicit()) in rewrite()
1563 return MO->isReg() && MO->getReg().isVirtual() && in isRegInLoop()
1679 if (!MO.isReg()) in moveStageBetweenBlocks()
H A DMachineLoopUtils.cpp77 if (MO.isReg() && Remaps.count(MO.getReg())) in PeelSingleBlockLoop()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
H A DRDFGraph.cpp609 assert(Op.isReg()); in isClobbering()
974 assert(Op.isReg() || Op.isRegMask()); in makeRegRef()
975 if (Op.isReg()) in makeRegRef()
1272 if (!Op.isReg() || Op.getReg() == 0 || !Op.isUse() || Op.isUndef()) in buildStmt()
1292 if (!Op.isReg() || !Op.isDef() || Op.isImplicit()) in buildStmt()
1337 if (!Op.isReg() || !Op.isDef() || !Op.isImplicit()) in buildStmt()
1366 if (!Op.isReg() || !Op.isUse()) in buildStmt()
H A DHexagonGenPredicate.cpp355 if (MO.isReg() && MO.isUse()) in isScalarPred()
376 if (!MO.isReg() || !MO.isUse()) in convertToPredForm()
H A DHexagonStoreWidening.cpp124 assert(MO.isReg() && "Expecting register operand"); in getBaseAddressRegister()
162 return MI->getOperand(0).isReg(); in handledStoreType()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/AsmPrinter/
H A DAsmPrinterInlineAsm.cpp499 for (; MI->getOperand(NumDefs).isReg() && MI->getOperand(NumDefs).isDef(); in EmitInlineAsm()
651 if (MO.isReg()) { in PrintAsmOperand()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
H A DAArch64RedundantCopyElimination.cpp184 if (!PredI.getOperand(1).isReg()) in knownRegValInBlock()
407 return !O.isDead() && O.isReg() && O.isDef() && in optimizeBlock()
H A DAArch64DeadRegisterDefinitionsPass.cpp144 if (!MO.isReg() || !MO.isDef()) in processMachineBasicBlock()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DSIMCCodeEmitter.cpp372 if (MO.isReg()) { in getSDWASrcEncoding()
455 if (MO.isReg()) in getMachineOpValue()
H A DR600MCCodeEmitter.cpp175 if (MO.isReg()) { in getMachineOpValue()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
H A DR600MachineScheduler.cpp164 if (MO.isReg() && MO.getReg() == R600::ALU_LITERAL_X) in schedNode()
366 if (MO.isReg() && !MO.isDef() && in AssignSlot()
H A DSIFixupVectorISel.cpp94 if (!WOp->isReg() || !Register::isVirtualRegister(WOp->getReg())) in findSRegBaseAndIndex()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVMCCodeEmitter.cpp145 assert(TPReg.isReg() && TPReg.getReg() == RISCV::X4 && in expandAddTPRel()
220 if (MO.isReg()) in getMachineOpValue()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
H A DX86CallLowering.cpp399 unsigned CallOpc = Info.Callee.isReg() in lowerCall()
450 if (Info.Callee.isReg()) in lowerCall()
H A DX86ExpandPseudo.cpp90 if (Selector.isReg()) in ExpandICallBranchFunnel()
288 assert(DestAddr.isReg() && "Offset should be in register!"); in ExpandMI()
H A DX86EvexToVex.cpp131 if (!MO.isReg()) in usesExtendedRegister()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/
H A DRegBankSelect.cpp240 assert(MO.isReg() && "We should only repair register operand"); in getRepairCost()
470 if (!MO.isReg()) in computeMapping()
730 assert(MO.isReg() && "Trying to repair a non-reg operand"); in RepairingPlacement()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
H A DMicroMipsSizeReduction.cpp287 if (MO.isReg() && ((MO.getReg() == Mips::SP))) in IsSP()
294 if (MO.isReg() && Mips::GPRMM16RegClass.contains(MO.getReg())) in isMMThreeBitGPRegister()
301 if (MO.isReg() && Mips::GPRMM16ZeroRegClass.contains(MO.getReg())) in isMMSourceRegister()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/
H A DLanaiAsmPrinter.cpp134 if (!MO.isReg()) in PrintAsmOperand()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/MCTargetDesc/
H A DNVPTXInstPrinter.cpp87 if (Op.isReg()) { in printOperand()

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