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Searched refs:isReg (Results 151 - 175 of 327) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsELFStreamer.cpp46 if (!Op.isReg()) in EmitInstruction()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
H A DMips16RegisterInfo.cpp109 if ((MI.getNumOperands()> OpNo+2) && MI.getOperand(OpNo+2).isReg()) in eliminateFI()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
H A DSystemZMCInstLower.cpp99 if (!MO.isReg() || !MO.isImplicit()) in lower()
H A DSystemZElimCompare.cpp134 if (MI.getNumOperands() > 0 && MI.getOperand(0).isReg() && in resultTests()
149 if (MO.isReg()) { in getRegReferences()
632 Compare.getOperand(1).isReg() ? Compare.getOperand(1).getReg() : Register(); in fuseCompareOperations()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/VE/InstPrinter/
H A DVEInstPrinter.cpp54 if (MO.isReg()) { in printOperand()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
H A DMachineCombiner.cpp148 if (MO.isReg() && Register::isVirtualRegister(MO.getReg())) in getOperandDef()
179 if (!(MO.isReg() && Register::isVirtualRegister(MO.getReg()))) in getDepth()
234 if (!(MO.isReg() && Register::isVirtualRegister(MO.getReg()))) in getLatency()
H A DMIRVRegNamerUtils.cpp141 if (!MO.isReg() || !Register::isVirtualRegister(MO.getReg())) in renameInstsInMBB()
H A DBranchFolding.cpp843 if (MO.isReg() && MO.isUndef()) { in mergeOperations()
1848 if (!MO.isReg()) in findHoistingInsertPosAndDeps()
1886 if (!MO.isReg() || MO.isUse()) in findHoistingInsertPosAndDeps()
1914 if (!MO.isReg()) in findHoistingInsertPosAndDeps()
1987 if (!MO.isReg()) in HoistCommonCodeInSuccs()
2037 if (!MO.isReg() || !MO.isUse() || !MO.isKill()) in HoistCommonCodeInSuccs()
2055 if (!MO.isReg() || !MO.isDef() || MO.isDead()) in HoistCommonCodeInSuccs()
H A DLiveIntervals.cpp790 if (!MO.isReg() || MO.getReg() != Reg) in addKillFlags()
990 if (!MO.isReg()) in updateAllRanges()
1076 if (MOP.isReg() && MOP.isUse()) in handleMoveDown()
1377 if (MO->isReg() && !MO->isUse()) in handleMoveUp()
1457 if (MO->isReg() && !MO->isUndef() && in findLastUseBefore()
1525 if (!MO.isReg() || MO.getReg() != Reg) in repairOldRegInRange()
1614 if (MOI->isReg() && Register::isVirtualRegister(MOI->getReg()) && in repairIntervalsInRange()
H A DModuloSchedule.cpp79 if (!Op.isReg() || !Op.isDef()) in expand()
626 if (!MO.isReg() || !MO.isDef() || in generatePhis()
728 if (!MOI->isReg() || !MOI->isDef()) in removeDeadInstructions()
919 if (!BaseOp->isReg()) in computeDelta()
987 if (MO.isReg() && MO.isUse()) in cloneInstr()
1028 if (!MO.isReg() || !Register::isVirtualRegister(MO.getReg())) in updateInstruction()
1321 if (!MO.isReg() || MO.getReg().isPhysical() || MO.isImplicit()) in rewrite()
1563 return MO->isReg() && MO->getReg().isVirtual() && in isRegInLoop()
1679 if (!MO.isReg()) in moveStageBetweenBlocks()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
H A DX86CmovConversion.cpp439 if (!MO.isReg() || !MO.isUse()) in checkForProfitableCmovCandidates()
459 if (!MO.isReg() || !MO.isDef()) in checkForProfitableCmovCandidates()
784 if (!MOp.isReg()) in convertCmovInstsToBranches()
H A DX86MCInstLower.cpp294 assert(Inst.getOperand(0).isReg() && in SimplifyShortImmForm()
296 ((Inst.getNumOperands() == 3 && Inst.getOperand(1).isReg() && in SimplifyShortImmForm()
349 bool IsStore = Inst.getOperand(0).isReg() && Inst.getOperand(1).isReg(); in SimplifyShortMoveForm()
354 Inst.getNumOperands() == 6 && Inst.getOperand(RegOp).isReg() && in SimplifyShortMoveForm()
355 Inst.getOperand(AddrBase + X86::AddrBaseReg).isReg() && in SimplifyShortMoveForm()
357 Inst.getOperand(AddrBase + X86::AddrIndexReg).isReg() && in SimplifyShortMoveForm()
358 Inst.getOperand(AddrBase + X86::AddrSegmentReg).isReg() && in SimplifyShortMoveForm()
1467 assert(Op->isReg() && "Only support arguments in registers"); in LowerPATCHABLE_EVENT_CALL()
1565 assert(Op->isReg() in LowerPATCHABLE_TYPED_EVENT_CALL()
[all...]
H A DX86FloatingPoint.cpp316 assert(MO.isReg() && "Expected an FP register!"); in getFPReg()
451 if (MO.isReg() && MO.isDead()) in processBasicBlock()
984 if (!Op.isReg() || Op.getReg() < X86::FP0 || Op.getReg() > X86::FP6) in handleCall()
1025 if (!Op.isReg() || Op.getReg() < X86::FP0 || Op.getReg() > X86::FP6) in handleReturn()
1539 if (!MO.isReg()) in handleSpecialFP()
1608 if (!Op.isReg() || Op.getReg() < X86::FP0 || Op.getReg() > X86::FP6) in handleSpecialFP()
1637 if (!Op.isReg() || Op.getReg() < X86::FP0 || Op.getReg() > X86::FP6) in handleSpecialFP()
1703 if (!MO.isReg()) in setKillFlags()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp162 if (!MO.isReg() || !MO.isDef() || MO.isImplicit()) in getInstrLatency()
1348 if (UseMI.getOperand(UseIdx).isReg() && in FoldImmediate()
1571 if (MO.isReg()) {
2138 assert(MI.getOperand(2).isReg() &&
2150 assert(MI.getOperand(2).isReg() && MI.getOperand(1).isReg() &&
2158 assert(MI.getOperand(2).isReg() && MI.getOperand(1).isReg() &&
2256 assert(MI.getOperand(OpNo).isReg() && "Operand must be a REG");
2336 if (!MI.getOperand(i).isReg())
[all...]
H A DPPCAsmPrinter.cpp255 if (!MI->getOperand(OpNo).isReg() || in PrintAsmOperand()
257 !MI->getOperand(OpNo+1).isReg()) in PrintAsmOperand()
268 if(!MI->getOperand(OpNo).isReg()) in PrintAsmOperand()
319 assert(MI->getOperand(OpNo).isReg()); in PrintAsmMemoryOperand()
325 assert(MI->getOperand(OpNo).isReg()); in PrintAsmMemoryOperand()
486 assert(MI->getOperand(0).isReg() && in EmitTlsCall()
490 assert(MI->getOperand(1).isReg() && in EmitTlsCall()
549 if (MO.isReg()) { in EmitInstruction()
H A DPPCCTRLoops.cpp116 if (MO.isReg()) { in clobbersCTR()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.cpp993 if (!MI.getOperand(1).isReg())
1071 assert(MO.isReg() &&
1643 assert(MI.getDesc().getNumOperands() == 3 && MI.getOperand(0).isReg() && in isFPRCopy()
1934 assert((MI.getOperand(1).isReg() || MI.getOperand(1).isFI()) && in isCandidateToMergeOrPair()
1942 if (MI.getOperand(1).isReg()) { in isCandidateToMergeOrPair()
1999 if ((!LdSt.getOperand(1).isReg() && !LdSt.getOperand(1).isFI()) || in getMemOperandWithOffsetWidth()
2004 if (!LdSt.getOperand(1).isReg() || in getMemOperandWithOffsetWidth()
2005 (!LdSt.getOperand(2).isReg() && !LdSt.getOperand(2).isFI()) || in getMemOperandWithOffsetWidth()
2032 if (!BaseOp->isReg() && !BaseOp->isFI()) in getMemOperandWithOffsetWidth()
2374 assert((BaseOp1.isReg() || BaseOp in shouldClusterMemOps()
[all...]
H A DAArch64CallLowering.cpp808 unsigned Opc = getCallOpcode(F, Info.Callee.isReg(), true); in lowerTailCall()
881 if (!Use.isReg()) in lowerTailCall()
910 if (Info.Callee.isReg()) in lowerTailCall()
968 unsigned Opc = getCallOpcode(F, Info.Callee.isReg(), false); in lowerCall()
996 if (Info.Callee.isReg()) in lowerCall()
H A DAArch64StackTaggingPreRA.cpp180 if (UseI->getOperand(OpIdx).isReg() && in uncheckUsesOf()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
H A DHexagonEarlyIfConv.cpp386 if (!MO.isReg() || !MO.isDef()) in isValidCandidate()
403 if (!MO.isReg() || !MO.isUse()) in usesUndefVReg()
474 assert(RA.isReg() && RB.isReg()); in computePhiCost()
493 if (!MO.isReg() || !MO.isDef()) in countPredicateDefs()
H A DRDFGraph.cpp609 assert(Op.isReg()); in isClobbering()
974 assert(Op.isReg() || Op.isRegMask()); in makeRegRef()
975 if (Op.isReg()) in makeRegRef()
1272 if (!Op.isReg() || Op.getReg() == 0 || !Op.isUse() || Op.isUndef()) in buildStmt()
1292 if (!Op.isReg() || !Op.isDef() || Op.isImplicit()) in buildStmt()
1337 if (!Op.isReg() || !Op.isDef() || !Op.isImplicit()) in buildStmt()
1366 if (!Op.isReg() || !Op.isUse()) in buildStmt()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/
H A DNVPTXReplaceImageHandles.cpp137 assert(Op.isReg() && "Handle is not in a reg?"); in findIndexForHandle()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/MCTargetDesc/
H A DWebAssemblyMCCodeEmitter.cpp86 if (MO.isReg()) { in encodeInstruction()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
H A DWebAssemblyPeephole.cpp163 if (!Op2.isReg()) in runOnMachineFunction()
H A DWebAssemblyRegisterInfo.cpp93 if (OtherMO.isReg()) { in eliminateFrameIndex()

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