Home
last modified time | relevance | path

Searched refs:isKill (Results 26 - 50 of 138) sorted by relevance

123456

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
H A DTargetInstrInfo.cpp180 bool Reg1IsKill = MI.getOperand(Idx1).isKill(); in commuteInstructionImpl()
181 bool Reg2IsKill = MI.getOperand(Idx2).isKill(); in commuteInstructionImpl()
614 storeRegToStackSlot(*MBB, Pos, MO.getReg(), MO.isKill(), FI, RC, TRI); in foldMemoryOperand()
833 bool KillA = OpA.isKill(); in reassociateOps()
834 bool KillX = OpX.isKill(); in reassociateOps()
835 bool KillY = OpY.isKill(); in reassociateOps()
H A DCriticalAntiDepBreaker.cpp112 // FIXME: It may be possible to remove the isKill() restriction once PR18663 in Observe()
115 if (MI.isDebugInstr() || MI.isKill()) in Observe()
256 assert(!MI.isKill() && "Attempting to scan a kill instruction"); in ScanInstruction()
544 // FIXME: It may be possible to remove the isKill() restriction once PR18663 in BreakAntiDependencies()
547 if (MI.isDebugInstr() || MI.isKill()) in BreakAntiDependencies()
H A DMachineInstr.cpp643 if (Check == CheckKillDead && MO.isKill() != OMO.isKill()) in isIdenticalTo()
942 /// the search criteria to a use that kills the register if isKill is true.
944 Register Reg, bool isKill, const TargetRegisterInfo *TRI) const { in findRegisterUseOperandIdx()
953 if (!isKill || MO.isKill()) in findRegisterUseOperandIdx()
1810 if (MO.isKill())
1819 } else if (hasAliases && MO.isKill() && Register::isPhysicalRegister(Reg)) {
1856 if (!MO.isReg() || !MO.isUse() || !MO.isKill())
943 findRegisterUseOperandIdx( Register Reg, bool isKill, const TargetRegisterInfo *TRI) const findRegisterUseOperandIdx() argument
H A DLiveRangeEdit.cpp247 if (LI.Query(Idx).isKill()) in useIsKill()
253 if ((S.LaneMask & LaneMask).any() && S.Query(Idx).isKill()) in useIsKill()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
H A DThumb1FrameLowering.cpp855 bool isKill = !MRI.isLiveIn(Reg); in spillCalleeSavedRegisters() local
856 if (isKill && !MRI.isReserved(Reg)) in spillCalleeSavedRegisters()
859 MIB.addReg(Reg, getKillRegState(isKill)); in spillCalleeSavedRegisters()
899 bool isKill = !MRI.isLiveIn(*HiRegToSave); in spillCalleeSavedRegisters() local
900 if (isKill && !MRI.isReserved(*HiRegToSave)) in spillCalleeSavedRegisters()
906 .addReg(*HiRegToSave, getKillRegState(isKill)) in spillCalleeSavedRegisters()
H A DARMLoadStoreOptimizer.cpp868 bool IsKill = MO.isKill(); in MergeOpsUpdate()
962 if (!MO.isReg() || !MO.isKill()) in MergeOpsUpdate()
1272 bool BaseKill = BaseOP.isKill(); in MergeBaseUpdateLSMultiple()
1398 bool BaseKill = getLoadStoreBaseOp(*MI).isKill(); in MergeBaseUpdateLoadStore()
1453 getKillRegState(MO.isKill()))) in MergeBaseUpdateLoadStore()
1491 .addReg(MO.getReg(), getKillRegState(MO.isKill())) in MergeBaseUpdateLoadStore()
1500 .addReg(MO.getReg(), getKillRegState(MO.isKill())) in MergeBaseUpdateLoadStore()
1685 MI->getOperand(0).isDead() : MI->getOperand(0).isKill();
1688 MI->getOperand(1).isDead() : MI->getOperand(1).isKill();
1690 bool BaseKill = BaseOp.isKill();
[all...]
H A DThumb2InstrInfo.cpp136 unsigned SrcReg, bool isKill, int FI, in storeRegToStackSlot()
150 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()
168 AddDReg(MIB, SrcReg, ARM::gsub_0, getKillRegState(isKill), TRI); in storeRegToStackSlot()
174 ARMBaseInstrInfo::storeRegToStackSlot(MBB, I, SrcReg, isKill, FI, RC, TRI); in storeRegToStackSlot()
135 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned SrcReg, bool isKill, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const storeRegToStackSlot() argument
H A DThumb2SizeReduction.cpp522 if (!MI->getOperand(0).isKill()) in ReduceLoadStore()
562 OffsetKill = MI->getOperand(2).isKill(); in ReduceLoadStore()
727 if (MI->getOperand(0).isKill()) in ReduceSpecial()
995 if (MO.isKill()) { in UpdateCPSRUse()
1094 if (MO && !MO->isKill()) in ReduceMBB()
H A DMLxExpansionPass.cpp277 bool Src1Kill = MI->getOperand(2).isKill(); in ExpandFPMLxInstruction()
278 bool Src2Kill = MI->getOperand(3).isKill(); in ExpandFPMLxInstruction()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
H A DMipsSEFrameLowering.cpp193 .addReg(Src, getKillRegState(I->getOperand(0).isKill())); in expandStoreCCond()
235 unsigned SrcKill = getKillRegState(I->getOperand(0).isKill()); in expandStoreACC()
267 unsigned SrcKill = getKillRegState(I->getOperand(1).isKill()); in expandCopyACC()
326 TII.storeRegToStack(MBB, I, LoReg, I->getOperand(1).isKill(), FI, RC, in expandBuildPairF64()
328 TII.storeRegToStack(MBB, I, HiReg, I->getOperand(2).isKill(), FI, RC, in expandBuildPairF64()
390 TII.storeRegToStack(MBB, I, SrcReg, Op1.isKill(), FI, RC, &RegInfo, 0); in expandExtractElementF64()
H A DMips16InstrInfo.h57 unsigned SrcReg, bool isKill, int FrameIndex,
H A DMipsSEInstrInfo.h51 unsigned SrcReg, bool isKill, int FrameIndex,
H A DMipsSEInstrInfo.cpp246 unsigned SrcReg, bool isKill, int FI, in storeRegToStack()
314 BuildMI(MBB, I, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill)) in storeRegToStack()
739 LoInst.addReg(SrcLo.getReg(), getKillRegState(SrcLo.isKill())); in expandPseudoMTLoHi()
740 HiInst.addReg(SrcHi.getReg(), getKillRegState(SrcHi.isKill())); in expandPseudoMTLoHi()
750 unsigned KillSrc = getKillRegState(Src.isKill()); in expandCvtFPInt()
245 storeRegToStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned SrcReg, bool isKill, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, int64_t Offset) const storeRegToStack() argument
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
H A DAVRInstrInfo.h79 bool isKill, int FrameIndex,
H A DAVRInstrInfo.cpp122 unsigned SrcReg, bool isKill, in storeRegToStackSlot()
155 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()
120 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const storeRegToStackSlot() argument
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
H A DPPCQPXLoadSplat.cpp153 if (!MI->getOperand(1).isKill()) in runOnMachineFunction()
H A DPPCInstrInfo.h116 void StoreRegToStackSlot(MachineFunction &MF, unsigned SrcReg, bool isKill,
288 unsigned SrcReg, bool isKill, int FrameIndex,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
H A DAArch64A57FPLoadBalancing.cpp557 if (U.isKill()) in colorChain()
644 if (MI->getOperand(3).isKill()) { in scanInstruction()
690 if (MO.isKill() && ActiveChains.find(MO.getReg()) != ActiveChains.end()) { in maybeKillChain()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
H A DLiveVariables.h218 if (MO.isReg() && MO.isKill() && MO.getReg() == reg) { in removeVirtualRegisterKilled()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
H A DSystemZInstrInfo.cpp79 unsigned Reg128Killed = getKillRegState(LowRegOp.isKill()); in splitMove()
163 SystemZ::LR, 32, MI.getOperand(1).isKill(), in expandRIEPseudo()
202 Size, MI.getOperand(1).isKill(), MI.getOperand(1).isUndef()); in expandZExtPseudo()
873 bool isKill, int FrameIdx, const TargetRegisterClass *RC, in storeRegToStackSlot()
882 .addReg(SrcReg, getKillRegState(isKill)), in storeRegToStackSlot()
983 .addReg(Src.getReg(), getKillRegState(Src.isKill()), in convertToThreeAddress()
992 if (Op.isReg() && Op.isKill()) in convertToThreeAddress()
871 storeRegToStackSlot( MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const storeRegToStackSlot() argument
/third_party/mesa3d/src/amd/compiler/
H A Daco_live_var_analysis.cpp39 if (!def.isTemp() || def.isKill()) in get_live_changes()
61 if (def.isKill()) in get_temp_registers()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/
H A DARCInstrInfo.cpp295 unsigned SrcReg, bool isKill, in storeRegToStackSlot()
316 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()
293 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const storeRegToStackSlot() argument
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
H A DHexagonStoreWidening.cpp436 .addReg(MR.getReg(), getKillRegState(MR.isKill()), MR.getSubReg()) in createWideStores()
459 .addReg(MR.getReg(), getKillRegState(MR.isKill()), MR.getSubReg()) in createWideStores()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
H A DX86InstrInfo.h225 bool &isKill, MachineOperand &ImplicitOp,
319 bool isKill, int FrameIndex,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/
H A DXCoreInstrInfo.cpp360 unsigned SrcReg, bool isKill, in storeRegToStackSlot()
375 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()
358 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const storeRegToStackSlot() argument

Completed in 32 milliseconds

123456