| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| H A D | AVRFrameLowering.cpp | 328 bool SrcIsKill = MI.getOperand(2).isKill(); in fixStackStores()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| H A D | HexagonBlockRanges.cpp | 326 bool IsKill = Op.isKill(); in computeInitialLiveRanges()
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| H A D | HexagonExpandCondsets.cpp | 950 if (!MS.isKill()) in predicate()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.cpp | 700 MI.getOperand(1).isKill()); in tryOptimizeLEAtoMOV()
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| H A D | X86FixupLEAs.cpp | 644 bool BIK = Base.isKill() && BaseReg != IndexReg; in processInstrForSlow3OpLEA()
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| H A D | X86FloatingPoint.cpp | 1030 (Op.isKill() || // Marked kill. in handleReturn()
1615 if (Op.isUse() && Op.isKill()) in handleSpecialFP()
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| H A D | X86FlagsCopyLowering.cpp | 597 if (FlagUse->isKill()) in runOnMachineFunction()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| H A D | LiveInterval.h | 111 bool isKill() const { in isKill() function in llvm::LiveQueryResult
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| H A D | MachineInstrBuilder.h | 499 getKillRegState(RegOp.isKill()) | getDeadRegState(RegOp.isDead()) | in getRegState()
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| H A D | TargetInstrInfo.h | 973 /// machine basic block before the specified machine instruction. If isKill
977 unsigned SrcReg, bool isKill, int FrameIndex, in storeRegToStackSlot()
975 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const storeRegToStackSlot() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 1052 unsigned SrcReg, bool isKill, in storeRegToStackSlot()
1086 .addReg(SrcReg, getKillRegState(isKill)) // data in storeRegToStackSlot()
1109 MIB.addReg(SrcReg, getKillRegState(isKill)) // data in storeRegToStackSlot()
1656 bool IsKill = RegOp.isKill(); in swapRegAndNonRegOperand()
2051 CondReg.setIsKill(OrigCond.isKill()); in preserveCondRegFlags()
2104 CondReg.setIsKill(Cond[1].isKill()); in insertBranch()
2412 Src0->setIsKill(Src1->isKill()); in FoldImmediate()
3061 Use.setIsKill(Orig.isKill());
4116 bool Src0Kill = Src0.isKill();
4121 Src0.ChangeToRegister(Src1.getReg(), false, false, Src1.isKill());
1050 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const storeRegToStackSlot() argument
[all...] |
| H A D | SIShrinkInstructions.cpp | 263 if (!Op.isKill()) in shrinkMIMG()
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| H A D | GCNHazardRecognizer.cpp | 319 CurrCycleInstr->isKill()) in AdvanceCycle()
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| H A D | SIInstrInfo.h | 223 bool isKill, int FrameIndex,
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| /third_party/mesa3d/src/amd/compiler/ |
| H A D | aco_ir.h | 830 * instruction's definitions. Unlike isKill() and isFirstKill(), this is
843 constexpr bool isKill() const noexcept { return isKill_ || isFirstKill(); }
856 constexpr bool isKillBeforeDef() const noexcept { return isKill() && !isLateKill(); }
961 constexpr bool isKill() const noexcept { return isKill_; }
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| H A D | ARMExpandPseudoInsts.cpp | 625 bool SrcIsKill = MI.getOperand(OpIdx).isKill(); in ExpandVST()
715 getKillRegState(MO.isKill())); in ExpandLaneOp()
762 bool SrcIsKill = MI.getOperand(OpIdx).isKill(); in ExpandVTBL()
1625 bool SrcIsKill = MI.getOperand(OpIdx).isKill(); in ExpandMI()
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| H A D | ARMLowOverheadLoops.cpp | 789 if (!MO.isReg() || !MO.isKill()) in ExpandLoopStart()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| H A D | MachineCSE.cpp | 397 if (MI->isPosition() || MI->isPHI() || MI->isImplicitDef() || MI->isKill() || in isCSECandidate()
677 ImplicitDef, /*isKill=*/true, TRI)) in ProcessBlockCSE()
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| H A D | BranchFolding.cpp | 2022 if (MO.isKill() && Uses.count(Reg)) in HoistCommonCodeInSuccs()
2037 if (!MO.isReg() || !MO.isUse() || !MO.isKill()) in HoistCommonCodeInSuccs()
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| H A D | RegisterCoalescer.cpp | 688 // merge, unset the isKill marker given the live range has been extended. in adjustCopiesBackFrom()
835 if (NewReg != IntB.reg || !IntB.Query(AValNo->def).isKill()) in removeCopyByCommutingDef()
2689 if (OtherLRQ.isKill() && OtherLRQ.endPoint() <= VNI->def) in analyzeValue()
2731 if (OtherLRQ.isKill()) { in analyzeValue()
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| H A D | MachineBasicBlock.cpp | 909 !OI->isUse() || !OI->isKill() || OI->isUndef())
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| H A D | MachineTraceMetrics.cpp | 721 } else if (MO.isKill())
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyRegStackify.cpp | 301 if (!Result.isKill()) in hasOneUse()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| H A D | PPCMIPeephole.cpp | 919 if (SrcMI->getOperand(1).isKill()) { in simplifyCode()
947 if (SrcMI->getOperand(1).isKill()) { in simplifyCode()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 1177 TII.storeRegToStackSlot(*BB, MI, SrcReg, MI.getOperand(2).isKill(), FI, SrcRC, in emitSplitF64Pseudo()
1213 .addReg(LoReg, getKillRegState(MI.getOperand(1).isKill())) in emitBuildPairF64Pseudo()
1218 .addReg(HiReg, getKillRegState(MI.getOperand(2).isKill())) in emitBuildPairF64Pseudo()
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