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Searched refs:instr (Results 201 - 225 of 844) sorted by relevance

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/third_party/mesa3d/src/gallium/drivers/r600/sfn/
H A Dsfn_shader_cs.cpp39 bool ComputeShader::do_scan_instruction(UNUSED nir_instr *instr) in do_scan_instruction() argument
61 bool ComputeShader::process_stage_intrinsic(nir_intrinsic_instr *instr) in process_stage_intrinsic() argument
63 switch (instr->intrinsic) { in process_stage_intrinsic()
65 return emit_load_3vec(instr, m_local_invocation_id); in process_stage_intrinsic()
67 return emit_load_3vec(instr, m_workgroup_id); in process_stage_intrinsic()
69 return emit_load_num_workgroups(instr); in process_stage_intrinsic()
90 bool ComputeShader::emit_load_num_workgroups(nir_intrinsic_instr* instr) in emit_load_num_workgroups() argument
96 auto dest = value_factory().dest_vec4(instr->dest, pin_group); in emit_load_num_workgroups()
110 bool ComputeShader::emit_load_3vec(nir_intrinsic_instr* instr, const std::array<PRegister,3>& src) in emit_load_3vec() argument
115 auto dest = vf.dest(instr in emit_load_3vec()
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H A Dsfn_nir_lower_tex.cpp35 b->cursor = nir_before_instr(&tex->instr); in lower_coord_shift_normalized()
54 nir_instr_rewrite_src(&tex->instr, &tex->src[coord_index].src, in lower_coord_shift_normalized()
61 b->cursor = nir_before_instr(&tex->instr); in lower_coord_shift_unnormalized()
73 nir_instr_rewrite_src(&tex->instr, &tex->src[coord_index].src, in lower_coord_shift_unnormalized()
86 nir_foreach_instr_safe(instr, block) { in r600_nir_lower_int_tg4_impl()
87 if (instr->type == nir_instr_type_tex) { in r600_nir_lower_int_tg4_impl()
88 nir_tex_instr *tex = nir_instr_as_tex(instr); in r600_nir_lower_int_tg4_impl()
146 b->cursor = nir_before_instr(&tex->instr); in lower_txl_txf_array_or_cube()
203 nir_foreach_instr_safe(instr, block) { in r600_nir_lower_txl_txf_array_or_cube_impl()
204 if (instr in r600_nir_lower_txl_txf_array_or_cube_impl()
229 r600_nir_lower_cube_to_2darray_filer(const nir_instr *instr, const void *_options) r600_nir_lower_cube_to_2darray_filer() argument
253 r600_nir_lower_cube_to_2darray_impl(nir_builder *b, nir_instr *instr, void *_options) r600_nir_lower_cube_to_2darray_impl() argument
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H A Dsfn_nir_vectorize_vs_inputs.c76 r600_instr_can_rewrite(nir_instr *instr) in r600_instr_can_rewrite() argument
78 if (instr->type != nir_instr_type_intrinsic) in r600_instr_can_rewrite()
81 nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr); in r600_instr_can_rewrite()
129 r600_vec_instr_stack_push(struct util_dynarray *stack, nir_instr *instr) in r600_vec_instr_stack_push() argument
131 util_dynarray_append(stack, nir_instr *, instr); in r600_vec_instr_stack_push()
145 b->cursor = nir_before_instr(&intr->instr); in r600_create_new_load()
151 nir_ssa_dest_init(&new_intr->instr, &new_intr->dest, num_comps, in r600_create_new_load()
164 nir_builder_instr_insert(b, &new_intr->instr); in r600_create_new_load()
172 nir_instr_remove(&intr->instr); in r600_create_new_load()
178 nir_instr *instr, in r600_vec_instr_stack_pop()
177 r600_vec_instr_stack_pop(nir_builder *b, struct util_dynarray *stack, nir_instr *instr, nir_variable *updated_vars[16][4]) r600_vec_instr_stack_pop() argument
229 r600_hash_instr(const nir_instr *instr) r600_hash_instr() argument
264 r600_vec_instr_set_add(struct set *instr_set, nir_instr *instr) r600_vec_instr_set_add() argument
288 r600_vec_instr_set_remove(nir_builder *b, struct set *instr_set, nir_instr *instr, nir_variable *updated_vars[16][4]) r600_vec_instr_set_remove() argument
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/third_party/mesa3d/src/microsoft/compiler/
H A Ddxil_nir.c121 b->cursor = nir_before_instr(&intr->instr); in lower_load_deref()
172 nir_instr_remove(&intr->instr); in lower_load_deref()
268 b->cursor = nir_before_instr(&intr->instr); in lower_load_ssbo()
316 nir_instr_remove(&intr->instr); in lower_load_ssbo()
323 b->cursor = nir_before_instr(&intr->instr); in lower_store_ssbo()
409 nir_builder_instr_insert(b, &store->instr); in lower_store_ssbo()
417 nir_instr_remove(&intr->instr); in lower_store_ssbo()
430 nir_ssa_dest_init(&load->instr, &load->dest, 1, 32, NULL); in lower_load_vec32()
431 nir_builder_instr_insert(b, &load->instr); in lower_load_vec32()
444 b->cursor = nir_before_instr(&intr->instr); in lower_32b_offset_load()
1172 dxil_nir_split_clip_cull_distance_instr(nir_builder *b, nir_instr *instr, void *cb_data) dxil_nir_split_clip_cull_distance_instr() argument
1292 dxil_nir_lower_double_math_instr(nir_builder *b, nir_instr *instr, UNUSED void *cb_data) dxil_nir_lower_double_math_instr() argument
1363 lower_system_value_to_zero_filter(const nir_instr* instr, const void* cb_state) lower_system_value_to_zero_filter() argument
1400 lower_system_value_to_zero_instr(nir_builder* b, nir_instr* instr, void* _state) lower_system_value_to_zero_instr() argument
1433 lower_system_values_impl(nir_builder *b, nir_instr *instr, void *_state) lower_system_values_impl() argument
1472 redirect_sampler_derefs(struct nir_builder *b, nir_instr *instr, void *data) redirect_sampler_derefs() argument
1565 redirect_texture_derefs(struct nir_builder *b, nir_instr *instr, void *data) redirect_texture_derefs() argument
1663 lower_bool_input_filter(const nir_instr *instr, UNUSED const void *_options) lower_bool_input_filter() argument
1684 lower_bool_input_impl(nir_builder *b, nir_instr *instr, UNUSED void *_options) lower_bool_input_impl() argument
1711 lower_sysval_to_load_input_impl(nir_builder *b, nir_instr *instr, void *data) lower_sysval_to_load_input_impl() argument
1907 is_fquantize2f16(const nir_instr *instr, const void *data) is_fquantize2f16() argument
1917 lower_fquantize2f16(struct nir_builder *b, nir_instr *instr, void *data) lower_fquantize2f16() argument
1973 fix_io_uint_deref_types(struct nir_builder *builder, nir_instr *instr, void *data) fix_io_uint_deref_types() argument
2041 remove_after_discard(struct nir_builder *builder, nir_instr *instr, void *cb_data) remove_after_discard() argument
2067 lower_kill(struct nir_builder *builder, nir_instr *instr, void *_cb_data) lower_kill() argument
2111 update_writes(struct nir_builder *b, nir_instr *instr, void *_state) update_writes() argument
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/third_party/node/deps/v8/src/codegen/loong64/
H A Dassembler-loong64.cc246 Register Assembler::GetRkReg(Instr instr) { in GetRkReg() argument
247 return Register::from_code((instr & kRkFieldMask) >> kRkShift); in GetRkReg()
250 Register Assembler::GetRjReg(Instr instr) { in GetRjReg() argument
251 return Register::from_code((instr & kRjFieldMask) >> kRjShift); in GetRjReg()
254 Register Assembler::GetRdReg(Instr instr) { in GetRdReg() argument
255 return Register::from_code((instr & kRdFieldMask) >> kRdShift); in GetRdReg()
258 uint32_t Assembler::GetRk(Instr instr) { in GetRk() argument
259 return (instr & kRkFieldMask) >> kRkShift; in GetRk()
262 uint32_t Assembler::GetRkField(Instr instr) { return instr argument
264 GetRj(Instr instr) GetRj() argument
268 GetRjField(Instr instr) GetRjField() argument
270 GetRd(Instr instr) GetRd() argument
274 GetRdField(Instr instr) GetRdField() argument
276 GetSa2(Instr instr) GetSa2() argument
280 GetSa2Field(Instr instr) GetSa2Field() argument
282 GetSa3(Instr instr) GetSa3() argument
286 GetSa3Field(Instr instr) GetSa3Field() argument
307 IsBranch(Instr instr) IsBranch() argument
317 IsB(Instr instr) IsB() argument
324 IsBz(Instr instr) IsBz() argument
331 IsEmittedConstant(Instr instr) IsEmittedConstant() argument
337 IsJ(Instr instr) IsJ() argument
343 IsLu12i_w(Instr instr) IsLu12i_w() argument
348 IsOri(Instr instr) IsOri() argument
353 IsLu32i_d(Instr instr) IsLu32i_d() argument
358 IsLu52i_d(Instr instr) IsLu52i_d() argument
363 IsMov(Instr instr, Register rd, Register rj) IsMov() argument
370 IsPcAddi(Instr instr, Register rd, int32_t si20) IsPcAddi() argument
376 IsNop(Instr instr, unsigned int type) IsNop() argument
386 GetOffsetOfBranch(Instr instr, Assembler::OffsetSize bits) GetOffsetOfBranch() argument
408 OffsetSizeInBits(Instr instr) OffsetSizeInBits() argument
419 AddBranchOffset(int pos, Instr instr) AddBranchOffset() argument
449 Instr instr = instr_at(pos); target_at() local
485 SetBranchOffset(int32_t pos, int32_t target_pos, Instr instr) SetBranchOffset() argument
520 Instr instr = instr_at(pos); target_at_put() local
545 Instr instr = instr_at(l.pos()); print() local
575 Instr instr = instr_at(fixup_pos); bind_to() local
640 BranchOffset(Instr instr) BranchOffset() argument
681 Instr instr = opcode | (si21 & kImm16Mask) << kRkShift | GenB() local
691 Instr instr = opcode | (si21 & kImm16Mask) << kRkShift | (sc << kRjShift) | GenB() local
699 Instr instr = GenB() local
707 Instr instr = opcode | ((si16 & kImm16Mask) << kRkShift) | GenBJ() local
715 Instr instr = opcode | cond << kCondShift | (fk.code() << kFkShift) | GenCmp() local
723 Instr instr = opcode | ca << kCondShift | (fk.code() << kFkShift) | GenSel() local
731 Instr instr = 0; GenRegister() local
737 Instr instr = opcode | (fj.code() << kFjShift) | fd.code(); GenRegister() local
744 Instr instr = opcode | (rj.code() << kRjShift) | fd.code(); GenRegister() local
751 Instr instr = opcode | (fj.code() << kFjShift) | rd.code(); GenRegister() local
757 Instr instr = opcode | (rj.code() << kRjShift) | fd.code(); GenRegister() local
763 Instr instr = opcode | (fj.code() << kFjShift) | rd.code(); GenRegister() local
769 Instr instr = opcode | (fj.code() << kFjShift) | cd; GenRegister() local
775 Instr instr = opcode | cj << kFjShift | fd.code(); GenRegister() local
781 Instr instr = opcode | (rj.code() << kRjShift) | cd; GenRegister() local
787 Instr instr = opcode | cj << kFjShift | rd.code(); GenRegister() local
793 Instr instr = GenRegister() local
800 Instr instr = GenRegister() local
807 Instr instr = opcode | (fa.code() << kFaShift) | (fk.code() << kFkShift) | GenRegister() local
814 Instr instr = GenRegister() local
822 Instr instr = opcode | (bit3 & 0x7) << kSaShift | (rk.code() << kRkShift) | GenImm() local
830 Instr instr = opcode | (bit6m & 0x3f) << 16 | (bit6l & 0x3f) << kRkShift | GenImm() local
837 Instr instr = opcode | (bit20 & 0xfffff) << kRjShift | rd.code(); GenImm() local
843 Instr instr = opcode | (bit15 & 0x7fff); GenImm() local
859 Instr instr = opcode | imm << kRkShift | (rj.code() << kRjShift) | rd.code(); GenImm() local
866 Instr instr = opcode | ((bit12 & kImm12Mask) << kRkShift) | GenImm() local
2101 Instr instr = instr_at(pc); RelocateRelativeReference() local
2325 Instr instr = instr_at(pc); set_target_value_at() local
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/third_party/mesa3d/src/freedreno/afuc/
H A Dparser.y53 static struct asm_instruction *instr; /* current instruction */
58 instr = next_instr(tok);
64 instr->dst = num;
70 instr->src1 = num;
76 instr->src2 = num;
82 instr->immed = num;
83 instr->has_immed = true;
89 instr->shift = num;
90 instr->has_shift = true;
96 instr
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/third_party/mesa3d/src/freedreno/ir3/
H A Dir3_ra.c757 struct ir3_instruction *instr = dst->instr; in check_dst_overlap() local
759 ra_foreach_dst (other_dst, instr) { in check_dst_overlap()
1055 bool dst_inserted[reg->instr->dsts_count]; in compress_regs_left()
1076 ra_foreach_dst_n (other_dst, n, reg->instr) { in compress_regs_left()
1278 ra_foreach_dst (dst, reg->instr) { in compress_regs_left()
1404 if (is_sfu(reg->instr) || is_alu(reg->instr)) { in get_reg()
1405 for (unsigned i = 0; i < reg->instr->srcs_count; i++) { in get_reg()
1406 struct ir3_register *src = reg->instr in get_reg()
1453 assign_reg(struct ir3_instruction *instr, struct ir3_register *reg, unsigned num) assign_reg() argument
1563 assign_src(struct ra_ctx *ctx, struct ir3_instruction *instr, struct ir3_register *src) assign_src() argument
1588 insert_parallel_copy_instr(struct ra_ctx *ctx, struct ir3_instruction *instr) insert_parallel_copy_instr() argument
1625 handle_normal_instr(struct ra_ctx *ctx, struct ir3_instruction *instr) handle_normal_instr() argument
1659 handle_split(struct ra_ctx *ctx, struct ir3_instruction *instr) handle_split() argument
1680 handle_collect(struct ra_ctx *ctx, struct ir3_instruction *instr) handle_collect() argument
1781 handle_pcopy(struct ra_ctx *ctx, struct ir3_instruction *instr) handle_pcopy() argument
1795 handle_precolored_input(struct ra_ctx *ctx, struct ir3_instruction *instr) handle_precolored_input() argument
1813 handle_input(struct ra_ctx *ctx, struct ir3_instruction *instr) handle_input() argument
1826 assign_input(struct ra_ctx *ctx, struct ir3_instruction *instr) assign_input() argument
1887 handle_chmask(struct ra_ctx *ctx, struct ir3_instruction *instr) handle_chmask() argument
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H A Dir3_nir_lower_64b.c34 lower_64b_intrinsics_filter(const nir_instr *instr, const void *unused) in lower_64b_intrinsics_filter() argument
38 if (instr->type != nir_instr_type_intrinsic) in lower_64b_intrinsics_filter()
41 nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr); in lower_64b_intrinsics_filter()
57 lower_64b_intrinsics(nir_builder *b, nir_instr *instr, void *unused) in lower_64b_intrinsics() argument
61 nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr); in lower_64b_intrinsics()
92 nir_instr_as_intrinsic(nir_instr_clone(b->shader, &intr->instr)); in lower_64b_intrinsics()
99 nir_builder_instr_insert(b, &store->instr); in lower_64b_intrinsics()
145 nir_instr_as_intrinsic(nir_instr_clone(b->shader, &intr->instr)); in lower_64b_intrinsics()
149 nir_ssa_dest_init(&load->instr, &load->dest, 2, 32, NULL); in lower_64b_intrinsics()
150 nir_builder_instr_insert(b, &load->instr); in lower_64b_intrinsics()
182 lower_64b_undef(nir_builder *b, nir_instr *instr, void *unused) lower_64b_undef() argument
202 lower_64b_undef_filter(const nir_instr *instr, const void *unused) lower_64b_undef_filter() argument
224 lower_64b_global_filter(const nir_instr *instr, const void *unused) lower_64b_global_filter() argument
253 lower_64b_global(nir_builder *b, nir_instr *instr, void *unused) lower_64b_global() argument
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H A Dir3_nir_opt_preamble.c115 instr_cost(nir_instr *instr, const void *data) in instr_cost() argument
125 switch (instr->type) { in instr_cost()
127 nir_alu_instr *alu = nir_instr_as_alu(instr); in instr_cost()
177 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr); in instr_cost()
250 avoid_instr(const nir_instr *instr, const void *data) in avoid_instr() argument
252 if (instr->type != nir_instr_type_intrinsic) in avoid_instr()
255 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr); in avoid_instr()
320 nir_foreach_instr_safe (instr, block) { in ir3_nir_lower_preamble()
321 if (instr->type != nir_instr_type_intrinsic) in ir3_nir_lower_preamble()
324 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr); in ir3_nir_lower_preamble()
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H A Dir3_image.c98 ir3_get_image_coords(const nir_intrinsic_instr *instr, unsigned *flagsp) in ir3_get_image_coords() argument
100 enum glsl_sampler_dim dim = nir_intrinsic_image_dim(instr); in ir3_get_image_coords()
101 unsigned coords = nir_image_intrinsic_coord_components(instr); in ir3_get_image_coords()
104 if (dim == GLSL_SAMPLER_DIM_CUBE || nir_intrinsic_image_array(instr)) in ir3_get_image_coords()
116 ir3_get_type_for_image_intrinsic(const nir_intrinsic_instr *instr) in ir3_get_type_for_image_intrinsic() argument
118 const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic]; in ir3_get_type_for_image_intrinsic()
119 int bit_size = info->has_dest ? nir_dest_bit_size(instr->dest) : nir_src_bit_size(instr->src[3]); in ir3_get_type_for_image_intrinsic()
122 switch (instr->intrinsic) { in ir3_get_type_for_image_intrinsic()
125 type = nir_alu_type_get_base_type(nir_intrinsic_dest_type(instr)); in ir3_get_type_for_image_intrinsic()
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/third_party/mesa3d/src/compiler/nir/
H A Dnir_lower_regs_to_ssa.c47 nir_instr *instr = src->parent_instr; in rewrite_src()
54 if (instr->type == nir_instr_type_phi) { in rewrite_src()
58 block = instr->block; in rewrite_src()
62 nir_instr_rewrite_src(instr, src, nir_src_for_ssa(def)); in rewrite_src()
91 nir_instr *instr = dest->reg.parent_instr; in rewrite_dest()
98 nir_ssa_dest_init(instr, dest, reg->num_components, in rewrite_dest()
101 nir_phi_builder_value_set_block_def(value, instr->block, &dest->ssa); in rewrite_dest()
109 nir_foreach_src(&alu->instr, rewrite_src, state); in rewrite_alu_instr()
181 nir_ssa_dest_init(&alu->instr, &alu->dest.dest, num_components, in rewrite_alu_instr()
189 nir_phi_builder_value_get_block_def(value, alu->instr in rewrite_alu_instr()
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H A Dnir_opt_vectorize.c71 const nir_instr *instr = (nir_instr *) data; in hash_instr() local
72 assert(instr->type == nir_instr_type_alu); in hash_instr()
73 nir_alu_instr *alu = nir_instr_as_alu(instr); in hash_instr()
81 instr->pass_flags); in hash_instr()
138 instr_can_rewrite(nir_instr *instr) in instr_can_rewrite() argument
140 switch (instr->type) { in instr_can_rewrite()
142 nir_alu_instr *alu = nir_instr_as_alu(instr); in instr_can_rewrite()
152 if (alu->dest.dest.ssa.num_components >= instr->pass_flags) in instr_can_rewrite()
164 uint32_t mask = ~(instr->pass_flags - 1); in instr_can_rewrite()
209 nir_ssa_dest_init(&new_alu->instr, in instr_try_combine()
335 vec_instr_set_add_or_rewrite(struct set *instr_set, nir_instr *instr, nir_vectorize_cb filter, void *data) vec_instr_set_add_or_rewrite() argument
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H A Dnir_deref.c106 nir_deref_instr_remove_if_unused(nir_deref_instr *instr) in nir_deref_instr_remove_if_unused() argument
110 for (nir_deref_instr *d = instr; d; d = nir_deref_instr_parent(d)) { in nir_deref_instr_remove_if_unused()
116 nir_instr_remove(&d->instr); in nir_deref_instr_remove_if_unused()
124 nir_deref_instr_has_indirect(nir_deref_instr *instr) in nir_deref_instr_has_indirect() argument
126 while (instr->deref_type != nir_deref_type_var) { in nir_deref_instr_has_indirect()
128 if (instr->deref_type == nir_deref_type_cast) in nir_deref_instr_has_indirect()
131 if ((instr->deref_type == nir_deref_type_array || in nir_deref_instr_has_indirect()
132 instr->deref_type == nir_deref_type_ptr_as_array) && in nir_deref_instr_has_indirect()
133 !nir_src_is_const(instr->arr.index)) in nir_deref_instr_has_indirect()
136 instr in nir_deref_instr_has_indirect()
143 nir_deref_instr_is_known_out_of_bounds(nir_deref_instr *instr) nir_deref_instr_is_known_out_of_bounds() argument
945 is_deref_ptr_as_array(nir_instr *instr) is_deref_ptr_as_array() argument
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H A Dnir_lower_alu.c43 lower_alu_instr(nir_alu_instr *instr, nir_builder *b) in lower_alu_instr() argument
47 assert(instr->dest.dest.is_ssa); in lower_alu_instr()
49 b->cursor = nir_before_instr(&instr->instr); in lower_alu_instr()
50 b->exact = instr->exact; in lower_alu_instr()
52 switch (instr->op) { in lower_alu_instr()
69 lowered = nir_ssa_for_alu_src(b, instr, 0); in lower_alu_instr()
112 lowered = nir_ssa_for_alu_src(b, instr, 0); in lower_alu_instr()
136 nir_ssa_def *src0 = nir_ssa_for_alu_src(b, instr, 0); in lower_alu_instr()
137 nir_ssa_def *src1 = nir_ssa_for_alu_src(b, instr, in lower_alu_instr()
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H A Dnir_lower_multiview.c52 nir_foreach_instr(instr, block) { in shader_writes_to_memory()
53 if (instr->type != nir_instr_type_intrinsic) in shader_writes_to_memory()
55 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr); in shader_writes_to_memory()
137 nir_foreach_instr(instr, block) { in nir_shader_uses_view_index()
138 if (instr->type != nir_instr_type_intrinsic) in nir_shader_uses_view_index()
141 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr); in nir_shader_uses_view_index()
158 nir_foreach_instr_safe(instr, block) { in shader_only_position_uses_view_index()
159 if (instr->type != nir_instr_type_intrinsic) in shader_only_position_uses_view_index()
162 nir_intrinsic_instr *store = nir_instr_as_intrinsic(instr); in shader_only_position_uses_view_index()
170 nir_instr_remove(&store->instr); in shader_only_position_uses_view_index()
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H A Dnir_opt_memcpy.c49 nir_instr_rewrite_src(&cpy->instr, deref_src, in opt_memcpy_deref_cast()
67 nir_instr_rewrite_src(&cpy->instr, deref_src, in opt_memcpy_deref_cast()
134 nir_instr_remove(&cpy->instr); in try_lower_memcpy()
143 nir_instr_remove(&cpy->instr); in try_lower_memcpy()
151 b->cursor = nir_instr_remove(&cpy->instr); in try_lower_memcpy()
165 b->cursor = nir_instr_remove(&cpy->instr); in try_lower_memcpy()
187 b->cursor = nir_instr_remove(&cpy->instr); in try_lower_memcpy()
207 b->cursor = nir_instr_remove(&cpy->instr); in try_lower_memcpy()
219 b->cursor = nir_instr_remove(&cpy->instr); in try_lower_memcpy()
242 nir_foreach_instr(instr, bloc in opt_memcpy_impl()
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/third_party/mesa3d/src/gallium/drivers/vc4/
H A Dvc4_program.c269 ntq_get_alu_src(struct vc4_compile *c, nir_alu_instr *instr, in ntq_get_alu_src() argument
272 assert(util_is_power_of_two_or_zero(instr->dest.write_mask)); in ntq_get_alu_src()
273 unsigned chan = ffs(instr->dest.write_mask) - 1; in ntq_get_alu_src()
274 struct qreg r = ntq_get_src(c, instr->src[src].src, in ntq_get_alu_src()
275 instr->src[src].swizzle[chan]); in ntq_get_alu_src()
277 assert(!instr->src[src].abs); in ntq_get_alu_src()
278 assert(!instr->src[src].negate); in ntq_get_alu_src()
352 ntq_emit_txf(struct vc4_compile *c, nir_tex_instr *instr) in ntq_emit_txf() argument
359 unsigned unit = instr->texture_index; in ntq_emit_txf()
367 assert(instr in ntq_emit_txf()
396 ntq_emit_tex(struct vc4_compile *c, nir_tex_instr *instr) ntq_emit_tex() argument
823 ntq_emit_pack_unorm_4x8(struct vc4_compile *c, nir_alu_instr *instr) ntq_emit_pack_unorm_4x8() argument
995 ntq_emit_bcsel(struct vc4_compile *c, nir_alu_instr *instr, struct qreg *src) ntq_emit_bcsel() argument
1057 ntq_emit_alu(struct vc4_compile *c, nir_alu_instr *instr) ntq_emit_alu() argument
1654 ntq_emit_load_const(struct vc4_compile *c, nir_load_const_instr *instr) ntq_emit_load_const() argument
1664 ntq_emit_ssa_undef(struct vc4_compile *c, nir_ssa_undef_instr *instr) ntq_emit_ssa_undef() argument
1676 ntq_emit_color_read(struct vc4_compile *c, nir_intrinsic_instr *instr) ntq_emit_color_read() argument
1696 ntq_emit_load_input(struct vc4_compile *c, nir_intrinsic_instr *instr) ntq_emit_load_input() argument
1716 ntq_emit_intrinsic(struct vc4_compile *c, nir_intrinsic_instr *instr) ntq_emit_intrinsic() argument
1990 ntq_emit_instr(struct vc4_compile *c, nir_instr *instr) ntq_emit_instr() argument
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/third_party/mesa3d/src/gallium/frontends/lavapipe/
H A Dlvp_lower_vulkan_resource.c30 lower_vulkan_resource_index(const nir_instr *instr, const void *data_cb) in lower_vulkan_resource_index() argument
32 if (instr->type == nir_instr_type_intrinsic) { in lower_vulkan_resource_index()
33 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr); in lower_vulkan_resource_index()
60 if (instr->type == nir_instr_type_tex) { in lower_vulkan_resource_index()
67 lower_uniform_block_access(const nir_instr *instr, const void *data_cb) in lower_uniform_block_access() argument
69 if (instr->type != nir_instr_type_intrinsic) in lower_uniform_block_access()
72 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr); in lower_uniform_block_access()
80 lower_block_instr(nir_builder *b, nir_instr *instr, void *data_cb) in lower_block_instr() argument
82 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr); in lower_block_instr()
100 b->cursor = nir_before_instr(instr); in lower_block_instr()
109 lower_vri_intrin_vri(struct nir_builder *b, nir_instr *instr, void *data_cb) lower_vri_intrin_vri() argument
151 lower_vri_intrin_vrri(struct nir_builder *b, nir_instr *instr, void *data_cb) lower_vri_intrin_vrri() argument
161 lower_vri_intrin_lvd(struct nir_builder *b, nir_instr *instr, void *data_cb) lower_vri_intrin_lvd() argument
294 lower_vri_instr(struct nir_builder *b, nir_instr *instr, void *data_cb) lower_vri_instr() argument
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/third_party/spirv-tools/test/opt/
H A Dpropagator_test.cpp107 const auto visit_fn = [this](Instruction* instr, BasicBlock** dest_bb) { in TEST_F()
109 if (instr->opcode() == spv::Op::OpStore) { in TEST_F()
110 uint32_t lhs_id = instr->GetSingleWordOperand(0); in TEST_F()
111 uint32_t rhs_id = instr->GetSingleWordOperand(1); in TEST_F()
174 const auto visit_fn = [this, &phi_instr](Instruction* instr, in TEST_F()
177 if (instr->opcode() == spv::Op::OpLoad) { in TEST_F()
178 uint32_t rhs_id = instr->GetSingleWordOperand(2); in TEST_F()
182 values_[instr->result_id()] = val; in TEST_F()
185 } else if (instr->opcode() == spv::Op::OpPhi) { in TEST_F()
186 phi_instr = instr; in TEST_F()
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/third_party/mesa3d/src/gallium/drivers/lima/ir/gp/
H A Dnir.c171 nir_alu_instr *instr = nir_instr_as_alu(ni); in gpir_emit_alu() local
179 if (instr->op == nir_op_mov) { in gpir_emit_alu()
180 gpir_node *child = gpir_node_find(block, &instr->src[0].src, in gpir_emit_alu()
181 instr->src[0].swizzle[0]); in gpir_emit_alu()
182 register_node(block, child, &instr->dest.dest); in gpir_emit_alu()
186 int op = nir_to_gpir_opcodes[instr->op]; in gpir_emit_alu()
189 gpir_error("unsupported nir_op: %s\n", nir_op_infos[instr->op].name); in gpir_emit_alu()
197 unsigned num_child = nir_op_infos[instr->op].num_inputs; in gpir_emit_alu()
202 nir_alu_src *src = instr->src + i; in gpir_emit_alu()
212 register_node(block, &node->node, &instr in gpir_emit_alu()
253 nir_intrinsic_instr *instr = nir_instr_as_intrinsic(ni); gpir_emit_intrinsic() local
298 nir_load_const_instr *instr = nir_instr_as_load_const(ni); gpir_emit_load_const() local
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/third_party/mesa3d/src/amd/compiler/
H A Daco_scheduler.cpp210 aco_ptr<Instruction>& instr = block->instructions[cursor.source_idx];
212 for (const Definition& def : instr->definitions)
219 for (const Operand& op : instr->operands) {
227 for (const Operand& op : instr->operands) {
243 const RegisterDemand candidate_diff = get_live_changes(instr);
248 const RegisterDemand temp = get_temp_registers(instr);
284 aco_ptr<Instruction>& instr = block->instructions[cursor.source_idx]; in downwards_skip() local
286 for (const Operand& op : instr->operands) { in downwards_skip()
337 aco_ptr<Instruction>& instr = block->instructions[cursor.source_idx];
338 for (const Operand& op : instr
161 assert(source_idx < insert_idx_clause); assert(insert_idx_clause < insert_idx); RegisterDemand reference_demand; for (int i = source_idx + 1; i < insert_idx_clause; ++i) { reference_demand.update(register_demand[i]); } assert(total_demand == reference_demand); reference_demand = {}; for (int i = insert_idx_clause; i < insert_idx; ++i) { reference_demand.update(register_demand[i]); } assert(clause_demand == reference_demand); } DownwardsCursor MoveState::downwards_init(int current_idx, bool improved_rar_, bool may_form_clauses) { improved_rar = improved_rar_; std::fill(depends_on.begin(), depends_on.end(), false); if (improved_rar) { std::fill(RAR_dependencies.begin(), RAR_dependencies.end(), false); if (may_form_clauses) std::fill(RAR_dependencies_clause.begin(), RAR_dependencies_clause.end(), false); } for (const Operand& op : current->operands) { if (op.isTemp()) { depends_on[op.tempId()] = true; if (improved_rar && op.isFirstKill()) RAR_dependencies[op.tempId()] = true; } } DownwardsCursor cursor(current_idx, register_demand[current_idx]); cursor.verify_invariants(register_demand); return cursor; } MoveResult MoveState::downwards_move(DownwardsCursor& cursor, bool add_to_clause) { aco_ptr<Instruction>& instr = block->instructions[cursor.source_idx]; for (const Definition& def : instr->definitions) if (def.isTemp() && depends_on[def.tempId()]) return move_fail_ssa; std::vector<bool>& RAR_deps = improved_rar ? (add_to_clause ? RAR_dependencies_clause : RAR_dependencies) : depends_on; for (const Operand& op : instr->operands) verify_invariants() argument
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/third_party/node/deps/v8/src/codegen/arm64/
H A Dassembler-arm64-inl.h30 Instruction* instr = reinterpret_cast<Instruction*>(pc_); in apply() local
31 if (instr->IsBranchAndLink() || instr->IsUnconditionalBranch()) { in apply()
33 reinterpret_cast<Address>(instr->ImmPCOffsetTarget()); in apply()
35 instr->SetBranchImmTarget(reinterpret_cast<Instruction*>(new_target)); in apply()
467 Instruction* instr = reinterpret_cast<Instruction*>(pc); in target_pointer_address_at() local
468 DCHECK(instr->IsLdrLiteralX() || instr->IsLdrLiteralW()); in target_pointer_address_at()
469 return reinterpret_cast<Address>(instr->ImmPCOffsetTarget()); in target_pointer_address_at()
474 Instruction* instr in target_address_at() local
485 Instruction* instr = reinterpret_cast<Instruction*>(pc); target_compressed_address_at() local
491 Instruction* instr = reinterpret_cast<Instruction*>(pc); code_target_object_handle_at() local
505 Instruction* instr = reinterpret_cast<Instruction*>(pc); embedded_object_index_referenced_from() local
517 Instruction* instr = reinterpret_cast<Instruction*>(pc); set_embedded_object_index_referenced_from() local
534 Instruction* instr = reinterpret_cast<Instruction*>(pc); runtime_entry_at() local
544 Instruction* instr = reinterpret_cast<Instruction*>(location); deserialization_special_target_size() local
556 Instruction* instr = reinterpret_cast<Instruction*>(location); deserialization_set_special_target_at() local
584 Instruction* instr = reinterpret_cast<Instruction*>(pc); set_target_address_at() local
609 Instruction* instr = reinterpret_cast<Instruction*>(pc); set_target_compressed_address_at() local
618 Instruction* instr = reinterpret_cast<Instruction*>(pc_); target_address_size() local
631 Instruction* instr = reinterpret_cast<Instruction*>(pc_); target_address_address() local
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/third_party/node/deps/v8/src/execution/mips64/
H A Dsimulator-mips64.h80 inline Instruction* instr() const { return instr_; } in instr() function in v8::internal::SimInstructionBase
85 explicit SimInstructionBase(Instruction* instr) {} in SimInstructionBase() argument
99 explicit SimInstruction(Instruction* instr) { *this = instr; } in SimInstruction() argument
101 SimInstruction& operator=(Instruction* instr) { in operator =() argument
102 operand_ = *reinterpret_cast<const int32_t*>(instr); in operator =()
103 instr_ = instr; in operator =()
352 void Format(Instruction* instr, const char* format);
385 inline uint16_t ReadHU(int64_t addr, Instruction* instr);
386 inline int16_t ReadH(int64_t addr, Instruction* instr);
563 BranchDelayInstructionDecode(Instruction* instr) BranchDelayInstructionDecode() argument
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/third_party/python/Lib/test/
H A Dtest_peepholer.py25 for instr in dis.get_instructions(f):
26 if instr.opname == opname:
40 targets = {instr.offset: instr for instr in instructions}
41 for instr in instructions:
42 if 'JUMP_' not in instr.opname:
44 tgt = targets[instr.argval]
47 self.fail(f'{instr.opname} at {instr
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/third_party/node/deps/v8/src/compiler/backend/
H A Dregister-allocator-verifier.cc17 size_t OperandCount(const Instruction* instr) { in OperandCount() argument
18 return instr->InputCount() + instr->OutputCount() + instr->TempCount(); in OperandCount()
21 void VerifyEmptyGaps(const Instruction* instr) { in VerifyEmptyGaps() argument
26 CHECK_NULL(instr->GetParallelMove(inner_pos)); in VerifyEmptyGaps()
30 void VerifyAllocatedGaps(const Instruction* instr, const char* caller_info) { in VerifyAllocatedGaps() argument
35 const ParallelMove* moves = instr->GetParallelMove(inner_pos); in VerifyAllocatedGaps()
76 for (const Instruction* instr : sequence->instructions()) { in RegisterAllocatorVerifier()
78 VerifyEmptyGaps(instr); in RegisterAllocatorVerifier()
135 const Instruction* instr = instr_constraint.instruction_; VerifyAssignment() local
561 const Instruction* instr = instr_constraint.instruction_; VerifyGapMoves() local
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