Home
last modified time | relevance | path

Searched refs:instr (Results 1051 - 1075 of 1221) sorted by relevance

1...<<414243444546474849

/kernel/linux/linux-5.10/drivers/media/pci/cx88/
H A Dcx88-core.c383 static const char * const instr[16] = { in cx88_risc_decode() local
411 instr[risc >> 28] ? instr[risc >> 28] : "INVALID"); in cx88_risc_decode()
/kernel/linux/linux-6.6/drivers/media/pci/cx88/
H A Dcx88-core.c385 static const char * const instr[16] = { in cx88_risc_decode() local
413 instr[risc >> 28] ? instr[risc >> 28] : "INVALID"); in cx88_risc_decode()
/third_party/mesa3d/src/compiler/glsl/
H A Dgl_nir_linker.c876 nir_foreach_instr(instr, block) { in validate_sampler_array_indexing()
878 if (instr->type == nir_instr_type_tex) { in validate_sampler_array_indexing()
879 nir_tex_instr *tex_instr = nir_instr_as_tex(instr); in validate_sampler_array_indexing()
/third_party/node/deps/v8/src/compiler/backend/
H A Dinstruction-selector.h307 void AddInstruction(Instruction* instr);
308 void AddTerminator(Instruction* instr);
344 Instruction* Emit(Instruction* instr);
H A Dinstruction.h1733 int AddInstruction(Instruction* instr);
1816 RpoNumber InputRpo(Instruction* instr, size_t index);
1818 bool GetSourcePosition(const Instruction* instr,
1820 void SetSourcePosition(const Instruction* instr, SourcePosition value);
1823 for (Instruction* instr : instructions_) { in ContainsCall()
1824 if (instr->IsCall()) return true; in ContainsCall()
/kernel/linux/linux-5.10/drivers/mtd/nand/raw/
H A Dsunxi_nand.c1784 const struct nand_op_instr *instr = &subop->instrs[i]; in sunxi_nfc_exec_subop() local
1786 switch (instr->type) { in sunxi_nfc_exec_subop()
1793 extcmd |= instr->ctx.cmd.opcode; in sunxi_nfc_exec_subop()
1796 NFC_CMD(instr->ctx.cmd.opcode); in sunxi_nfc_exec_subop()
1804 u32 addr = instr->ctx.addr.addrs[j + start]; in sunxi_nfc_exec_subop()
1821 if (instr->type == NAND_OP_DATA_OUT_INSTR) { in sunxi_nfc_exec_subop()
1824 instr->ctx.data.buf.out + start, in sunxi_nfc_exec_subop()
1827 inbuf = instr->ctx.data.buf.in + start; in sunxi_nfc_exec_subop()
/third_party/mesa3d/src/amd/compiler/tests/
H A Dtest_optimizer.cpp701 tmp.instr->vop3().clamp = true;
709 tmp.instr->vop3().clamp = true;
992 tmp3.instr->dpp16().neg[0] = true;
1000 res4.instr->vop3().neg[0] = true;
1008 res5.instr->vop3().clamp = true;
1014 tmp6.instr->dpp16().neg[0] = true;
1016 res6.instr->vop3().abs[0] = true;
1023 res7.instr->vop3().abs[0] = true;
/third_party/node/deps/v8/src/codegen/arm64/
H A Dassembler-arm64.h321 static bool IsConstantPoolAt(Instruction* instr);
322 static int ConstantPoolSizeAt(Instruction* instr);
2102 ptrdiff_t InstructionOffset(Instruction* instr) const {
2103 return reinterpret_cast<byte*>(instr) - buffer_start_;
2347 Instr instr;
2348 instr = ((imm8 >> 5) & 7) << ImmNEONabc_offset;
2349 instr |= (imm8 & 0x1f) << ImmNEONdefgh_offset;
2350 return instr;
/third_party/mesa3d/src/gallium/drivers/zink/nir_to_spirv/
H A Dnir_to_spirv.c1802 alu_instr_src_components(const nir_alu_instr *instr, unsigned src) in alu_instr_src_components() argument
1804 if (nir_op_infos[instr->op].input_sizes[src] > 0) in alu_instr_src_components()
1805 return nir_op_infos[instr->op].input_sizes[src]; in alu_instr_src_components()
1807 if (instr->dest.dest.is_ssa) in alu_instr_src_components()
1808 return instr->dest.dest.ssa.num_components; in alu_instr_src_components()
1810 return instr->dest.dest.reg.reg->num_components; in alu_instr_src_components()
2806 /* pad to 2 components: the upcoming is_sparse_texels_resident instr will always use the in extract_sparse_load()
2960 /* this will always be stored with the ssa index of the parent instr */ in emit_is_sparse_texels_resident()
3850 nir_foreach_instr(instr, block) { in emit_block()
3851 switch (instr in emit_block()
[all...]
/third_party/mesa3d/src/gallium/frontends/nine/
H A Dnine_state.c59 int (* func)(struct NineDevice9 *This, struct csmt_instruction *instr);
95 struct csmt_instruction *instr; in nine_csmt_worker() local
106 (instr = (struct csmt_instruction *)nine_queue_get(ctx->pool))) { in nine_csmt_worker()
109 if (instr->func(ctx->device, instr)) { in nine_csmt_worker()
178 nop_func( struct NineDevice9 *This, struct csmt_instruction *instr ) in nop_func()
181 (void) instr; in nop_func()
191 struct csmt_instruction* instr; in nine_csmt_process() local
203 instr = nine_queue_alloc(ctx->pool, sizeof(struct csmt_instruction)); in nine_csmt_process()
204 assert(instr); in nine_csmt_process()
229 struct csmt_instruction* instr; nine_csmt_destroy() local
[all...]
/third_party/mesa3d/src/amd/vulkan/
H A Dradv_meta_blit2d.c476 nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex"); in build_nir_texel_fetch()
477 nir_builder_instr_insert(b, &tex->instr); in build_nir_texel_fetch()
512 nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex"); in build_nir_buffer_fetch()
513 nir_builder_instr_insert(b, &tex->instr); in build_nir_buffer_fetch()
H A Dradv_meta_etc_decode.c228 nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex"); in build_shader()
229 nir_builder_instr_insert(&b, &tex->instr); in build_shader()
249 nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex"); in build_shader()
250 nir_builder_instr_insert(&b, &tex->instr); in build_shader()
H A Dradv_meta_resolve_fs.c293 nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex"); in build_depth_stencil_resolve_fragment_shader()
294 nir_builder_instr_insert(&b, &tex->instr); in build_depth_stencil_resolve_fragment_shader()
313 nir_ssa_dest_init(&tex_add->instr, &tex_add->dest, 4, 32, "tex"); in build_depth_stencil_resolve_fragment_shader()
314 nir_builder_instr_insert(&b, &tex_add->instr); in build_depth_stencil_resolve_fragment_shader()
H A Dradv_meta_resolve_cs.c172 nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex"); in build_depth_stencil_resolve_compute_shader()
173 nir_builder_instr_insert(&b, &tex->instr); in build_depth_stencil_resolve_compute_shader()
192 nir_ssa_dest_init(&tex_add->instr, &tex_add->dest, 4, 32, "tex"); in build_depth_stencil_resolve_compute_shader()
193 nir_builder_instr_insert(&b, &tex_add->instr); in build_depth_stencil_resolve_compute_shader()
/third_party/mesa3d/src/broadcom/compiler/
H A Dv3d_compiler.h1170 void v3d33_vir_emit_tex(struct v3d_compile *c, nir_tex_instr *instr);
1171 void v3d40_vir_emit_tex(struct v3d_compile *c, nir_tex_instr *instr);
1173 nir_intrinsic_instr *instr);
1186 v3d_get_op_for_atomic_add(nir_intrinsic_instr *instr, unsigned src);
/third_party/mesa3d/src/gallium/drivers/d3d12/
H A Dd3d12_blit.cpp690 nir_ssa_dest_init(&txs->instr, &txs->dest, 2, 32, "tex"); in get_stencil_resolve_fs()
691 nir_builder_instr_insert(&b, &txs->instr); in get_stencil_resolve_fs()
718 nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex"); in get_stencil_resolve_fs()
719 nir_builder_instr_insert(&b, &tex->instr); in get_stencil_resolve_fs()
H A Dd3d12_compiler.cpp263 nir_foreach_instr(instr, block) { in missing_dual_src_outputs()
264 if (instr->type != nir_instr_type_intrinsic) in missing_dual_src_outputs()
267 nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr); in missing_dual_src_outputs()
1296 nir_foreach_instr(instr, block) { in scan_texture_use()
1297 if (instr->type == nir_instr_type_tex) { in scan_texture_use()
1298 auto tex = nir_instr_as_tex(instr); in scan_texture_use()
/kernel/linux/linux-6.6/drivers/gpu/drm/panel/
H A Dpanel-ilitek-ili9881c.c893 const struct ili9881c_instr *instr = &ctx->desc->init[i]; in ili9881c_prepare() local
895 if (instr->op == ILI9881C_SWITCH_PAGE) in ili9881c_prepare()
896 ret = ili9881c_switch_page(ctx, instr->arg.page); in ili9881c_prepare()
897 else if (instr->op == ILI9881C_COMMAND) in ili9881c_prepare()
898 ret = ili9881c_send_cmd_data(ctx, instr->arg.cmd.cmd, in ili9881c_prepare()
899 instr->arg.cmd.data); in ili9881c_prepare()
/third_party/node/deps/v8/src/codegen/mips64/
H A Dconstants-mips64.h1690 static bool IsForbiddenAfterBranchInstr(Instr instr);
1953 bool InstructionGetters<T>::IsForbiddenAfterBranchInstr(Instr instr) {
1954 Opcode opcode = static_cast<Opcode>(instr & kOpcodeMask);
1974 switch (instr & kRtFieldMask) {
1985 switch (instr & kFunctionFieldMask) {
1994 switch (instr & kRsFieldMask) {
/third_party/node/deps/v8/src/codegen/mips/
H A Dconstants-mips.h1618 static bool IsForbiddenAfterBranchInstr(Instr instr);
1856 bool InstructionGetters<T>::IsForbiddenAfterBranchInstr(Instr instr) {
1857 Opcode opcode = static_cast<Opcode>(instr & kOpcodeMask);
1877 switch (instr & kRtFieldMask) {
1888 switch (instr & kFunctionFieldMask) {
1897 switch (instr & kRsFieldMask) {
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
H A DAMDILCFGStructurizer.cpp82 #define SHOWNEWINSTR(i) LLVM_DEBUG(dbgs() << "New instr: " << *i << "\n");
601 MachineInstr *instr = &(*It); in getLastDebugLocInBB() local
602 if (instr->getDebugLoc()) in getLastDebugLocInBB()
603 DL = instr->getDebugLoc(); in getLastDebugLocInBB()
636 MachineInstr *instr = &(*It); in getReturnInstr() local
637 if (instr->getOpcode() == R600::RETURN) in getReturnInstr()
638 return instr; in getReturnInstr()
650 << " is return block without RETURN instr\n";); in isReturnBlock()
732 // Remove unconditional branch instr. in prepare()
1486 // insertEnd to ensure phi-moves, if exist, go before the continue-instr in settleLoopcontBlock()
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/
H A DNVPTXAsmPrinter.cpp638 if (const Instruction *instr = dyn_cast<Instruction>(U)) { in usedInOneFunc()
639 if (instr->getParent() && instr->getParent()->getParent()) { in usedInOneFunc()
640 const Function *curFunc = instr->getParent()->getParent(); in usedInOneFunc()
738 const Instruction *instr = cast<Instruction>(U); in emitDeclarations() local
739 const BasicBlock *bb = instr->getParent(); in emitDeclarations()
/kernel/linux/linux-6.6/arch/s390/
H A DMakefile110 cfi := $(call as-instr,.cfi_startproc\n.cfi_val_offset 15$(comma)-160\n.cfi_endproc,-DCONFIG_AS_CFI_VAL_OFFSET=1)
/third_party/mesa3d/src/compiler/nir/
H A Dnir_lower_returns.c195 nir_instr_remove(&jump->instr); in lower_returns_in_block()
/third_party/mesa3d/src/gallium/drivers/lima/ir/pp/
H A Dcodegen.h358 void ppir_disassemble_instr(uint32_t *instr, unsigned offset, FILE *fp);

Completed in 50 milliseconds

1...<<414243444546474849