| /third_party/mesa3d/src/freedreno/ir3/ |
| H A D | ir3_cse.c | 40 const struct ir3_instruction *instr = data; in hash_instr() local
43 hash = HASH(hash, instr->opc); in hash_instr()
44 hash = HASH(hash, instr->dsts[0]->flags); in hash_instr()
45 foreach_src (src, (struct ir3_instruction *)instr) { in hash_instr()
60 if (opc_cat(instr->opc) == 1) { in hash_instr()
61 hash = HASH(hash, instr->cat1.dst_type); in hash_instr()
62 hash = HASH(hash, instr->cat1.src_type); in hash_instr()
63 hash = HASH(hash, instr->cat1.round); in hash_instr()
122 instr_can_cse(const struct ir3_instruction *instr) in instr_can_cse() argument
124 if (instr in instr_can_cse()
167 struct ir3_instruction *instr = src->def->instr->data; ir3_cse() local
[all...] |
| H A D | ir3_lower_subgroups.c | 96 struct ir3_instruction *instr = ir3_instr_create(block, opc, 1, 2); in binop() local
99 struct ir3_register *instr_dst = ir3_dst_create(instr, dst->num, flags); in binop()
100 struct ir3_register *instr_src0 = ir3_src_create(instr, src0->num, flags); in binop()
101 struct ir3_register *instr_src1 = ir3_src_create(instr, src1->num, flags); in binop()
106 instr->repeat = util_last_bit(instr_dst->wrmask) - 1; in binop()
114 struct ir3_instruction *instr = ir3_instr_create(block, opc, 1, 3); in triop() local
117 struct ir3_register *instr_dst = ir3_dst_create(instr, dst->num, flags); in triop()
118 struct ir3_register *instr_src0 = ir3_src_create(instr, src0->num, flags); in triop()
119 struct ir3_register *instr_src1 = ir3_src_create(instr, src1->num, flags); in triop()
120 struct ir3_register *instr_src2 = ir3_src_create(instr, src in triop()
169 split_block(struct ir3 *ir, struct ir3_block *before_block, struct ir3_instruction *instr) split_block() argument
238 lower_instr(struct ir3 *ir, struct ir3_block **block, struct ir3_instruction *instr) lower_instr() argument
[all...] |
| H A D | ir3_ra_validate.c | 138 validate_simple(struct ra_val_ctx *ctx, struct ir3_instruction *instr) in validate_simple() argument
140 ctx->current_instr = instr; in validate_simple()
141 ra_foreach_dst (dst, instr) { in validate_simple()
148 ra_foreach_src (src, instr) { in validate_simple()
219 propagate_normal_instr(struct ra_val_ctx *ctx, struct ir3_instruction *instr) in propagate_normal_instr() argument
221 ra_foreach_dst (dst, instr) { in propagate_normal_instr()
325 propagate_instr(struct ra_val_ctx *ctx, struct ir3_instruction *instr) in propagate_instr() argument
327 if (instr->opc == OPC_META_SPLIT) in propagate_instr()
328 propagate_split(ctx, instr); in propagate_instr()
329 else if (instr in propagate_instr()
368 struct ir3_instruction *instr = state->def->instr; chase_definition() local
439 check_reaching_src(struct ra_val_ctx *ctx, struct ir3_instruction *instr, struct ir3_register *src) check_reaching_src() argument
472 check_reaching_instr(struct ra_val_ctx *ctx, struct ir3_instruction *instr) check_reaching_instr() argument
[all...] |
| /third_party/mesa3d/src/intel/compiler/ |
| H A D | brw_fs_nir.cpp | 140 nir_foreach_instr(instr, block) { in emit_system_values_block()
141 if (instr->type != nir_instr_type_intrinsic) in emit_system_values_block()
144 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr); in emit_system_values_block()
414 nir_foreach_instr(instr, block) { in nir_emit_block()
415 nir_emit_instr(instr); in nir_emit_block()
420 fs_visitor::nir_emit_instr(nir_instr *instr) in nir_emit_instr() argument
422 const fs_builder abld = bld.annotate(NULL, instr); in nir_emit_instr()
424 switch (instr->type) { in nir_emit_instr()
426 nir_emit_alu(abld, nir_instr_as_alu(instr), true); in nir_emit_instr()
436 nir_emit_vs_intrinsic(abld, nir_instr_as_intrinsic(instr)); in nir_emit_instr()
502 optimize_extract_to_float(nir_alu_instr *instr, const fs_reg &result) optimize_extract_to_float() argument
537 optimize_frontfacing_ternary(nir_alu_instr *instr, const fs_reg &result) optimize_frontfacing_ternary() argument
691 prepare_alu_destination_and_sources(const fs_builder &bld, nir_alu_instr *instr, fs_reg *op, bool need_dest) prepare_alu_destination_and_sources() argument
757 resolve_inot_sources(const fs_builder &bld, nir_alu_instr *instr, fs_reg *op) resolve_inot_sources() argument
776 try_emit_b2fi_of_inot(const fs_builder &bld, fs_reg result, nir_alu_instr *instr) try_emit_b2fi_of_inot() argument
820 emit_fsign(const fs_builder &bld, const nir_alu_instr *instr, fs_reg result, fs_reg *op, unsigned fsign_src) emit_fsign() argument
947 can_fuse_fmul_fsign(nir_alu_instr *instr, unsigned fsign_src) can_fuse_fmul_fsign() argument
970 nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr, bool need_dest) nir_emit_alu() argument
[all...] |
| H A D | brw_vec4_gs_nir.cpp | 34 vec4_gs_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr) in nir_emit_intrinsic() argument
39 switch (instr->intrinsic) { in nir_emit_intrinsic()
41 assert(nir_dest_bit_size(instr->dest) == 32); in nir_emit_intrinsic()
45 const unsigned vertex = nir_src_as_uint(instr->src[0]); in nir_emit_intrinsic()
46 const unsigned offset_reg = nir_src_as_uint(instr->src[1]); in nir_emit_intrinsic()
51 const glsl_type *const type = glsl_type::ivec(instr->num_components); in nir_emit_intrinsic()
54 instr->const_index[0] + offset_reg, in nir_emit_intrinsic()
56 src.swizzle = BRW_SWZ_COMP_INPUT(nir_intrinsic_component(instr)); in nir_emit_intrinsic()
58 dest = get_nir_dest(instr->dest, src.type); in nir_emit_intrinsic()
59 dest.writemask = brw_writemask_for_size(instr in nir_emit_intrinsic()
[all...] |
| /third_party/mesa3d/src/gallium/auxiliary/nir/ |
| H A D | nir_to_tgsi.c | 667 ntt_output_decl(struct ntt_compile *c, nir_intrinsic_instr *instr, uint32_t *frac) in ntt_output_decl() argument
669 nir_io_semantics semantics = nir_intrinsic_io_semantics(instr); in ntt_output_decl()
670 int base = nir_intrinsic_base(instr); in ntt_output_decl()
671 *frac = nir_intrinsic_component(instr); in ntt_output_decl()
672 bool is_64 = nir_src_bit_size(instr->src[0]) == 64; in ntt_output_decl()
700 instr->num_components, in ntt_output_decl()
727 if (nir_intrinsic_has_write_mask(instr)) in ntt_output_decl()
728 write_mask = nir_intrinsic_write_mask(instr); in ntt_output_decl()
730 write_mask = ((1 << instr->num_components) - 1) << *frac; in ntt_output_decl()
1093 ntt_get_load_const_src(struct ntt_compile *c, nir_load_const_instr *instr) in ntt_get_load_const_src() argument
1167 ntt_get_alu_src(struct ntt_compile *c, nir_alu_instr *instr, int i) ntt_get_alu_src() argument
1318 ntt_emit_alu(struct ntt_compile *c, nir_alu_instr *instr) ntt_emit_alu() argument
1792 ntt_emit_load_ubo(struct ntt_compile *c, nir_intrinsic_instr *instr) ntt_emit_load_ubo() argument
1856 ntt_get_access_qualifier(nir_intrinsic_instr *instr) ntt_get_access_qualifier() argument
1872 ntt_emit_mem(struct ntt_compile *c, nir_intrinsic_instr *instr, nir_variable_mode mode) ntt_emit_mem() argument
2039 ntt_emit_image_load_store(struct ntt_compile *c, nir_intrinsic_instr *instr) ntt_emit_image_load_store() argument
2145 ntt_emit_load_input(struct ntt_compile *c, nir_intrinsic_instr *instr) ntt_emit_load_input() argument
2247 ntt_emit_store_output(struct ntt_compile *c, nir_intrinsic_instr *instr) ntt_emit_store_output() argument
2281 ntt_emit_load_output(struct ntt_compile *c, nir_intrinsic_instr *instr) ntt_emit_load_output() argument
2322 ntt_emit_load_sysval(struct ntt_compile *c, nir_intrinsic_instr *instr) ntt_emit_load_sysval() argument
2356 ntt_emit_intrinsic(struct ntt_compile *c, nir_intrinsic_instr *instr) ntt_emit_intrinsic() argument
2576 ntt_push_tex_arg(struct ntt_compile *c, nir_tex_instr *instr, nir_tex_src_type tex_src_type, struct ntt_tex_operand_state *s) ntt_push_tex_arg() argument
2605 ntt_emit_texture(struct ntt_compile *c, nir_tex_instr *instr) ntt_emit_texture() argument
2779 ntt_emit_ssa_undef(struct ntt_compile *c, nir_ssa_undef_instr *instr) ntt_emit_ssa_undef() argument
2786 ntt_emit_instr(struct ntt_compile *c, nir_instr *instr) ntt_emit_instr() argument
3071 ntt_should_vectorize_instr(const nir_instr *instr, const void *data) ntt_should_vectorize_instr() argument
3226 scalarize_64bit(const nir_instr *instr, const void *data) scalarize_64bit() argument
3235 nir_to_tgsi_lower_64bit_intrinsic(nir_builder *b, nir_intrinsic_instr *instr) nir_to_tgsi_lower_64bit_intrinsic() argument
3370 nir_to_tgsi_lower_64bit_load_const(nir_builder *b, nir_load_const_instr *instr) nir_to_tgsi_lower_64bit_load_const() argument
3407 nir_to_tgsi_lower_64bit_to_vec2_instr(nir_builder *b, nir_instr *instr, void *data) nir_to_tgsi_lower_64bit_to_vec2_instr() argument
3437 nir_to_tgsi_lower_tex_instr_arg(nir_builder *b, nir_tex_instr *instr, nir_tex_src_type tex_src_type, struct ntt_lower_tex_state *s) nir_to_tgsi_lower_tex_instr_arg() argument
3462 nir_to_tgsi_lower_tex_instr(nir_builder *b, nir_instr *instr, void *data) nir_to_tgsi_lower_tex_instr() argument
3574 ntt_lower_atomic_pre_dec_filter(const nir_instr *instr, const void *_data) ntt_lower_atomic_pre_dec_filter() argument
3581 ntt_lower_atomic_pre_dec_lower(nir_builder *b, nir_instr *instr, void *_data) ntt_lower_atomic_pre_dec_lower() argument
3639 nir_lower_primid_sysval_to_input_filter(const nir_instr *instr, const void *_data) nir_lower_primid_sysval_to_input_filter() argument
3646 nir_lower_primid_sysval_to_input_lower(nir_builder *b, nir_instr *instr, void *data) nir_lower_primid_sysval_to_input_lower() argument
3689 ntt_vec_to_mov_writemask_cb(const nir_instr *instr, unsigned writemask, UNUSED const void *_data) ntt_vec_to_mov_writemask_cb() argument
[all...] |
| /third_party/mesa3d/src/imagination/rogue/ |
| H A D | rogue.c | 147 setup_alu_dest(struct rogue_instr *instr, size_t dest_index, nir_alu_instr *alu) in setup_alu_dest() argument
159 CHECK(rogue_instr_set_operand_vreg(instr, dest_index, nir_dest_reg)); in setup_alu_dest()
162 CHECK(rogue_instr_set_operand_vreg_vec(instr, in setup_alu_dest()
171 static bool trans_constreg_operand(struct rogue_instr *instr, in trans_constreg_operand() argument
182 CHECK(rogue_instr_set_operand_reg(instr, in trans_constreg_operand()
199 struct rogue_instr *instr = rogue_shader_insert(shader, ROGUE_OP_MAX); in trans_nir_alu_fmax() local
201 CHECK(setup_alu_dest(instr, 0, alu)); in trans_nir_alu_fmax()
206 CHECK(trans_constreg_operand(instr, u + 1, nir_alu_src_const(alu, u))); in trans_nir_alu_fmax()
212 CHECK(rogue_instr_set_operand_vreg(instr, u + 1, nir_src_reg)); in trans_nir_alu_fmax()
227 struct rogue_instr *instr in trans_nir_alu_fmin() local
255 struct rogue_instr *instr = rogue_shader_insert(shader, ROGUE_OP_MOV_IMM); trans_nir_alu_mov_imm() local
274 struct rogue_instr *instr = rogue_shader_insert(shader, ROGUE_OP_MOV); trans_nir_alu_mov() local
302 struct rogue_instr *instr = rogue_shader_insert(shader, ROGUE_OP_PACK_U8888); trans_nir_alu_pack_unorm_4x8() local
330 struct rogue_instr *instr = rogue_shader_insert(shader, ROGUE_OP_MUL); trans_nir_alu_fmul() local
355 struct rogue_instr *instr = rogue_shader_insert(shader, ROGUE_OP_FMA); trans_nir_alu_ffma() local
421 struct rogue_instr *instr = rogue_shader_insert(shader, ROGUE_OP_PIX_ITER_W); trans_nir_intrinsic_load_input_fs() local
467 struct rogue_instr *instr = rogue_shader_insert(shader, ROGUE_OP_MOV); trans_nir_intrinsic_load_input_vs() local
518 struct rogue_instr *instr = rogue_shader_insert(shader, ROGUE_OP_MOV); trans_nir_intrinsic_store_output_fs() local
556 struct rogue_instr *instr = rogue_shader_insert(shader, ROGUE_OP_VTXOUT); trans_nir_intrinsic_store_output_vs() local
611 struct rogue_instr *instr = rogue_shader_insert(shader, ROGUE_OP_MOV); trans_nir_intrinsic_load_ubo() local
650 nir_instr *instr = use_src->parent_instr; trans_nir_load_const() local
[all...] |
| /third_party/node/deps/v8/src/execution/ppc/ |
| H A D | simulator-ppc.cc | 130 void SetInstructionBitsInCodeSpace(Instruction* instr, Instr value, in SetInstructionBitsInCodeSpace() argument
133 instr->SetInstructionBits(value); in SetInstructionBitsInCodeSpace()
712 Instruction* instr) { in CheckICache()
713 intptr_t address = reinterpret_cast<intptr_t>(instr); in CheckICache()
723 CHECK_EQ(0, memcmp(reinterpret_cast<void*>(instr), in CheckICache()
894 void Simulator::Format(Instruction* instr, const char* format) { in Format() argument
896 reinterpret_cast<intptr_t>(instr), format); in Format()
973 void Simulator::SoftwareInterrupt(Instruction* instr) { in SoftwareInterrupt() argument
974 int svc = instr->SvcValue(); in SoftwareInterrupt()
982 Redirection* redirection = Redirection::FromInstruction(instr); in SoftwareInterrupt()
711 CheckICache(base::CustomMatcherHashMap* i_cache, Instruction* instr) CheckICache() argument
1274 isStopInstruction(Instruction* instr) isStopInstruction() argument
1366 ExecuteBranchConditional(Instruction* instr, BCType type) ExecuteBranchConditional() argument
1429 VectorCompareOp(Simulator* sim, Instruction* instr, bool is_fp, Operation op) VectorCompareOp() argument
1452 VectorConverFromFPSaturate(Simulator* sim, Instruction* instr, T min_val, T max_val, bool even_lane_result = false) VectorConverFromFPSaturate() argument
1477 VectorPackSaturate(Simulator* sim, Instruction* instr, S min_val, S max_val) VectorPackSaturate() argument
1541 ExecuteGeneric(Instruction* instr) ExecuteGeneric() argument
5307 Trace(Instruction* instr) Trace() argument
5318 ExecuteInstruction(Instruction* instr) ExecuteInstruction() argument
5320 CheckICache(i_cache(), instr); ExecuteInstruction() local
5346 Instruction* instr = reinterpret_cast<Instruction*>(program_counter); Execute() local
5355 Instruction* instr = reinterpret_cast<Instruction*>(program_counter); Execute() local
[all...] |
| /third_party/mesa3d/src/broadcom/compiler/ |
| H A D | v3d_nir_lower_txf_ms.c | 40 nir_tex_instr *instr = nir_instr_as_tex(in_instr); in v3d_nir_lower_txf_ms_instr() local
42 b->cursor = nir_before_instr(&instr->instr); in v3d_nir_lower_txf_ms_instr()
44 int coord_index = nir_tex_instr_src_index(instr, nir_tex_src_coord); in v3d_nir_lower_txf_ms_instr()
45 int sample_index = nir_tex_instr_src_index(instr, nir_tex_src_ms_index); in v3d_nir_lower_txf_ms_instr()
46 nir_ssa_def *coord = instr->src[coord_index].src.ssa; in v3d_nir_lower_txf_ms_instr()
47 nir_ssa_def *sample = instr->src[sample_index].src.ssa; in v3d_nir_lower_txf_ms_instr()
56 if (instr->is_array) in v3d_nir_lower_txf_ms_instr()
61 nir_instr_rewrite_src(&instr->instr, in v3d_nir_lower_txf_ms_instr()
72 v3d_nir_lower_txf_ms_filter(const nir_instr *instr, const void *data) v3d_nir_lower_txf_ms_filter() argument
[all...] |
| /third_party/mesa3d/src/compiler/nir/ |
| H A D | nir_print.c | 59 * (such as instr or var) to message to print.
119 print_const_from_load(nir_load_const_instr *instr, print_state *state) in print_const_from_load() argument
131 for (unsigned i = 0; i < instr->def.num_components; i++) { in print_const_from_load()
135 switch (instr->def.bit_size) { in print_const_from_load()
137 fprintf(fp, "0x%016" PRIx64, instr->value[i].u64); in print_const_from_load()
140 fprintf(fp, "0x%08x", instr->value[i].u32); in print_const_from_load()
143 fprintf(fp, "0x%04x", instr->value[i].u16); in print_const_from_load()
146 fprintf(fp, "0x%02x", instr->value[i].u8); in print_const_from_load()
149 fprintf(fp, "%s", instr->value[i].b ? "true" : "false"); in print_const_from_load()
154 if (instr in print_const_from_load()
184 print_load_const_instr(nir_load_const_instr *instr, print_state *state) print_load_const_instr() argument
200 nir_instr *instr = def->parent_instr; print_ssa_use() local
265 print_alu_src(nir_alu_instr *instr, unsigned src, print_state *state) print_alu_src() argument
326 print_alu_instr(nir_alu_instr *instr, print_state *state) print_alu_instr() argument
725 print_deref_link(const nir_deref_instr *instr, bool whole_chain, print_state *state) print_deref_link() argument
803 print_deref_instr(nir_deref_instr *instr, print_state *state) print_deref_instr() argument
902 print_intrinsic_instr(nir_intrinsic_instr *instr, print_state *state) print_intrinsic_instr() argument
1185 print_tex_instr(nir_tex_instr *instr, print_state *state) print_tex_instr() argument
1367 print_call_instr(nir_call_instr *instr, print_state *state) print_call_instr() argument
1382 print_jump_instr(nir_jump_instr *instr, print_state *state) print_jump_instr() argument
1419 print_ssa_undef_instr(nir_ssa_undef_instr* instr, print_state *state) print_ssa_undef_instr() argument
1427 print_phi_instr(nir_phi_instr *instr, print_state *state) print_phi_instr() argument
1442 print_parallel_copy_instr(nir_parallel_copy_instr *instr, print_state *state) print_parallel_copy_instr() argument
1456 print_instr(const nir_instr *instr, print_state *state, unsigned tabs) print_instr() argument
1793 nir_print_instr(const nir_instr *instr, FILE *fp) nir_print_instr() argument
[all...] |
| H A D | nir_opt_move.c | 61 instr_reads_register(nir_instr *instr) in instr_reads_register() argument
63 return !nir_foreach_src(instr, src_is_ssa, NULL); in instr_reads_register()
84 nir_foreach_instr_reverse_safe(instr, block) { in nir_opt_move_block()
85 instr->index = index++; in nir_opt_move_block()
88 if (nir_instr_def_is_register(instr)) { in nir_opt_move_block()
89 last_reg_def_index = instr->index; in nir_opt_move_block()
94 if (!nir_can_move_instr(instr, options)) in nir_opt_move_block()
98 const nir_ssa_def *def = nir_instr_ssa_def(instr); in nir_opt_move_block()
99 nir_instr *first_user = instr == if_cond_instr ? NULL : last_instr; in nir_opt_move_block()
114 if (nir_instr_prev(first_user) == instr) in nir_opt_move_block()
[all...] |
| /third_party/mesa3d/src/gallium/drivers/lima/ir/gp/ |
| H A D | scheduler.c | 199 gpir_instr *instr; member
407 assert(dep->succ->sched.instr); in verify_ready_list()
413 unscheduled |= !(dep->succ->sched.instr); in verify_ready_list()
435 if (succ->sched.instr) { in schedule_insert_ready_list()
469 /* find the max start instr constrainted by all successors */ in gpir_get_max_start()
472 if (!succ->sched.instr) in gpir_get_max_start()
475 int start = succ->sched.instr->index + gpir_get_min_dist(dep); in gpir_get_max_start()
487 /* find the min end instr constrainted by all successors */ in gpir_get_min_end()
490 if (!succ->sched.instr) in gpir_get_min_end()
493 int end = succ->sched.instr in gpir_get_min_end()
501 gpir_sched_instr_has_load(gpir_instr *instr, gpir_node *node) gpir_sched_instr_has_load() argument
524 _try_place_node(sched_ctx *ctx, gpir_instr *instr, gpir_node *node) _try_place_node() argument
833 gpir_instr *instr = use->sched.instr; get_available_regs() local
920 gpir_instr *instr = use->sched.instr; spill_node() local
964 used_by_store(gpir_node *node, gpir_instr *instr) used_by_store() argument
1538 schedule_print_post_one_instr(gpir_instr *instr) schedule_print_post_one_instr() argument
1554 gpir_instr *instr = gpir_instr_create(ctx->block); schedule_one_instr() local
[all...] |
| /third_party/mesa3d/src/gallium/drivers/d3d12/ |
| H A D | d3d12_nir_passes.c | 66 lower_pos_write(nir_builder *b, struct nir_instr *instr, nir_variable **flip) in lower_pos_write() argument
68 if (instr->type != nir_instr_type_intrinsic) in lower_pos_write()
71 nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr); in lower_pos_write()
80 b->cursor = nir_before_instr(&intr->instr); in lower_pos_write()
90 nir_instr_rewrite_src(&intr->instr, intr->src + 1, nir_src_for_ssa(def)); in lower_pos_write()
109 nir_foreach_instr_safe(instr, block) { in d3d12_lower_yflip()
110 lower_pos_write(&b, instr, &flip); in d3d12_lower_yflip()
121 lower_load_face(nir_builder *b, struct nir_instr *instr, nir_variable *var) in lower_load_face() argument
123 if (instr->type != nir_instr_type_intrinsic) in lower_load_face()
126 nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr); in lower_load_face()
168 lower_pos_read(nir_builder *b, struct nir_instr *instr, nir_variable **depth_transform_var) lower_pos_read() argument
230 lower_compute_state_vars(nir_builder *b, nir_instr *instr, void *_state) lower_compute_state_vars() argument
271 lower_uint_color_write(nir_builder *b, struct nir_instr *instr, bool is_signed) lower_uint_color_write() argument
323 lower_load_draw_params(nir_builder *b, nir_instr *instr, void *draw_params) lower_load_draw_params() argument
361 lower_load_patch_vertices_in(nir_builder *b, nir_instr *instr, void *_state) lower_load_patch_vertices_in() argument
439 invert_depth_instr(nir_builder *b, struct nir_instr *instr, struct invert_depth_state *state) invert_depth_instr() argument
524 lower_instr(nir_intrinsic_instr *instr, nir_builder *b, struct d3d12_shader *shader, unsigned binding) lower_instr() argument
687 lower_load_ubo_packed_filter(const nir_instr *instr, UNUSED const void *_options) lower_load_ubo_packed_filter() argument
698 lower_load_ubo_packed_impl(nir_builder *b, nir_instr *instr, UNUSED void *_options) lower_load_ubo_packed_impl() argument
892 is_sample_pos(const nir_instr *instr, const void *_data) is_sample_pos() argument
901 lower_sample_pos(nir_builder *b, nir_instr *instr, void *_data) lower_sample_pos() argument
913 is_multisampling_instr(const nir_instr *instr, const void *_data) is_multisampling_instr() argument
931 lower_multisampling_instr(nir_builder *b, nir_instr *instr, void *_data) lower_multisampling_instr() argument
987 split_multistream_varying_stores(nir_builder *b, nir_instr *instr, void *_state) split_multistream_varying_stores() argument
[all...] |
| /third_party/mesa3d/src/gallium/drivers/r600/sfn/ |
| H A D | sfn_instr.cpp | 152 void Instr::add_required_instr(Instr *instr) in add_required_instr() argument
154 assert(instr); in add_required_instr()
155 m_required_instr.push_back(instr); in add_required_instr()
156 instr->m_dependend_instr.push_back(this); in add_required_instr()
290 void Block::push_back(PInst instr) in push_back() argument
292 instr->set_blockid(m_id, m_next_index++); in push_back()
294 uint32_t new_slots = instr->slots(); in push_back()
298 m_lds_group_requirement += instr->slots(); in push_back()
300 m_instructions.push_back(instr); in push_back()
322 bool Block::try_reserve_kcache(const AluInstr& instr) in try_reserve_kcache() argument
[all...] |
| /third_party/mesa3d/src/panfrost/midgard/ |
| H A D | midgard_compile.c | 218 midgard_nir_lower_global_load_instr(nir_builder *b, nir_instr *instr, void *data) in midgard_nir_lower_global_load_instr() argument
220 if (instr->type != nir_instr_type_intrinsic) in midgard_nir_lower_global_load_instr()
223 nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr); in midgard_nir_lower_global_load_instr()
234 b->cursor = nir_before_instr(instr); in midgard_nir_lower_global_load_instr()
257 nir_ssa_dest_init(&shared_load->instr, &shared_load->dest, in midgard_nir_lower_global_load_instr()
259 nir_builder_instr_insert(b, &shared_load->instr); in midgard_nir_lower_global_load_instr()
286 mdg_should_scalarize(const nir_instr *instr, const void *_unused) in mdg_should_scalarize() argument
288 const nir_alu_instr *alu = nir_instr_as_alu(instr); in mdg_should_scalarize()
310 midgard_vectorize_filter(const nir_instr *instr, const void *data) in midgard_vectorize_filter() argument
312 if (instr in midgard_vectorize_filter()
473 emit_load_const(compiler_context *ctx, nir_load_const_instr *instr) emit_load_const() argument
637 mir_copy_src(midgard_instruction *ins, nir_alu_instr *instr, unsigned i, unsigned to, bool *abs, bool *neg, bool *not, enum midgard_roundmode *roundmode, bool is_int, unsigned bcast_count) mir_copy_src() argument
684 mir_is_bcsel_float(nir_alu_instr *instr) mir_is_bcsel_float() argument
730 emit_alu(compiler_context *ctx, nir_alu_instr *instr) emit_alu() argument
1166 mir_set_intr_mask(nir_instr *instr, midgard_instruction *ins, bool is_read) mir_set_intr_mask() argument
1193 emit_ubo_read( compiler_context *ctx, nir_instr *instr, unsigned dest, unsigned offset, nir_src *indirect_offset, unsigned indirect_shift, unsigned index, unsigned nr_comps) emit_ubo_read() argument
1254 emit_global( compiler_context *ctx, nir_instr *instr, bool is_read, unsigned srcdest, nir_src *offset, unsigned seg) emit_global() argument
1348 emit_atomic( compiler_context *ctx, nir_intrinsic_instr *instr, bool is_shared, midgard_load_store_op op, unsigned image_direct_address) emit_atomic() argument
1483 emit_image_op(compiler_context *ctx, nir_intrinsic_instr *instr, bool is_atomic) emit_image_op() argument
1577 emit_sysval_read(compiler_context *ctx, nir_instr *instr, unsigned nr_components, unsigned offset) emit_sysval_read() argument
1672 emit_compute_builtin(compiler_context *ctx, nir_intrinsic_instr *instr) emit_compute_builtin() argument
1696 emit_vertex_builtin(compiler_context *ctx, nir_intrinsic_instr *instr) emit_vertex_builtin() argument
1703 emit_special(compiler_context *ctx, nir_intrinsic_instr *instr, unsigned idx) emit_special() argument
1745 output_load_rt_addr(compiler_context *ctx, nir_intrinsic_instr *instr) output_load_rt_addr() argument
1768 emit_intrinsic(compiler_context *ctx, nir_intrinsic_instr *instr) emit_intrinsic() argument
2260 mdg_texture_mode(nir_tex_instr *instr) mdg_texture_mode() argument
2273 set_tex_coord(compiler_context *ctx, nir_tex_instr *instr, midgard_instruction *ins) set_tex_coord() argument
2417 emit_texop_native(compiler_context *ctx, nir_tex_instr *instr, unsigned midgard_texop) emit_texop_native() argument
2512 emit_tex(compiler_context *ctx, nir_tex_instr *instr) emit_tex() argument
2538 emit_jump(compiler_context *ctx, nir_jump_instr *instr) emit_jump() argument
2556 emit_instr(compiler_context *ctx, struct nir_instr *instr) emit_instr() argument
[all...] |
| /third_party/skia/third_party/externals/spirv-tools/source/opt/ |
| H A D | propagator.cpp | 39 void SSAPropagator::AddSSAEdges(Instruction* instr) { in AddSSAEdges() argument
41 if (instr->result_id() == 0) { in AddSSAEdges()
46 instr->result_id(), [this](Instruction* use_instr) { in AddSSAEdges()
87 bool SSAPropagator::Simulate(Instruction* instr) { in Simulate() argument
91 if (!ShouldSimulateAgain(instr)) { in Simulate()
96 PropStatus status = visit_fn_(instr, &dest_bb); in Simulate()
97 bool status_changed = SetStatus(instr, status); in Simulate()
102 DontSimulateAgain(instr); in Simulate()
104 AddSSAEdges(instr); in Simulate()
107 // If |instr| i in Simulate()
255 Instruction* instr = ssa_edge_uses_.front(); Run() local
[all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/source/opt/ |
| H A D | propagator.cpp | 39 void SSAPropagator::AddSSAEdges(Instruction* instr) { in AddSSAEdges() argument
41 if (instr->result_id() == 0) { in AddSSAEdges()
46 instr->result_id(), [this](Instruction* use_instr) { in AddSSAEdges()
87 bool SSAPropagator::Simulate(Instruction* instr) { in Simulate() argument
91 if (!ShouldSimulateAgain(instr)) { in Simulate()
96 PropStatus status = visit_fn_(instr, &dest_bb); in Simulate()
97 bool status_changed = SetStatus(instr, status); in Simulate()
102 DontSimulateAgain(instr); in Simulate()
104 AddSSAEdges(instr); in Simulate()
107 // If |instr| i in Simulate()
255 Instruction* instr = ssa_edge_uses_.front(); Run() local
[all...] |
| /third_party/spirv-tools/source/opt/ |
| H A D | propagator.cpp | 39 void SSAPropagator::AddSSAEdges(Instruction* instr) { in AddSSAEdges() argument
41 if (instr->result_id() == 0) { in AddSSAEdges()
46 instr->result_id(), [this](Instruction* use_instr) { in AddSSAEdges()
87 bool SSAPropagator::Simulate(Instruction* instr) { in Simulate() argument
91 if (!ShouldSimulateAgain(instr)) { in Simulate()
96 PropStatus status = visit_fn_(instr, &dest_bb); in Simulate()
97 bool status_changed = SetStatus(instr, status); in Simulate()
102 DontSimulateAgain(instr); in Simulate()
104 AddSSAEdges(instr); in Simulate()
107 // If |instr| i in Simulate()
255 Instruction* instr = ssa_edge_uses_.front(); Run() local
[all...] |
| /kernel/linux/linux-5.10/samples/seccomp/ |
| H A D | bpf-helper.c | 32 struct sock_filter *instr = &filter[offset]; in bpf_resolve_jumps() local
33 if (instr->code != (BPF_JMP+BPF_JA)) in bpf_resolve_jumps()
35 switch ((instr->jt<<8)|instr->jf) { in bpf_resolve_jumps()
37 if (labels->labels[instr->k].location == 0xffffffff) { in bpf_resolve_jumps()
39 labels->labels[instr->k].label); in bpf_resolve_jumps()
42 instr->k = labels->labels[instr->k].location - in bpf_resolve_jumps()
44 instr->jt = 0; in bpf_resolve_jumps()
45 instr in bpf_resolve_jumps()
[all...] |
| /kernel/linux/linux-6.6/samples/seccomp/ |
| H A D | bpf-helper.c | 32 struct sock_filter *instr = &filter[offset]; in bpf_resolve_jumps() local
33 if (instr->code != (BPF_JMP+BPF_JA)) in bpf_resolve_jumps()
35 switch ((instr->jt<<8)|instr->jf) { in bpf_resolve_jumps()
37 if (labels->labels[instr->k].location == 0xffffffff) { in bpf_resolve_jumps()
39 labels->labels[instr->k].label); in bpf_resolve_jumps()
42 instr->k = labels->labels[instr->k].location - in bpf_resolve_jumps()
44 instr->jt = 0; in bpf_resolve_jumps()
45 instr in bpf_resolve_jumps()
[all...] |
| /third_party/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
| H A D | ir2_private.h | 33 #include "ir2/instr-a2xx.h"
60 uint8_t c : 3; /* assigned x/y/z/w (7=dont write, for fetch instr) */
122 /* store possible opcs, then we can choose vector/scalar instr */
144 struct ir2_instr *instr, *instr_s; member
181 struct ir2_instr instr[0x300]; member
196 void ra_src_free(struct ir2_context *ctx, struct ir2_instr *instr);
238 for (struct ir2_instr *it = (ctx)->instr; ({ \
239 while (it != &(ctx)->instr[(ctx)->instr_count] && \
242 it != &(ctx)->instr[(ctx)->instr_count]; \
258 #define ir2_foreach_src(it, instr) \
294 is_export(struct ir2_instr *instr) is_export() argument
338 get_reg(struct ir2_instr *instr) get_reg() argument
360 dst_ncomp(struct ir2_instr *instr) dst_ncomp() argument
378 src_ncomp(struct ir2_instr *instr) src_ncomp() argument
[all...] |
| /third_party/mesa3d/src/compiler/glsl/ |
| H A D | glsl_to_nir.cpp | 89 void add_instr(nir_instr *instr, unsigned num_components, unsigned bit_size);
892 nir_jump_instr *instr = nir_jump_instr_create(this->shader, type); in visit() local
893 nir_builder_instr_insert(&b, &instr->instr); in visit()
908 nir_jump_instr *instr = nir_jump_instr_create(this->shader, nir_jump_return); in visit() local
909 nir_builder_instr_insert(&b, &instr->instr); in visit()
1228 nir_intrinsic_instr *instr = nir_intrinsic_instr_create(shader, op); in visit() local
1229 nir_ssa_def *ret = &instr->dest.ssa; in visit()
1266 instr in visit()
1788 get_instr_dest(nir_instr *instr) get_instr_dest() argument
1818 add_instr(nir_instr *instr, unsigned num_components, unsigned bit_size) add_instr() argument
2483 nir_tex_instr *instr = nir_tex_instr_create(this->shader, num_srcs); visit() local
[all...] |
| /kernel/linux/linux-6.6/arch/powerpc/lib/ |
| H A D | code-patching.c | 23 static int __patch_instruction(u32 *exec_addr, ppc_inst_t instr, u32 *patch_addr) in __patch_instruction() argument
25 if (!ppc_inst_prefixed(instr)) { in __patch_instruction()
26 u32 val = ppc_inst_val(instr); in __patch_instruction()
30 u64 val = ppc_inst_as_ulong(instr); in __patch_instruction()
44 int raw_patch_instruction(u32 *addr, ppc_inst_t instr) in raw_patch_instruction() argument
46 return __patch_instruction(addr, instr, addr); in raw_patch_instruction()
281 static int __do_patch_instruction_mm(u32 *addr, ppc_inst_t instr) in __do_patch_instruction_mm() argument
310 err = __patch_instruction(addr, instr, patch_addr); in __do_patch_instruction_mm()
331 static int __do_patch_instruction(u32 *addr, ppc_inst_t instr) in __do_patch_instruction() argument
348 err = __patch_instruction(addr, instr, patch_add in __do_patch_instruction()
356 patch_instruction(u32 *addr, ppc_inst_t instr) patch_instruction() argument
383 ppc_inst_t instr; patch_branch() local
395 is_conditional_branch(ppc_inst_t instr) is_conditional_branch() argument
413 create_cond_branch(ppc_inst_t *instr, const u32 *addr, unsigned long target, int flags) create_cond_branch() argument
432 instr_is_relative_branch(ppc_inst_t instr) instr_is_relative_branch() argument
440 instr_is_relative_link_branch(ppc_inst_t instr) instr_is_relative_link_branch() argument
445 branch_iform_target(const u32 *instr) branch_iform_target() argument
461 branch_bform_target(const u32 *instr) branch_bform_target() argument
477 branch_target(const u32 *instr) branch_target() argument
487 translate_branch(ppc_inst_t *instr, const u32 *dest, const u32 *src) translate_branch() argument
[all...] |
| /kernel/linux/linux-5.10/drivers/net/ethernet/netronome/nfp/ |
| H A D | nfp_asm.c | 30 u16 br_get_offset(u64 instr) in br_get_offset() argument
34 addr_lo = FIELD_GET(OP_BR_ADDR_LO, instr); in br_get_offset()
35 addr_hi = FIELD_GET(OP_BR_ADDR_HI, instr); in br_get_offset()
41 void br_set_offset(u64 *instr, u16 offset) in br_set_offset() argument
47 *instr &= ~(OP_BR_ADDR_HI | OP_BR_ADDR_LO); in br_set_offset()
48 *instr |= FIELD_PREP(OP_BR_ADDR_HI, addr_hi); in br_set_offset()
49 *instr |= FIELD_PREP(OP_BR_ADDR_LO, addr_lo); in br_set_offset()
52 void br_add_offset(u64 *instr, u16 offset) in br_add_offset() argument
56 addr = br_get_offset(*instr); in br_add_offset()
57 br_set_offset(instr, add in br_add_offset()
60 immed_can_modify(u64 instr) immed_can_modify() argument
71 immed_get_value(u64 instr) immed_get_value() argument
85 immed_set_value(u64 *instr, u16 immed) immed_set_value() argument
102 immed_add_value(u64 *instr, u16 offset) immed_add_value() argument
[all...] |
| /kernel/linux/linux-6.6/drivers/net/ethernet/netronome/nfp/ |
| H A D | nfp_asm.c | 30 u16 br_get_offset(u64 instr) in br_get_offset() argument
34 addr_lo = FIELD_GET(OP_BR_ADDR_LO, instr); in br_get_offset()
35 addr_hi = FIELD_GET(OP_BR_ADDR_HI, instr); in br_get_offset()
41 void br_set_offset(u64 *instr, u16 offset) in br_set_offset() argument
47 *instr &= ~(OP_BR_ADDR_HI | OP_BR_ADDR_LO); in br_set_offset()
48 *instr |= FIELD_PREP(OP_BR_ADDR_HI, addr_hi); in br_set_offset()
49 *instr |= FIELD_PREP(OP_BR_ADDR_LO, addr_lo); in br_set_offset()
52 void br_add_offset(u64 *instr, u16 offset) in br_add_offset() argument
56 addr = br_get_offset(*instr); in br_add_offset()
57 br_set_offset(instr, add in br_add_offset()
60 immed_can_modify(u64 instr) immed_can_modify() argument
71 immed_get_value(u64 instr) immed_get_value() argument
85 immed_set_value(u64 *instr, u16 immed) immed_set_value() argument
102 immed_add_value(u64 *instr, u16 offset) immed_add_value() argument
[all...] |