| /third_party/node/deps/v8/src/wasm/baseline/arm64/ |
| H A D | liftoff-assembler-arm64.h | 691 __ eor(temp, result.gp(), value.gp()); in AtomicBinop()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| H A D | IceInstARM32.cpp | 574 Asm->eor(getDest(), getSrc(0), getSrc(1), SetFlags, getPredicate()); in emitIAS()
|
| H A D | IceAssemblerARM32.cpp | 1527 void AssemblerARM32::eor(const Operand *OpRd, const Operand *OpRn,
1531 // eor{s}<c> <Rd>, <Rn>, <Rm>{, <shift>}
1537 // eor{s}<c> <Rd>, <Rn>, #RotatedImm8
1541 constexpr const char *EorName = "eor";
|
| /third_party/vixl/test/aarch32/ |
| H A D | test-assembler-negative-cond-rd-rn-operand-rm-shift-rs-a32.cc | 60 M(eor) \
|
| H A D | test-assembler-cond-rd-rn-operand-rm-shift-rs-a32.cc | 60 M(eor) \
5127 #include "aarch32/traces/assembler-cond-rd-rn-operand-rm-shift-rs-eor-a32.h"
|
| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.cc | 943 void Assembler::eor(const Register& rd, const Register& rn, in eor() function in v8::internal::Assembler
3097 V(eor, NEON_EOR, vd.Is8B() || vd.Is16B()) \
|
| /third_party/node/deps/v8/src/codegen/arm/ |
| H A D | assembler-arm.cc | 1546 void Assembler::eor(Register dst, Register src1, const Operand& src2, SBit s, in eor() function in v8::internal::Assembler
1551 void Assembler::eor(Register dst, Register src1, Register src2, SBit s, in eor() function in v8::internal::Assembler
|
| /third_party/node/deps/v8/src/builtins/arm/ |
| H A D | builtins-arm.cc | 2963 // New result = (result eor 0) + 0 = result. in Generate_DoubleToI()
2966 // New result = (result eor 0xFFFFFFFF) + 1 = 0 - result. in Generate_DoubleToI()
2967 __ eor(result_reg, result_reg, Operand(double_high, ASR, 31)); in Generate_DoubleToI()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/DartARM32/ |
| H A D | assembler_arm.cc | 184 // Moved to ARM32::AssemberARM32::eor()
185 void Assembler::eor(Register rd, Register rn, Operand o, Condition cond) {
|
| /third_party/vixl/src/aarch32/ |
| H A D | disasm-aarch32.h | 747 void eor(Condition cond,
|
| H A D | disasm-aarch32.cc | 1462 void Disassembler::eor(Condition cond, in eor() function in vixl::aarch32::Disassembler
7284 eor(CurrentCond(), in DecodeT32()
8650 eor(CurrentCond(), Best, Register(rd), Register(rn), imm); in DecodeT32()
19255 eor(CurrentCond(), in DecodeT32()
19284 eor(CurrentCond(), in DecodeT32()
19294 eor(CurrentCond(), in DecodeT32()
[all...] |
| H A D | assembler-aarch32.cc | 4185 void Assembler::eor(Condition cond, in eor() function in vixl::aarch32::Assembler
4270 Delegate(kEor, &Assembler::eor, cond, size, rd, rn, operand); in eor()
|
| H A D | macro-assembler-aarch32.h | 1973 eor(cond, rd, rn, operand); in MacroAssembler()
|
| /third_party/vixl/src/aarch64/ |
| H A D | simulator-aarch64.h | 3611 LogicVRegister eor(VectorFormat vform,
|
| H A D | logic-aarch64.cc | 1063 LogicVRegister Simulator::eor(VectorFormat vform, in eor() function in vixl::aarch64::Simulator
6553 eor(vform, maybe_neg_src1, maybe_neg_src1, src1);
|
| /third_party/vixl/test/aarch64/ |
| H A D | test-simulator-aarch64.cc | 4670 DEFINE_TEST_NEON_3SAME_8B_16B(eor, Basic)
|
| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-arm64.cc | 4194 eor(vf, rd, rn, rm);
|
| H A D | simulator-logic-arm64.cc | 1021 LogicVRegister Simulator::eor(VectorFormat vform, LogicVRegister dst, in eor() function in v8::internal::Simulator
|
| /third_party/skia/third_party/externals/sfntly/java/lib/ |
| H A D | icu4j-4_8_1_1.jar | META-INF/
META-INF/MANIFEST.MF
com/
com/ibm/
com/ibm/icu/
com/ibm/icu/impl/
... |