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/device/soc/rockchip/rk3568/hardware/rga/include/
H A DRgaApi.h44 * not use ctx, because it is usually a NULL.
46 #define RgaInit(ctx) ( { \
49 c_RkRgaGetContext(ctx); \
52 #define RgaDeInit(ctx) do { \
53 (void)(ctx); /* unused */ \
62 void c_RkRgaGetContext(void **ctx);
/device/soc/rockchip/rk3588/hardware/rga/include/
H A DRgaApi.h45 * not use ctx, because it is usually a NULL.
47 #define RgaInit(ctx) ({ \
50 c_RkRgaGetContext(ctx); \
53 #define RgaDeInit(ctx) { \
54 (void)ctx; /* unused */ \
63 void c_RkRgaGetContext(void **ctx);
/device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/
H A Dmali_kbase_js_ctx_attr.c24 * @brief Check whether a ctx has a certain attribute, and if so, retain that
30 * - ctx is scheduled on the runpool
32 * @return true indicates a change in ctx attributes state of the runpool.
36 * @return false indicates no change in ctx attributes state of the runpool.
51 lockdep_assert_held(&js_kctx_info->ctx.jsctx_mutex); in kbasep_js_ctx_attr_runpool_retain_attr()
71 * @brief Check whether a ctx has a certain attribute, and if so, release that
77 * - ctx is scheduled on the runpool
79 * @return true indicates a change in ctx attributes state of the runpool.
83 * @return false indicates no change in ctx attributes state of the runpool.
98 lockdep_assert_held(&js_kctx_info->ctx in kbasep_js_ctx_attr_runpool_release_attr()
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H A Dmali_kbase_dma_fence.c47 static int kbase_dma_fence_lock_reservations(struct kbase_dma_fence_resv_info *info, struct ww_acquire_ctx *ctx) in kbase_dma_fence_lock_reservations() argument
54 ww_acquire_init(ctx, &reservation_ww_class); in kbase_dma_fence_lock_reservations()
63 err = ww_mutex_lock(&info->resv_objs[r]->lock, ctx); in kbase_dma_fence_lock_reservations()
69 ww_acquire_done(ctx); in kbase_dma_fence_lock_reservations()
87 ww_mutex_lock_slow(&content_res->lock, ctx); in kbase_dma_fence_lock_reservations()
94 ww_acquire_fini(ctx); in kbase_dma_fence_lock_reservations()
98 static void kbase_dma_fence_unlock_reservations(struct kbase_dma_fence_resv_info *info, struct ww_acquire_ctx *ctx) in kbase_dma_fence_unlock_reservations() argument
105 ww_acquire_fini(ctx); in kbase_dma_fence_unlock_reservations()
166 struct kbase_jd_context *ctx; in kbase_dma_fence_work() local
169 ctx in kbase_dma_fence_work()
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/device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/
H A Dmali_kbase_js_ctx_attr.c27 * @brief Check whether a ctx has a certain attribute, and if so, retain that
33 * - ctx is scheduled on the runpool
35 * @return true indicates a change in ctx attributes state of the runpool.
39 * @return false indicates no change in ctx attributes state of the runpool.
53 lockdep_assert_held(&js_kctx_info->ctx.jsctx_mutex); in kbasep_js_ctx_attr_runpool_retain_attr()
73 * @brief Check whether a ctx has a certain attribute, and if so, release that
79 * - ctx is scheduled on the runpool
81 * @return true indicates a change in ctx attributes state of the runpool.
85 * @return false indicates no change in ctx attributes state of the runpool.
99 lockdep_assert_held(&js_kctx_info->ctx in kbasep_js_ctx_attr_runpool_release_attr()
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H A Dmali_kbase_dma_fence.c55 struct ww_acquire_ctx *ctx) in kbase_dma_fence_lock_reservations()
62 ww_acquire_init(ctx, &reservation_ww_class); in kbase_dma_fence_lock_reservations()
71 err = ww_mutex_lock(&info->resv_objs[r]->lock, ctx); in kbase_dma_fence_lock_reservations()
76 ww_acquire_done(ctx); in kbase_dma_fence_lock_reservations()
92 ww_mutex_lock_slow(&content_res->lock, ctx); in kbase_dma_fence_lock_reservations()
97 ww_acquire_fini(ctx); in kbase_dma_fence_lock_reservations()
103 struct ww_acquire_ctx *ctx) in kbase_dma_fence_unlock_reservations()
109 ww_acquire_fini(ctx); in kbase_dma_fence_unlock_reservations()
172 struct kbase_jd_context *ctx; in kbase_dma_fence_work() local
175 ctx in kbase_dma_fence_work()
54 kbase_dma_fence_lock_reservations(struct kbase_dma_fence_resv_info *info, struct ww_acquire_ctx *ctx) kbase_dma_fence_lock_reservations() argument
102 kbase_dma_fence_unlock_reservations(struct kbase_dma_fence_resv_info *info, struct ww_acquire_ctx *ctx) kbase_dma_fence_unlock_reservations() argument
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/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/
H A Dmali_kbase_js_ctx_attr.c31 * @brief Check whether a ctx has a certain attribute, and if so, retain that
37 * - ctx is scheduled on the runpool
39 * @return true indicates a change in ctx attributes state of the runpool.
43 * @return false indicates no change in ctx attributes state of the runpool.
58 lockdep_assert_held(&js_kctx_info->ctx.jsctx_mutex); in kbasep_js_ctx_attr_runpool_retain_attr()
78 * @brief Check whether a ctx has a certain attribute, and if so, release that
84 * - ctx is scheduled on the runpool
86 * @return true indicates a change in ctx attributes state of the runpool.
90 * @return false indicates no change in ctx attributes state of the runpool.
105 lockdep_assert_held(&js_kctx_info->ctx in kbasep_js_ctx_attr_runpool_release_attr()
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H A Dmali_kbase_dma_fence.c52 static int kbase_dma_fence_lock_reservations(struct kbase_dma_fence_resv_info *info, struct ww_acquire_ctx *ctx) in kbase_dma_fence_lock_reservations() argument
63 ww_acquire_init(ctx, &reservation_ww_class); in kbase_dma_fence_lock_reservations()
72 err = ww_mutex_lock(&info->resv_objs[r]->lock, ctx); in kbase_dma_fence_lock_reservations()
78 ww_acquire_done(ctx); in kbase_dma_fence_lock_reservations()
96 ww_mutex_lock_slow(&content_res->lock, ctx); in kbase_dma_fence_lock_reservations()
102 ww_acquire_fini(ctx); in kbase_dma_fence_lock_reservations()
106 static void kbase_dma_fence_unlock_reservations(struct kbase_dma_fence_resv_info *info, struct ww_acquire_ctx *ctx) in kbase_dma_fence_unlock_reservations() argument
113 ww_acquire_fini(ctx); in kbase_dma_fence_unlock_reservations()
174 struct kbase_jd_context *ctx; in kbase_dma_fence_work() local
177 ctx in kbase_dma_fence_work()
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H A Dmali_kbase_js.c424 /* No ctx allowed to submit */ in kbasep_js_devdata_init()
538 INIT_LIST_HEAD(&kctx->jctx.sched_info.ctx.ctx_list_entry[i]); in kbasep_js_kctx_init()
544 js_kctx_info->ctx.nr_jobs = 0; in kbasep_js_kctx_init()
547 memset(js_kctx_info->ctx.ctx_attr_ref_count, 0, sizeof(js_kctx_info->ctx.ctx_attr_ref_count)); in kbasep_js_kctx_init()
555 mutex_init(&js_kctx_info->ctx.jsctx_mutex); in kbasep_js_kctx_init()
557 init_waitqueue_head(&js_kctx_info->ctx.is_scheduled_wait); in kbasep_js_kctx_init()
586 KBASE_DEBUG_ASSERT(js_kctx_info->ctx.nr_jobs == 0); in kbasep_js_kctx_term()
589 mutex_lock(&kctx->jctx.sched_info.ctx.jsctx_mutex); in kbasep_js_kctx_term()
593 list_del_init(&kctx->jctx.sched_info.ctx in kbasep_js_kctx_term()
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/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/
H A Dmali_kbase_js_ctx_attr.c30 * Check whether a ctx has a certain attribute, and if so, retain that
39 * - ctx is scheduled on the runpool
41 * @return true indicates a change in ctx attributes state of the runpool.
45 * @return false indicates no change in ctx attributes state of the runpool.
59 lockdep_assert_held(&js_kctx_info->ctx.jsctx_mutex); in kbasep_js_ctx_attr_runpool_retain_attr()
79 * Check whether a ctx has a certain attribute, and if so, release that
88 * - ctx is scheduled on the runpool
90 * @return true indicates a change in ctx attributes state of the runpool.
94 * @return false indicates no change in ctx attributes state of the runpool.
108 lockdep_assert_held(&js_kctx_info->ctx in kbasep_js_ctx_attr_runpool_release_attr()
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H A Dmali_kbase_dma_fence.c56 struct ww_acquire_ctx *ctx) in kbase_dma_fence_lock_reservations()
67 ww_acquire_init(ctx, &reservation_ww_class); in kbase_dma_fence_lock_reservations()
76 err = ww_mutex_lock(&info->resv_objs[r]->lock, ctx); in kbase_dma_fence_lock_reservations()
81 ww_acquire_done(ctx); in kbase_dma_fence_lock_reservations()
97 ww_mutex_lock_slow(&content_res->lock, ctx); in kbase_dma_fence_lock_reservations()
102 ww_acquire_fini(ctx); in kbase_dma_fence_lock_reservations()
108 struct ww_acquire_ctx *ctx) in kbase_dma_fence_unlock_reservations()
114 ww_acquire_fini(ctx); in kbase_dma_fence_unlock_reservations()
179 struct kbase_jd_context *ctx; in kbase_dma_fence_work() local
182 ctx in kbase_dma_fence_work()
55 kbase_dma_fence_lock_reservations(struct kbase_dma_fence_resv_info *info, struct ww_acquire_ctx *ctx) kbase_dma_fence_lock_reservations() argument
107 kbase_dma_fence_unlock_reservations(struct kbase_dma_fence_resv_info *info, struct ww_acquire_ctx *ctx) kbase_dma_fence_unlock_reservations() argument
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/device/soc/hisilicon/hi3861v100/sdk_liteos/third_party/mbedtls/include/mbedtls/
H A Dcmac.h82 * \param ctx The cipher context used for the CMAC operation, initialized
93 int mbedtls_cipher_cmac_starts( mbedtls_cipher_context_t *ctx,
104 * \param ctx The cipher context used for the CMAC operation.
112 int mbedtls_cipher_cmac_update( mbedtls_cipher_context_t *ctx,
123 * \param ctx The cipher context used for the CMAC operation.
130 int mbedtls_cipher_cmac_finish( mbedtls_cipher_context_t *ctx,
141 * \param ctx The cipher context used for the CMAC operation.
147 int mbedtls_cipher_cmac_reset( mbedtls_cipher_context_t *ctx );
H A Dssl_ticket.h57 mbedtls_cipher_context_t ctx; /*!< context for auth enc/decryption */ member
86 * \param ctx Context to be initialized
88 void mbedtls_ssl_ticket_init( mbedtls_ssl_ticket_context *ctx );
93 * \param ctx Context to be set up
112 int mbedtls_ssl_ticket_setup( mbedtls_ssl_ticket_context *ctx,
134 * \param ctx Context to be cleaned up
136 void mbedtls_ssl_ticket_free( mbedtls_ssl_ticket_context *ctx );
/device/soc/rockchip/rk3588/hardware/mpp/include/
H A Dmpp_enc_roi_utils.h39 MPP_RET mpp_enc_roi_init(MppEncRoiCtx *ctx, RK_U32 w, RK_U32 h, MppCodingType type, RK_S32 count);
40 MPP_RET mpp_enc_roi_deinit(MppEncRoiCtx ctx);
42 MPP_RET mpp_enc_roi_add_region(MppEncRoiCtx ctx, RoiRegionCfg *region);
43 MPP_RET mpp_enc_roi_setup_meta(MppEncRoiCtx ctx, MppMeta meta);
H A Dvpu_api.h335 * @param ctx The context of vpu api, allocated in this function.
342 * @note check whether ctx has been allocated success after you do init.
344 RK_S32 (*init)(struct VpuCodecContext *ctx, RK_U8 *extraData, RK_U32 extra_size);
348 * @param ctx The context of vpu codec
353 RK_S32 (*decode)(struct VpuCodecContext *ctx, VideoPacket_t *pkt, DecoderOut_t *aDecOut);
357 * @param ctx The context of vpu codec
362 RK_S32 (*encode)(struct VpuCodecContext *ctx, EncInputStream_t *aEncInStrm, EncoderOut_t *aEncOut);
365 * @param ctx The context of vpu codec
368 RK_S32 (*flush)(struct VpuCodecContext *ctx);
369 RK_S32 (*control)(struct VpuCodecContext *ctx, VPU_API_CM
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/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/interdrv/common/cipher/src/drv/cipher_v1.0/drivers/extend/
H A Dext_sm4.c316 sm4_key ctx; in sm4_ecb_rm() local
318 sm4_set_encrypt_key(key, bit, &ctx); in sm4_ecb_rm()
321 sm4_ecb_crypt(data_in, data_out, SM4_BLOCK_SIZE, &ctx, decrypt); in sm4_ecb_rm()
336 sm4_key ctx; in sm4_cbc_rm() local
338 sm4_set_encrypt_key(key, bit, &ctx); in sm4_cbc_rm()
342 sm4_cbc_crypt(data_in, data_out, valid_data_len, &ctx, iv, decrypt); in sm4_cbc_rm()
354 sm4_key ctx; in sm4_ctr_rm() local
365 sm4_set_encrypt_key(key, bit, &ctx); in sm4_ctr_rm()
366 sm4_ctr128_crypt(data_in, data_out, valid_data_len, &ctx, (hi_u8 *)iv, encrypt_cnt, &num); in sm4_ctr_rm()
373 ext_sm4_context *ctx in ext_sm4_create() local
389 ext_sm4_destory(hi_void *ctx) ext_sm4_destory() argument
402 ext_sm4_setmode(hi_void *ctx, symc_alg alg, symc_mode mode, symc_width width) ext_sm4_setmode() argument
437 ext_sm4_setiv(hi_void *ctx, const hi_u8 *iv, hi_u32 ivlen, hi_u32 usage) ext_sm4_setiv() argument
456 ext_sm4_getiv(hi_void *ctx, hi_u8 *iv, hi_u32 *ivlen) ext_sm4_getiv() argument
477 ext_sm4_setkey(hi_void *ctx, const hi_u8 *fkey, const hi_u8 *skey, hi_u32 *hisi_klen) ext_sm4_setkey() argument
538 ext_sm4_crypto(hi_void *ctx, hi_u32 operation, symc_multi_pack *pack, hi_u32 last) ext_sm4_crypto() argument
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/device/soc/rockchip/common/kernel/drivers/gpu/arm/mali400/mali/linux/
H A Dmali_ukk_mem.c30 kargs.ctx = (uintptr_t)session_data; in mem_alloc_wrapper()
56 kargs.ctx = (uintptr_t)session_data; in mem_free_wrapper()
82 kargs.ctx = (uintptr_t)session_data; in mem_bind_wrapper()
104 kargs.ctx = (uintptr_t)session_data; in mem_unbind_wrapper()
127 kargs.ctx = (uintptr_t)session_data; in mem_cow_wrapper()
153 kargs.ctx = (uintptr_t)session_data; in mem_cow_modify_range_wrapper()
179 kargs.ctx = (uintptr_t)session_data; in mem_resize_mem_wrapper()
202 kargs.ctx = (uintptr_t)session_data; in mem_write_safe_wrapper()
238 kargs.ctx = (uintptr_t)session_data; in mem_query_mmu_page_table_dump_size_wrapper()
281 kargs.ctx in mem_dump_mmu_page_table_wrapper()
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/device/soc/rockchip/common/vendor/drivers/gpu/arm/mali400/mali/linux/
H A Dmali_ukk_mem.c31 kargs.ctx = (uintptr_t)session_data; in mem_alloc_wrapper()
57 kargs.ctx = (uintptr_t)session_data; in mem_free_wrapper()
83 kargs.ctx = (uintptr_t)session_data; in mem_bind_wrapper()
105 kargs.ctx = (uintptr_t)session_data; in mem_unbind_wrapper()
127 kargs.ctx = (uintptr_t)session_data; in mem_cow_wrapper()
153 kargs.ctx = (uintptr_t)session_data; in mem_cow_modify_range_wrapper()
178 kargs.ctx = (uintptr_t)session_data; in mem_resize_mem_wrapper()
201 kargs.ctx = (uintptr_t)session_data; in mem_write_safe_wrapper()
235 kargs.ctx = (uintptr_t)session_data; in mem_query_mmu_page_table_dump_size_wrapper()
286 kargs.ctx in mem_dump_mmu_page_table_wrapper()
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/device/soc/rockchip/rk3399/hardware/mpp/include/
H A Dvpu_api.h331 * @param ctx The context of vpu api, allocated in this function.
338 * @note check whether ctx has been allocated success after you do init.
340 RK_S32 (*init)(struct VpuCodecContext *ctx, RK_U8 *extraData, RK_U32 extra_size);
344 * @param ctx The context of vpu codec
349 RK_S32 (*decode)(struct VpuCodecContext *ctx, VideoPacket_t *pkt, DecoderOut_t *aDecOut);
353 * @param ctx The context of vpu codec
358 RK_S32 (*encode)(struct VpuCodecContext *ctx, EncInputStream_t *aEncInStrm, EncoderOut_t *aEncOut);
361 * @param ctx The context of vpu codec
364 RK_S32 (*flush)(struct VpuCodecContext *ctx);
365 RK_S32 (*control)(struct VpuCodecContext *ctx, VPU_API_CM
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H A Dmpi_enc_utils.h39 MppCtx ctx; member
81 int hal_mpp_get_sps(void *ctx, unsigned char *buf, size_t *buf_size);
82 int hal_mpp_encode(void *ctx, int dma_fd, unsigned char *buf, size_t *buf_size);
85 void hal_mpp_ctx_delete(void *ctx);
/device/soc/rockchip/rk3568/hardware/mpp/include/
H A Dvpu_api.h334 * @param ctx The context of vpu api, allocated in this function.
341 * @note check whether ctx has been allocated success after you do init.
343 RK_S32 (*init)(struct VpuCodecContext *ctx, RK_U8 *extraData, RK_U32 extra_size);
347 * @param ctx The context of vpu codec
352 RK_S32 (*decode)(struct VpuCodecContext *ctx, VideoPacket_t *pkt, DecoderOut_t *aDecOut);
356 * @param ctx The context of vpu codec
361 RK_S32 (*encode)(struct VpuCodecContext *ctx, EncInputStream_t *aEncInStrm, EncoderOut_t *aEncOut);
364 * @param ctx The context of vpu codec
367 RK_S32 (*flush)(struct VpuCodecContext *ctx);
368 RK_S32 (*control)(struct VpuCodecContext *ctx, VPU_API_CM
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H A Dmpi_enc_utils.h39 MppCtx ctx; member
81 int hal_mpp_get_sps(void *ctx, unsigned char *buf, size_t *buf_size);
82 int hal_mpp_encode(void *ctx, int dma_fd, unsigned char *buf, size_t *buf_size);
85 void hal_mpp_ctx_delete(void *ctx);
/device/soc/rockchip/common/hardware/mpp/include/
H A Dmpi_enc_utils.h39 MppCtx ctx; member
81 int hal_mpp_get_sps(void *ctx, unsigned char *buf, size_t *buf_size);
82 int hal_mpp_encode(void *ctx, int dma_fd, unsigned char *buf, size_t *buf_size);
85 void hal_mpp_ctx_delete(void *ctx);
/device/soc/hisilicon/hi3861v100/sdk_liteos/third_party/lwip_sack/include/lwip/
H A Dtcpip.h86 typedef void (*tcpip_callback_fn)(void *ctx);
174 err_t tcpip_callback_with_block(tcpip_callback_fn function, void *ctx, u8_t block);
179 #define tcpip_callback(f, ctx) tcpip_callback_with_block(f, ctx, 1)
182 struct tcpip_callback_msg *tcpip_callbackmsg_new(tcpip_callback_fn function, void *ctx);
/device/soc/rockchip/common/sdk_linux/drivers/clk/rockchip/
H A Dclk-rk3128.c487 struct rockchip_clk_provider *ctx; in rk3128_common_clk_init() local
498 ctx = rockchip_clk_init(np, reg_base, CLK_NR_CLKS); in rk3128_common_clk_init()
499 if (IS_ERR(ctx)) { in rk3128_common_clk_init()
504 clks = ctx->clk_data.clks; in rk3128_common_clk_init()
506 rockchip_clk_register_plls(ctx, rk3128_pll_clks, ARRAY_SIZE(rk3128_pll_clks), RK3128_GRF_SOC_STATUS0); in rk3128_common_clk_init()
507 rockchip_clk_register_branches(ctx, common_clk_branches, ARRAY_SIZE(common_clk_branches)); in rk3128_common_clk_init()
509 rockchip_clk_register_armclk(ctx, ARMCLK, "armclk", 2, clks[PLL_APLL], clks[PLL_GPLL_DIV2], &rk3128_cpuclk_data, in rk3128_common_clk_init()
514 rockchip_register_restart_notifier(ctx, RK2928_GLB_SRST_FST, NULL); in rk3128_common_clk_init()
520 return ctx; in rk3128_common_clk_init()
525 struct rockchip_clk_provider *ctx; in rk3126_clk_init() local
541 struct rockchip_clk_provider *ctx; rk3128_clk_init() local
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