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Searched refs:chipset (Results 26 - 50 of 58) sorted by relevance

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/third_party/mesa3d/src/gallium/drivers/nouveau/nvc0/
H A Dnvc0_video.c99 bool kepler = screen->device->chipset >= 0xe0; in nvc0_create_decoder()
249 if (screen->device->chipset < 0xd0) { in nvc0_create_decoder()
255 ret = nouveau_vp3_load_firmware(dec, templ->profile, screen->device->chipset); in nvc0_create_decoder()
H A Dnvc0_resource.h31 if (nouveau_screen(pscreen)->device->chipset >= 0x160) in nvc0_get_kind_generation()
H A Dnvc0_program.c573 nvc0_program_translate(struct nvc0_program *prog, uint16_t chipset, in nvc0_program_translate() argument
591 info->target = chipset; in nvc0_program_translate()
608 info->target = debug_get_num_option("NV50_PROG_CHIPSET", chipset); in nvc0_program_translate()
972 nv50_ir_get_target_library(screen->base.device->chipset, &code, &size); in nvc0_program_library_upload()
H A Dnve4_compute.c54 switch (dev->chipset & ~0xf) { in nve4_screen_compute_setup()
75 obj_class = (dev->chipset == 0x130 || dev->chipset == 0x13b) ? in nve4_screen_compute_setup()
79 NOUVEAU_ERR("unsupported chipset: NV%02x\n", dev->chipset); in nve4_screen_compute_setup()
H A Dnvc0_compute.c39 switch (dev->chipset & ~0xf) { in nvc0_screen_compute_setup()
47 NOUVEAU_ERR("unsupported chipset: NV%02x\n", dev->chipset); in nvc0_screen_compute_setup()
H A Dnvc0_context.h325 bool nvc0_program_translate(struct nvc0_program *, uint16_t chipset,
H A Dnvc0_query_hw_sm.c2249 if (dev->chipset == 0xc0 || dev->chipset == 0xc8) in nvc0_hw_sm_get_queries()
2274 if (dev->chipset == 0xc0 || dev->chipset == 0xc8) in nvc0_hw_sm_get_num_queries()
H A Dnvc0_miptree.c95 if (nouveau_screen(pscreen)->device->chipset >= 0x160) in nvc0_choose_tiled_storage_type()
H A Dnvc0_shader_state.c57 prog, nvc0->screen->base.device->chipset, in nvc0_program_validate()
/third_party/mesa3d/src/gallium/drivers/nouveau/nv50/
H A Dnv50_program.h125 bool nv50_program_translate(struct nv50_program *, uint16_t chipset,
H A Dnv50_screen.c1051 if (screen->base.device->chipset < 0x84 || in nv50_screen_create()
1055 } else if (screen->base.device->chipset < 0x98 || in nv50_screen_create()
1056 screen->base.device->chipset == 0xa0) { in nv50_screen_create()
1100 switch (dev->chipset & 0xf0) { in nv50_screen_create()
1109 switch (dev->chipset) { in nv50_screen_create()
1124 NOUVEAU_ERR("Not a known NV50 chipset: NV%02x\n", dev->chipset); in nv50_screen_create()
H A Dnv50_compute.c43 switch (dev->chipset & 0xf0) { in nv50_screen_compute_setup()
50 switch (dev->chipset) { in nv50_screen_compute_setup()
62 NOUVEAU_ERR("unsupported chipset: NV%02x\n", dev->chipset); in nv50_screen_compute_setup()
H A Dnv50_program.c328 nv50_program_translate(struct nv50_program *prog, uint16_t chipset, in nv50_program_translate() argument
341 info->target = chipset; in nv50_program_translate()
H A Dnv98_video.c232 ret = nouveau_vp3_load_firmware(dec, templ->profile, screen->device->chipset); in nv98_create_decoder()
/third_party/mesa3d/src/nouveau/codegen/
H A Dnv50_ir_target_gv100.cpp583 TargetGV100::TargetGV100(unsigned int chipset) in TargetGV100() argument
584 : TargetGM107(chipset) in TargetGV100()
589 Target *getTargetGV100(unsigned int chipset) in getTargetGV100() argument
591 return new TargetGV100(chipset); in getTargetGV100()
H A Dnv50_ir_lowering_nvc0.cpp936 const int chipset = prog->getTarget()->getChipset(); in handleTEX() local
996 if (chipset >= NVISA_GK104_CHIPSET) { in handleTEX()
1030 if (i->op != OP_TXD || chipset < NVISA_GM107_CHIPSET) { in handleTEX()
1040 i->op == OP_TXD || chipset < NVISA_GM107_CHIPSET)) { in handleTEX()
1050 else if (i->tex.rIndirectSrc >= 0 && chipset >= NVISA_GM107_CHIPSET) { in handleTEX()
1114 assert(chipset >= NVISA_GK104_CHIPSET || in handleTEX()
1121 if (i->op != OP_TXD || chipset < NVISA_GK104_CHIPSET) { in handleTEX()
1158 if (i->op == OP_TXD && chipset >= NVISA_GK104_CHIPSET) { in handleTEX()
1163 if (chipset >= NVISA_GM107_CHIPSET) in handleTEX()
1306 const int chipset in handleTXD() local
1361 const int chipset = prog->getTarget()->getChipset(); handleTXQ() local
[all...]
/third_party/mesa3d/src/gallium/drivers/nouveau/
H A Dnouveau_vp3_video.h214 unsigned chipset);
/third_party/libdrm/nouveau/
H A Dnouveau.c415 nvdev->base.chipset = info.chipset; in nouveau_device_new()
427 nvdev->base.chipset = v; in nouveau_device_new()
H A Dnouveau.h67 uint32_t chipset; member
/device/soc/rockchip/common/sdk_linux/drivers/gpu/drm/nouveau/
H A Dnouveau_drm.c283 } else if (device->info.chipset >= 0xa3 && device->info.chipset != 0xaa && device->info.chipset != 0xac) { in nouveau_accel_ce_init()
528 if (drm->client.device.info.chipset == 0xc1) { in nouveau_drm_device_init()
694 /* We need to check that the chipset is supported before booting in nouveau_drm_probe()
/third_party/libdrm/include/drm/
H A Dmga_drm.h282 int chipset; member
/third_party/backends/backend/
H A Dhp3900_rts8822.c1221 /* free chipset configuration */ in Free_Config()
1232 if (dev->chipset != NULL) in Free_Chipset()
1234 if (dev->chipset->name != NULL) in Free_Chipset()
1235 free (dev->chipset->name); in Free_Chipset()
1237 free (dev->chipset); in Free_Chipset()
1238 dev->chipset = NULL; in Free_Chipset()
1249 if (dev->chipset != NULL) in Load_Chipset()
1252 dev->chipset = malloc (sizeof (struct st_chip)); in Load_Chipset()
1253 if (dev->chipset != NULL) in Load_Chipset()
1257 memset (dev->chipset, in Load_Chipset()
[all...]
H A Dhp3900_types.c55 /* chipset models */
61 /* chipset capabilities */
654 /* next buffer will contain initial state registers of the chipset */
657 /* next structure will contain information and capabilities about chipset */
658 struct st_chip *chipset; member
H A Dhp3900_config.c45 /* returns information and capabilities about selected chipset model */
46 static SANE_Int cfg_chipset_get(SANE_Int model, struct st_chip *chipset);
48 /* returns the chipset model for each scanner */
400 /* returns the chipset model for each scanner */ in cfg_chipset_model_get()
403 SANE_Int device, chipset; in cfg_chipset_model_get() member
408 /*device , chipset */ in cfg_chipset_model_get()
428 rst = myreg[a].chipset; in cfg_chipset_model_get()
437 static SANE_Int cfg_chipset_get(SANE_Int model, struct st_chip *chipset) in cfg_chipset_get() argument
439 /* returns info and capabilities of selected chipset */ in cfg_chipset_get()
442 if (chipset ! in cfg_chipset_get()
[all...]
/third_party/ltp/testcases/kernel/device-drivers/agp/kernel_space/
H A Dstr_agp.h368 enum chipset_type chipset; member

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