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/kernel/linux/linux-5.10/drivers/crypto/amlogic/
H A Damlogic-gxl-cipher.c72 skcipher_request_set_callback(&rctx->fallback_req, areq->base.flags, in meson_cipher_do_fallback()
73 areq->base.complete, areq->base.data); in meson_cipher_do_fallback()
107 crypto_tfm_alg_name(areq->base.tfm), in meson_cipher()
228 writel(mc->chanlist[flow].t_phy | 2, mc->base + (flow << 2)); in meson_cipher()
265 struct skcipher_request *breq = container_of(areq, struct skcipher_request, base); in meson_handle_cipher_request()
/kernel/linux/linux-5.10/drivers/clk/
H A Dclk-axi-clkgen.c50 void __iomem *base; member
216 writel(val, axi_clkgen->base + reg); in axi_clkgen_write()
222 *val = readl(axi_clkgen->base + reg); in axi_clkgen_read()
516 axi_clkgen->base = devm_ioremap_resource(&pdev->dev, mem); in axi_clkgen_probe()
517 if (IS_ERR(axi_clkgen->base)) in axi_clkgen_probe()
518 return PTR_ERR(axi_clkgen->base); in axi_clkgen_probe()
/kernel/linux/linux-5.10/drivers/fpga/
H A Ddfl.h405 static inline bool dfl_feature_is_fme(void __iomem *base) in dfl_feature_is_fme() argument
407 u64 v = readq(base + DFH); in dfl_feature_is_fme()
413 static inline bool dfl_feature_is_port(void __iomem *base) in dfl_feature_is_port() argument
415 u64 v = readq(base + DFH); in dfl_feature_is_port()
421 static inline u8 dfl_feature_revision(void __iomem *base) in dfl_feature_revision() argument
423 return (u8)FIELD_GET(DFH_REVISION, readq(base + DFH)); in dfl_feature_revision()
444 * @start: base address of this device feature list.
465 * @region: base fpga region.
/kernel/linux/linux-5.10/arch/arm/mach-omap1/
H A Dsleep.S76 @ load base address of Traffic Controller
92 @ load base address of ARM_IDLECT1 and ARM_IDLECT2
151 @ load base address of Traffic Controller
177 @ load base address of ARM_IDLECT1 and ARM_IDLECT2
231 @ Load base address of Traffic Controller
247 @ Load base address of ARM_IDLECT1 and ARM_IDLECT2
/kernel/linux/linux-5.10/arch/parisc/kernel/
H A Dinventory.c649 unsigned int base; in do_device_inventory() local
651 base = ((unsigned long long) PAGE0->pad0[2] << 32) in do_device_inventory()
655 res[0].start = base; in do_device_inventory()
656 res[0].end = base + 8 - 1; in do_device_inventory()
667 if (base) { in do_device_inventory()
668 pr_info("Found qemu fw_cfg interface at %#08x\n", base); in do_device_inventory()
/kernel/linux/linux-5.10/arch/mips/pci/
H A Dpci-rt3883.c59 void __iomem *base; member
83 return ioread32(rpc->base + reg); in rt3883_pci_r32()
89 iowrite32(val, rpc->base + reg); in rt3883_pci_w32()
424 rpc->base = devm_ioremap_resource(dev, res); in rt3883_pci_probe()
425 if (IS_ERR(rpc->base)) in rt3883_pci_probe()
426 return PTR_ERR(rpc->base); in rt3883_pci_probe()
/kernel/linux/linux-5.10/arch/s390/hypfs/
H A Dhypfs_diag.c408 void *base; in dbfs_d204_create() local
411 base = vzalloc(buf_size); in dbfs_d204_create()
412 if (!base) in dbfs_d204_create()
414 d204 = page_align_ptr(base + sizeof(d204->hdr)) - sizeof(d204->hdr); in dbfs_d204_create()
417 vfree(base); in dbfs_d204_create()
424 *data_free_ptr = base; in dbfs_d204_create()
/kernel/linux/linux-5.10/drivers/base/regmap/
H A Dregcache-rbtree.c26 /* base register handled by this block */
42 unsigned int *base, unsigned int *top) in regcache_rbtree_get_base_top_reg()
44 *base = rbnode->base_reg; in regcache_rbtree_get_base_top_reg()
108 /* base and top registers of the current rbnode */ in regcache_rbtree_insert()
111 /* base register of the rbnode to be added */ in regcache_rbtree_insert()
138 unsigned int base, top; in rbtree_show() local
155 regcache_rbtree_get_base_top_reg(map, n, &base, &top); in rbtree_show()
156 this_registers = ((top - base) / map->reg_stride) + 1; in rbtree_show()
157 seq_printf(s, "%x-%x (%d)\n", base, top, this_registers); in rbtree_show()
307 /* update the rbnode block, its size and the base registe in regcache_rbtree_insert_to_block()
39 regcache_rbtree_get_base_top_reg( struct regmap *map, struct regcache_rbtree_node *rbnode, unsigned int *base, unsigned int *top) regcache_rbtree_get_base_top_reg() argument
[all...]
/kernel/linux/linux-5.10/arch/x86/kvm/
H A Dmtrr.c80 /* MTRR base */ in kvm_mtrr_valid()
300 *start = range->base & PAGE_MASK; in var_mtrr_range()
363 cur->base = data; in set_var_mtrr_msr()
370 if (cur->base >= tmp->base) in set_var_mtrr_msr()
429 *pdata = vcpu->arch.mtrr_state.var_ranges[index].base; in kvm_mtrr_get_msr()
505 * Range has the minimum base address which interleaves in match_var_range()
600 iter->mem_type = iter->range->base & 0xff; in mtrr_lookup_okay()
/kernel/linux/linux-5.10/drivers/clk/samsung/
H A Dclk.c23 void samsung_clk_save(void __iomem *base, in samsung_clk_save() argument
28 rd->value = readl(base + rd->offset); in samsung_clk_save()
31 void samsung_clk_restore(void __iomem *base, in samsung_clk_restore() argument
36 writel(rd->value, base + rd->offset); in samsung_clk_restore()
58 void __iomem *base, unsigned long nr_clks) in samsung_clk_init()
70 ctx->reg_base = base; in samsung_clk_init()
57 samsung_clk_init(struct device_node *np, void __iomem *base, unsigned long nr_clks) samsung_clk_init() argument
/kernel/linux/linux-5.10/drivers/clocksource/
H A Dsh_mtu2.c36 void __iomem *base; member
166 return ioread16(ch->base + offs); in sh_mtu2_read()
168 return ioread8(ch->base + offs); in sh_mtu2_read()
182 iowrite16(value, ch->base + offs); in sh_mtu2_write()
184 iowrite8(value, ch->base + offs); in sh_mtu2_write()
364 ch->base = mtu->mapbase + sh_mtu2_channel_offsets[index]; in sh_mtu2_setup_channel()
/kernel/linux/linux-5.10/drivers/gpio/
H A Dgpio-uniphier.c223 u32 base, parent_base, size; in uniphier_gpio_irq_get_parent_hwirq() local
233 base = be32_to_cpu(*range++); in uniphier_gpio_irq_get_parent_hwirq()
237 if (base <= hwirq && hwirq < base + size) in uniphier_gpio_irq_get_parent_hwirq()
238 return hwirq - base + parent_base; in uniphier_gpio_irq_get_parent_hwirq()
386 chip->base = -1; in uniphier_gpio_probe()
H A Dgpio-lpc32xx.c407 .base = LPC32XX_GPIO_P0_GRP,
423 .base = LPC32XX_GPIO_P1_GRP,
438 .base = LPC32XX_GPIO_P2_GRP,
454 .base = LPC32XX_GPIO_P3_GRP,
468 .base = LPC32XX_GPI_P3_GRP,
482 .base = LPC32XX_GPO_P3_GRP,
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_dma_buf.c155 dma_resv_add_excl_fence(obj, &array->base); in __dma_resv_make_exclusive()
156 dma_fence_put(&array->base); in __dma_resv_make_exclusive()
202 r = __dma_resv_make_exclusive(bo->tbo.base.resv); in amdgpu_dma_buf_attach()
536 struct dma_resv *resv = vm->root.base.bo->tbo.base.resv; in amdgpu_dma_buf_move_notify()
629 struct drm_gem_object *obj = &bo->tbo.base; in amdgpu_dmabuf_is_xgmi_accessible()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_hubp.c39 hubp2->base.ctx
107 * base on address->grph.dcc_const_color in hubp3_program_surface_flip_and_addr()
522 hubp2->base.funcs = &dcn30_hubp_funcs; in hubp3_construct()
523 hubp2->base.ctx = ctx; in hubp3_construct()
527 hubp2->base.inst = inst; in hubp3_construct()
528 hubp2->base.opp_id = OPP_ID_INVALID; in hubp3_construct()
529 hubp2->base.mpcc_id = 0xf; in hubp3_construct()
H A Ddcn30_dwb_cm.c40 dwbc30->base.ctx
47 container_of(dwbc_base, struct dcn30_dwbc, base)
110 cm_helper_program_gamcor_xfer_func(dwbc30->base.ctx, params, &gam_regs); in dwb3_program_ogam_luta_settings()
143 cm_helper_program_gamcor_xfer_func(dwbc30->base.ctx, params, &gam_regs); in dwb3_program_ogam_lutb_settings()
326 dwbc30->base.ctx, in dwb3_program_gamut_remap()
335 dwbc30->base.ctx, in dwb3_program_gamut_remap()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_hubbub.c35 hubbub1->base.ctx
45 hubbub1->base.ctx
597 if (hubbub1->base.ctx->dc->clk_mgr->clks.prev_p_state_change_support == true && in hubbub2_program_watermarks()
598 hubbub1->base.ctx->dc->clk_mgr->clks.p_state_change_support == false) in hubbub2_program_watermarks()
631 hubbub->base.ctx = ctx; in hubbub2_construct()
633 hubbub->base.funcs = &hubbub2_funcs; in hubbub2_construct()
/kernel/linux/linux-5.10/drivers/mtd/nand/raw/
H A Dnand_hynix.c415 memorg = nanddev_get_memorg(&chip->base); in hynix_nand_extract_oobsize()
498 struct nand_device *base = &chip->base; in hynix_nand_extract_ecc_requirements() local
581 nanddev_set_ecc_requirements(base, &requirements); in hynix_nand_extract_ecc_requirements()
590 if (nanddev_bits_per_cell(&chip->base) > 2) in hynix_nand_extract_scrambling_requirements()
616 memorg = nanddev_get_memorg(&chip->base); in hynix_nand_decode_id()
/kernel/linux/linux-6.6/arch/mips/pci/
H A Dpci-rt3883.c60 void __iomem *base; member
84 return ioread32(rpc->base + reg); in rt3883_pci_r32()
90 iowrite32(val, rpc->base + reg); in rt3883_pci_w32()
416 rpc->base = devm_platform_ioremap_resource(pdev, 0); in rt3883_pci_probe()
417 if (IS_ERR(rpc->base)) in rt3883_pci_probe()
418 return PTR_ERR(rpc->base); in rt3883_pci_probe()
/kernel/linux/linux-6.6/arch/parisc/kernel/
H A Dinventory.c649 unsigned int base; in do_device_inventory() local
651 base = ((unsigned long long) PAGE0->pad0[2] << 32) in do_device_inventory()
655 res[0].start = base; in do_device_inventory()
656 res[0].end = base + 8 - 1; in do_device_inventory()
667 if (base) { in do_device_inventory()
668 pr_info("Found qemu fw_cfg interface at %#08x\n", base); in do_device_inventory()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gem/selftests/
H A Di915_gem_object_blt.c29 struct drm_i915_private *i915 = to_i915(obj->base.dev); in __perf_fill_blt()
71 obj->base.size >> 10, in __perf_fill_blt()
72 div64_u64(mul_u32_u32(4 * obj->base.size, in __perf_fill_blt()
109 struct drm_i915_private *i915 = to_i915(src->base.dev); in __perf_copy_blt()
151 src->base.size >> 10, in __perf_copy_blt()
152 div64_u64(mul_u32_u32(4 * src->base.size, in __perf_copy_blt()
/kernel/linux/linux-5.10/drivers/irqchip/
H A Dirq-pruss-intc.c99 * @base: base virtual address of INTC register space
109 void __iomem *base; member
128 return readl_relaxed(intc->base + reg); in pruss_intc_read_reg()
134 writel_relaxed(val, intc->base + reg); in pruss_intc_write_reg()
543 intc->base = devm_platform_ioremap_resource(pdev, 0); in pruss_intc_probe()
544 if (IS_ERR(intc->base)) in pruss_intc_probe()
545 return PTR_ERR(intc->base); in pruss_intc_probe()
H A Dirq-meson-gpio.c138 void __iomem *base; member
152 tmp = readl_relaxed(ctl->base + reg); in meson_gpio_irq_update_bits()
155 writel_relaxed(tmp, ctl->base + reg); in meson_gpio_irq_update_bits()
232 * it, using the table base. in meson_gpio_irq_request_channel()
490 ctl->base = of_iomap(node, 0); in meson_gpio_irq_of_init()
491 if (!ctl->base) { in meson_gpio_irq_of_init()
517 iounmap(ctl->base); in meson_gpio_irq_of_init()
/kernel/linux/linux-5.10/drivers/gpu/drm/qxl/
H A Dqxl_drv.h97 #define gem_to_qxl_bo(gobj) container_of((gobj), struct qxl_bo, tbo.base)
110 struct drm_crtc base; member
118 struct drm_connector base; member
122 #define to_qxl_crtc(x) container_of(x, struct qxl_crtc, base)
123 #define drm_connector_to_qxl_output(x) container_of(x, struct qxl_output, base)
149 struct dma_fence base; member
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/uc/
H A Dintel_uc.c350 u32 base = intel_wopcm_guc_base(&gt->i915->wopcm); in uc_init_wopcm() local
356 if (unlikely(!base || !size)) { in uc_init_wopcm()
362 GEM_BUG_ON(!(base & GUC_WOPCM_OFFSET_MASK)); in uc_init_wopcm()
363 GEM_BUG_ON(base & ~GUC_WOPCM_OFFSET_MASK); in uc_init_wopcm()
379 base | huc_agent, mask, in uc_init_wopcm()
380 base | huc_agent | in uc_init_wopcm()

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