/third_party/node/deps/v8/third_party/zlib/google/ |
H A D | zip_internal.cc | 13 #include "base/files/file_path.h" 14 #include "base/logging.h" 15 #include "base/no_destructor.h" 16 #include "base/notreached.h" 17 #include "base/strings/string_util.h" 18 #include "base/strings/utf_string_conversions.h" 65 base::UTF8ToWide(static_cast<const char*>(filename)).c_str(), in ZipOpenFunc() 252 zip_fileinfo TimeToZipFileInfo(const base::Time& file_time) { in TimeToZipFileInfo() 253 base::Time::Exploded file_time_parts; in TimeToZipFileInfo() 356 base in ZipOpenNewFileInZip() [all...] |
/third_party/libinput/src/ |
H A D | util-strings.h | 144 safe_atoi_base(const char *str, int *val, int base) in safe_atoi_base() argument 151 assert(base == 10 || base == 16 || base == 8); in safe_atoi_base() 154 v = strtol(str, &endptr, base); in safe_atoi_base() 177 safe_atou_base(const char *str, unsigned int *val, int base) in safe_atou_base() argument 184 assert(base == 10 || base == 16 || base == 8); in safe_atou_base() 187 v = strtoul(str, &endptr, base); in safe_atou_base() [all...] |
/third_party/node/deps/v8/src/compiler/ |
H A D | js-context-specialization.cc | 101 base::Optional<ContextRef> GetSpecializationContext( in GetSpecializationContext() 131 return base::Optional<ContextRef>(); in GetSpecializationContext() 145 base::Optional<ContextRef> maybe_concrete = in ReduceJSLoadContext() 168 base::Optional<ObjectRef> maybe_value; in ReduceJSLoadContext() 208 base::Optional<ContextRef> maybe_concrete = in ReduceJSStoreContext() 227 base::Optional<ContextRef> GetModuleContext(JSHeapBroker* broker, Node* node, in GetModuleContext() 269 return base::Optional<ContextRef>(); in GetModuleContext() 273 base::Optional<ContextRef> maybe_context = in ReduceJSGetImportMeta() 278 base::Optional<ObjectRef> module = context.get(Context::EXTENSION_INDEX); in ReduceJSGetImportMeta() 280 base in ReduceJSGetImportMeta() [all...] |
/third_party/node/deps/v8/src/base/ |
H A D | macros.h | 11 #include "src/base/compiler-specific.h" 12 #include "src/base/logging.h" 13 #include "src/base/platform/wrappers.h" 24 #define UNIQUE_IDENTIFIER(base) CONCAT(base, __COUNTER__) 151 void* operator new(size_t) { v8::base::OS::Abort(); } \ 152 void* operator new[](size_t) { v8::base::OS::Abort(); } \ 153 void operator delete(void*, size_t) { v8::base::OS::Abort(); } \ 154 void operator delete[](void*, size_t) { v8::base::OS::Abort(); } 197 namespace base { namespace [all...] |
/third_party/node/deps/v8/src/utils/ |
H A D | allocation.h | 9 #include "src/base/address-region.h" 10 #include "src/base/compiler-specific.h" 11 #include "src/base/platform/platform.h" 17 namespace base { namespace 19 } // namespace base 53 base::is_trivially_copyable<T>::value>::type> 97 void* AllocWithRetry(size_t size, MallocFn = base::Malloc); 243 const base::AddressRegion& region() const { return region_; } in region() 287 base::AddressRegion region_; 301 // start cage base allocatabl 352 Address base() const { return base_; } base() function in v8::internal::VirtualMemoryCage [all...] |
/third_party/mesa3d/src/gallium/drivers/lima/ |
H A D | lima_context.c | 220 ctx->base.screen = pscreen; in lima_context_create() 221 ctx->base.destroy = lima_context_destroy; in lima_context_create() 222 ctx->base.set_debug_callback = lima_set_debug_callback; in lima_context_create() 223 ctx->base.invalidate_resource = lima_invalidate_resource; in lima_context_create() 234 ctx->blitter = util_blitter_create(&ctx->base); in lima_context_create() 238 ctx->uploader = u_upload_create_default(&ctx->base); in lima_context_create() 241 ctx->base.stream_uploader = ctx->uploader; in lima_context_create() 242 ctx->base.const_uploader = ctx->uploader; in lima_context_create() 294 return &ctx->base; in lima_context_create() 297 lima_context_destroy(&ctx->base); in lima_context_create() [all...] |
/foundation/multimedia/av_codec/services/media_engine/plugins/ffmpeg_adapter/common/ |
H A D | ffmpeg_utils.cpp | 89 int64_t ConvertTimeFromFFmpeg(int64_t pts, AVRational base) in ConvertTimeFromFFmpeg() argument 96 out = av_rescale_q(pts, base, bq); in ConvertTimeFromFFmpeg() 99 PUBLIC_LOG_D64 "]->[" PUBLIC_LOG_D64 "].", base.num, base.den, pts, out); in ConvertTimeFromFFmpeg() 120 int64_t ConvertTimeToFFmpeg(int64_t timestampNs, AVRational base) in ConvertTimeToFFmpeg() argument 123 if (base.num == 0) { in ConvertTimeToFFmpeg() 127 result = av_rescale_q(timestampNs, bq, base); in ConvertTimeToFFmpeg() 130 PUBLIC_LOG_D64 "]->[" PUBLIC_LOG_D64 "].", base.num, base.den, timestampNs, result); in ConvertTimeToFFmpeg() 134 int64_t ConvertTimeToFFmpegByUs(int64_t timestampUs, AVRational base) in ConvertTimeToFFmpegByUs() argument [all...] |
/kernel/linux/linux-5.10/crypto/ |
H A D | authencesn.c | 255 req->base.complete, req->base.data); in crypto_authenc_esn_decrypt_tail() 415 auth_base = &auth->base; in crypto_authenc_esn_create() 424 if (snprintf(inst->alg.base.cra_name, CRYPTO_MAX_ALG_NAME, in crypto_authenc_esn_create() 426 enc->base.cra_name) >= CRYPTO_MAX_ALG_NAME) in crypto_authenc_esn_create() 429 if (snprintf(inst->alg.base.cra_driver_name, CRYPTO_MAX_ALG_NAME, in crypto_authenc_esn_create() 431 enc->base.cra_driver_name) >= CRYPTO_MAX_ALG_NAME) in crypto_authenc_esn_create() 434 inst->alg.base.cra_priority = enc->base.cra_priority * 10 + in crypto_authenc_esn_create() 436 inst->alg.base in crypto_authenc_esn_create() [all...] |
H A D | authenc.c | 257 req->base.complete, req->base.data); in crypto_authenc_decrypt_tail() 397 auth_base = &auth->base; in crypto_authenc_create() 409 if (snprintf(inst->alg.base.cra_name, CRYPTO_MAX_ALG_NAME, in crypto_authenc_create() 411 enc->base.cra_name) >= in crypto_authenc_create() 415 if (snprintf(inst->alg.base.cra_driver_name, CRYPTO_MAX_ALG_NAME, in crypto_authenc_create() 417 enc->base.cra_driver_name) >= CRYPTO_MAX_ALG_NAME) in crypto_authenc_create() 420 inst->alg.base.cra_priority = enc->base.cra_priority * 10 + in crypto_authenc_create() 422 inst->alg.base in crypto_authenc_create() [all...] |
H A D | xts.c | 182 skcipher_request_set_callback(subreq, req->base.flags, xts_cts_done, in xts_cts_final() 205 rctx->subreq.base.flags &= CRYPTO_TFM_REQ_MAY_BACKLOG; in xts_encrypt_done() 225 rctx->subreq.base.flags &= CRYPTO_TFM_REQ_MAY_BACKLOG; in xts_decrypt_done() 250 skcipher_request_set_callback(subreq, req->base.flags, compl, req); in xts_init_crypt() 380 if (alg->base.cra_blocksize != XTS_BLOCK_SIZE) in xts_create() 387 &alg->base); in xts_create() 392 cipher_name = alg->base.cra_name; in xts_create() 409 if (snprintf(inst->alg.base.cra_name, CRYPTO_MAX_ALG_NAME, in xts_create() 417 inst->alg.base.cra_priority = alg->base in xts_create() [all...] |
/kernel/linux/linux-5.10/drivers/crypto/ |
H A D | padlock-aes.c | 395 .base.cra_name = "ecb(aes)", 396 .base.cra_driver_name = "ecb-aes-padlock", 397 .base.cra_priority = PADLOCK_COMPOSITE_PRIORITY, 398 .base.cra_blocksize = AES_BLOCK_SIZE, 399 .base.cra_ctxsize = sizeof(struct aes_ctx), 400 .base.cra_alignmask = PADLOCK_ALIGNMENT - 1, 401 .base.cra_module = THIS_MODULE, 462 .base.cra_name = "cbc(aes)", 463 .base.cra_driver_name = "cbc-aes-padlock", 464 .base [all...] |
/kernel/linux/linux-5.10/drivers/clk/samsung/ |
H A D | clk-s3c2410-dclk.c | 130 void __iomem *base; member 181 dclk_con = readl_relaxed(s3c24xx_dclk->base); in s3c24xx_dclk_update_cmp() 189 writel_relaxed(dclk_con, s3c24xx_dclk->base); in s3c24xx_dclk_update_cmp() 225 s3c24xx_dclk->reg_save = readl_relaxed(s3c24xx_dclk->base); in s3c24xx_dclk_suspend() 233 writel_relaxed(s3c24xx_dclk->reg_save, s3c24xx_dclk->base); in s3c24xx_dclk_resume() 262 s3c24xx_dclk->base = devm_platform_ioremap_resource(pdev, 0); in s3c24xx_dclk_probe() 263 if (IS_ERR(s3c24xx_dclk->base)) in s3c24xx_dclk_probe() 264 return PTR_ERR(s3c24xx_dclk->base); in s3c24xx_dclk_probe() 273 s3c24xx_dclk->base, 1, 1, 0, in s3c24xx_dclk_probe() 278 s3c24xx_dclk->base, 1 in s3c24xx_dclk_probe() [all...] |
/kernel/linux/linux-5.10/arch/powerpc/kernel/ |
H A D | tm.S | 20 #define __SAVE_32FPRS_VSRS(n,c,base) \ 24 SAVE_32FPRS(n,base); \ 26 2: SAVE_32VSRS(n,c,base); \ 28 #define __REST_32FPRS_VSRS(n,c,base) \ 32 REST_32FPRS(n,base); \ 34 2: REST_32VSRS(n,c,base); \ 37 #define __SAVE_32FPRS_VSRS(n,c,base) SAVE_32FPRS(n, base) 38 #define __REST_32FPRS_VSRS(n,c,base) REST_32FPRS(n, base) [all...] |
/kernel/linux/linux-5.10/arch/mips/kernel/ |
H A D | r4k_fpu.S | 229 .macro op_one_wr op, idx, base 231 \idx: \op \idx, 0, \base 295 .macro save_msa_upper wr, off, base 300 EX sd $1, \off(\base) 303 EX sw $1, \off(\base) 305 EX sw $1, (\off+4)(\base) 308 EX sw $1, (\off+4)(\base) 310 EX sw $1, \off(\base) 352 .macro restore_msa_upper wr, off, base 356 EX ld $1, \off(\base) [all...] |
/kernel/linux/linux-5.10/drivers/crypto/ccp/ |
H A D | ccp-crypto-aes-cmac.c | 108 gfp = req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP ? in ccp_do_cmac_update() 173 ret = ccp_crypto_enqueue_request(&req->base, &rctx->cmd); in ccp_do_cmac_update() 353 struct crypto_alg *base; in ccp_register_aes_cmac_algs() local 377 base = &halg->base; in ccp_register_aes_cmac_algs() 378 snprintf(base->cra_name, CRYPTO_MAX_ALG_NAME, "cmac(aes)"); in ccp_register_aes_cmac_algs() 379 snprintf(base->cra_driver_name, CRYPTO_MAX_ALG_NAME, "cmac-aes-ccp"); in ccp_register_aes_cmac_algs() 380 base->cra_flags = CRYPTO_ALG_ASYNC | in ccp_register_aes_cmac_algs() 384 base->cra_blocksize = AES_BLOCK_SIZE; in ccp_register_aes_cmac_algs() 385 base in ccp_register_aes_cmac_algs() [all...] |
/kernel/linux/linux-5.10/drivers/clk/ingenic/ |
H A D | jz4780-cgu.c | 111 usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1); in jz4780_otg_phy_recalc_rate() 175 usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1); in jz4780_otg_phy_set_rate() 178 writel(usbpcr1, cgu->base + CGU_REG_USBPCR1); in jz4780_otg_phy_set_rate() 186 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in jz4780_otg_phy_enable() 187 void __iomem *reg_usbpcr = cgu->base + CGU_REG_USBPCR; in jz4780_otg_phy_enable() 196 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in jz4780_otg_phy_disable() 197 void __iomem *reg_usbpcr = cgu->base + CGU_REG_USBPCR; in jz4780_otg_phy_disable() 205 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in jz4780_otg_phy_is_enabled() 206 void __iomem *reg_usbpcr = cgu->base + CGU_REG_USBPCR; in jz4780_otg_phy_is_enabled() 234 lcr = readl(cgu->base in jz4780_core1_enable() [all...] |
/kernel/linux/linux-6.6/arch/mips/kernel/ |
H A D | r4k_fpu.S | 229 .macro op_one_wr op, idx, base 231 \idx: \op \idx, 0, \base 295 .macro save_msa_upper wr, off, base 300 EX sd $1, \off(\base) 303 EX sw $1, \off(\base) 305 EX sw $1, (\off+4)(\base) 308 EX sw $1, (\off+4)(\base) 310 EX sw $1, \off(\base) 352 .macro restore_msa_upper wr, off, base 356 EX ld $1, \off(\base) [all...] |
/kernel/linux/linux-6.6/arch/powerpc/kernel/ |
H A D | tm.S | 20 #define __SAVE_32FPRS_VSRS(n,c,base) \ 24 SAVE_32FPRS(n,base); \ 26 2: SAVE_32VSRS(n,c,base); \ 28 #define __REST_32FPRS_VSRS(n,c,base) \ 32 REST_32FPRS(n,base); \ 34 2: REST_32VSRS(n,c,base); \ 37 #define __SAVE_32FPRS_VSRS(n,c,base) SAVE_32FPRS(n, base) 38 #define __REST_32FPRS_VSRS(n,c,base) REST_32FPRS(n, base) [all...] |
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/ |
H A D | sysfs_engines.c | 15 struct kobject base; member 21 return container_of(kobj, struct kobj_engine, base)->engine; in kobj_to_engine() 437 kobject_init(&ke->base, &kobj_engine_type); in kobj_engine() 440 if (kobject_add(&ke->base, dir, "%s", engine->name)) { in kobj_engine() 441 kobject_put(&ke->base); in kobj_engine() 446 return &ke->base; in kobj_engine() 465 kobject_init(&ke->base, &kobj_engine_type); in add_defaults() 468 if (kobject_add(&ke->base, &parent->base, "%s", ".defaults")) { in add_defaults() 469 kobject_put(&ke->base); in add_defaults() [all...] |
/kernel/linux/linux-5.10/drivers/gpu/drm/imx/ |
H A D | ipuv3-crtc.c | 33 struct drm_crtc base; member 46 return container_of(crtc, struct ipu_crtc, base); in to_ipu_crtc() 69 if (plane == &ipu_crtc->plane[0]->base) in ipu_crtc_disable_planes() 71 if (ipu_crtc->plane[1] && plane == &ipu_crtc->plane[1]->base) in ipu_crtc_disable_planes() 120 __drm_atomic_helper_crtc_reset(crtc, &state->base); in imx_drm_crtc_reset() 131 __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base); in imx_drm_crtc_duplicate_state() 133 WARN_ON(state->base.crtc != crtc); in imx_drm_crtc_duplicate_state() 134 state->base.crtc = crtc; in imx_drm_crtc_duplicate_state() 136 return &state->base; in imx_drm_crtc_duplicate_state() 176 struct drm_crtc *crtc = &ipu_crtc->base; in ipu_irq_handler() [all...] |
/kernel/linux/linux-5.10/drivers/i2c/busses/ |
H A D | i2c-amd8111.c | 26 int base; member 72 while ((inb(smbus->base + AMD_EC_SC) & AMD_EC_SC_IBF) && --timeout) in amd_ec_wait_write() 88 while ((~inb(smbus->base + AMD_EC_SC) & AMD_EC_SC_OBF) && --timeout) in amd_ec_wait_read() 108 outb(AMD_EC_CMD_RD, smbus->base + AMD_EC_CMD); in amd_ec_read() 113 outb(address, smbus->base + AMD_EC_DATA); in amd_ec_read() 118 *data = inb(smbus->base + AMD_EC_DATA); in amd_ec_read() 131 outb(AMD_EC_CMD_WR, smbus->base + AMD_EC_CMD); in amd_ec_write() 136 outb(address, smbus->base + AMD_EC_DATA); in amd_ec_write() 141 outb(data, smbus->base + AMD_EC_DATA); in amd_ec_write() 435 smbus->base in amd8111_probe() [all...] |
/kernel/linux/linux-5.10/drivers/ide/ |
H A D | icside.c | 118 void __iomem *base = state->irq_port; in icside_irqenable_arcin_v6() local 124 writeb(0, base + ICS_ARCIN_V6_INTROFFSET_1); in icside_irqenable_arcin_v6() 125 readb(base + ICS_ARCIN_V6_INTROFFSET_2); in icside_irqenable_arcin_v6() 128 writeb(0, base + ICS_ARCIN_V6_INTROFFSET_2); in icside_irqenable_arcin_v6() 129 readb(base + ICS_ARCIN_V6_INTROFFSET_1); in icside_irqenable_arcin_v6() 386 static void icside_setup_ports(struct ide_hw *hw, void __iomem *base, in icside_setup_ports() argument 389 unsigned long port = (unsigned long)base + info->dataoffset; in icside_setup_ports() 399 hw->io_ports.ctl_addr = (unsigned long)base + info->ctrloffset; in icside_setup_ports() 413 void __iomem *base; in icside_register_v5() local 418 base in icside_register_v5() [all...] |
/kernel/linux/linux-5.10/drivers/gpu/drm/qxl/ |
H A D | qxl_release.c | 67 release = container_of(fence, struct qxl_release, base); in qxl_fence_wait() 136 release->base.ops = NULL; in qxl_release_alloc() 145 release->base.seqno = ++qdev->release_seqno; in qxl_release_alloc() 189 if (release->base.ops) { in qxl_release_free() 193 dma_fence_signal(&release->base); in qxl_release_free() 194 dma_fence_put(&release->base); in qxl_release_free() 242 ret = dma_resv_reserve_shared(bo->tbo.base.resv, 1); in qxl_release_validate_bo() 247 ret = qxl_bo_check_id(to_qxl(bo->tbo.base.dev), bo); in qxl_release_validate_bo() 455 dma_fence_init(&release->base, &qxl_fence_ops, &qdev->release_lock, in qxl_release_fence_buffer_objects() 456 release->id | 0xf0000000, release->base in qxl_release_fence_buffer_objects() [all...] |
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/ |
H A D | intel_atomic_plane.c | 50 __drm_atomic_helper_plane_state_reset(&plane_state->uapi, &plane->base); in intel_plane_state_reset() 72 plane->base.state = &plane_state->uapi; in intel_plane_alloc() 79 intel_plane_destroy_state(&plane->base, plane->base.state); in intel_plane_free() 185 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in intel_plane_calc_min_cdclk() 232 plane->base.base.id, plane->base.name, in intel_plane_calc_min_cdclk() 234 crtc->base.base in intel_plane_calc_min_cdclk() [all...] |
/kernel/linux/linux-5.10/drivers/hwtracing/coresight/ |
H A D | coresight-catu.c | 78 * The base input address (used by the ETR, programmed in INADDR_{LO,HI}) 355 /* Get the table base address */ in catu_alloc_etr_buf() 404 return coresight_timeout(drvdata->base, in catu_wait_for_ready() 424 rc = coresight_claim_device_unlocked(drvdata->base); in catu_enable_hw() 458 CS_UNLOCK(catu_drvdata->base); in catu_enable() 460 CS_LOCK(catu_drvdata->base); in catu_enable() 470 coresight_disclaim_device_unlocked(drvdata->base); in catu_disable_hw() 485 CS_UNLOCK(catu_drvdata->base); in catu_disable() 487 CS_LOCK(catu_drvdata->base); in catu_disable() 508 void __iomem *base; in catu_probe() local [all...] |