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/third_party/node/deps/v8/src/libplatform/
H A Ddefault-platform.cc11 #include "src/base/bounded-page-allocator.h"
12 #include "src/base/debug/stack_trace.h"
13 #include "src/base/logging.h"
14 #include "src/base/page-allocator.h"
15 #include "src/base/platform/platform.h"
16 #include "src/base/platform/time.h"
17 #include "src/base/sys-info.h"
28 v8::base::debug::StackTrace trace; in PrintStackTrace()
31 v8::base::debug::DisableSignalStackDump(); in PrintStackTrace()
39 thread_pool_size = base in GetActualThreadPoolSize()
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/third_party/node/deps/v8/src/regexp/
H A Dregexp-macro-assembler.h8 #include "src/base/strings.h"
20 static const base::uc32 kLeadSurrogateStart = 0xd800;
21 static const base::uc32 kLeadSurrogateEnd = 0xdbff;
22 static const base::uc32 kTrailSurrogateStart = 0xdc00;
23 static const base::uc32 kTrailSurrogateEnd = 0xdfff;
24 static const base::uc32 kNonBmpStart = 0x10000;
25 static const base::uc32 kNonBmpEnd = 0x10ffff;
69 virtual void CheckCharacterGT(base::uc16 limit, Label* on_greater) = 0;
70 virtual void CheckCharacterLT(base::uc16 limit, Label* on_less) = 0;
89 virtual void CheckNotCharacterAfterMinusAnd(base
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/third_party/mesa3d/src/gallium/auxiliary/draw/
H A Ddraw_vs_exec.c51 struct draw_vertex_shader base; member
228 vs->base.state.type = PIPE_SHADER_IR_TGSI; in draw_create_vs_exec()
229 vs->base.state.tokens = nir_to_tgsi(state->ir.nir, draw->pipe->screen); in draw_create_vs_exec()
232 vs->base.state.type = state->type; in draw_create_vs_exec()
235 vs->base.state.tokens = tgsi_dup_tokens(state->tokens); in draw_create_vs_exec()
236 if (!vs->base.state.tokens) { in draw_create_vs_exec()
242 tgsi_scan_shader(vs->base.state.tokens, &vs->base.info); in draw_create_vs_exec()
244 vs->base.state.stream_output = state->stream_output; in draw_create_vs_exec()
245 vs->base in draw_create_vs_exec()
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/third_party/skia/third_party/externals/abseil-cpp/absl/strings/
H A Dnumbers_benchmark.cc22 #include "absl/base/internal/raw_logging.h"
45 // given `base`. `base` must be greater than or equal to 8.
46 int64_t RepeatedSevens(int num_digits, int base) { in RepeatedSevens() argument
47 ABSL_RAW_CHECK(base >= 8, ""); in RepeatedSevens()
49 while (--num_digits) num = base * num + 7; in RepeatedSevens()
55 const int base = state.range(1); in BM_safe_strto32_string() local
60 absl::numbers_internal::safe_strto32_base(str, &value, base)); in BM_safe_strto32_string()
62 ABSL_RAW_CHECK(value == RepeatedSevens(digits, base), ""); in BM_safe_strto32_string()
82 const int base in BM_safe_strto64_string() local
110 const int base = state.range(1); BM_safe_strtou32_string() local
137 const int base = state.range(1); BM_safe_strtou64_string() local
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/kernel/linux/linux-5.10/drivers/gpu/drm/omapdrm/dss/
H A Dhdmi4_core.c32 return core->base + HDMI_CORE_AV; in hdmi_av_base()
37 void __iomem *base = core->base; in hdmi4_core_ddc_init() local
40 REG_FLD_MOD(base, HDMI_CORE_AV_DPD, 0x7, 2, 0); in hdmi4_core_ddc_init()
43 if (REG_GET(base, HDMI_CORE_DDC_STATUS, 4, 4) == 1) { in hdmi4_core_ddc_init()
45 REG_FLD_MOD(base, HDMI_CORE_DDC_CMD, 0xf, 3, 0); in hdmi4_core_ddc_init()
47 if (hdmi_wait_for_bit_change(base, HDMI_CORE_DDC_STATUS, in hdmi4_core_ddc_init()
55 REG_FLD_MOD(base, HDMI_CORE_DDC_CMD, 0xA, 3, 0); in hdmi4_core_ddc_init()
58 if (hdmi_wait_for_bit_change(base, HDMI_CORE_DDC_STATUS, in hdmi4_core_ddc_init()
65 REG_FLD_MOD(base, HDMI_CORE_DDC_CM in hdmi4_core_ddc_init()
80 void __iomem *base = core->base; hdmi4_core_ddc_read() local
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/kernel/linux/linux-5.10/drivers/video/fbdev/omap2/omapfb/dss/
H A Dhdmi4_core.c33 return core->base + HDMI_CORE_AV; in hdmi_av_base()
38 void __iomem *base = core->base; in hdmi_core_ddc_init() local
41 REG_FLD_MOD(base, HDMI_CORE_AV_DPD, 0x7, 2, 0); in hdmi_core_ddc_init()
44 if (REG_GET(base, HDMI_CORE_DDC_STATUS, 4, 4) == 1) { in hdmi_core_ddc_init()
46 REG_FLD_MOD(base, HDMI_CORE_DDC_CMD, 0xf, 3, 0); in hdmi_core_ddc_init()
48 if (hdmi_wait_for_bit_change(base, HDMI_CORE_DDC_STATUS, in hdmi_core_ddc_init()
56 REG_FLD_MOD(base, HDMI_CORE_DDC_CMD, 0xA, 3, 0); in hdmi_core_ddc_init()
59 if (hdmi_wait_for_bit_change(base, HDMI_CORE_DDC_STATUS, in hdmi_core_ddc_init()
66 REG_FLD_MOD(base, HDMI_CORE_DDC_CM in hdmi_core_ddc_init()
81 void __iomem *base = core->base; hdmi_core_ddc_edid() local
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/kernel/linux/linux-5.10/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_resource.c45 dma_resv_assert_held(res->backup->base.base.resv); in vmw_resource_mob_attach()
72 dma_resv_assert_held(backup->base.base.resv); in vmw_resource_mob_detach()
123 struct ttm_buffer_object *bo = &res->backup->base; in vmw_resource_release()
260 struct ttm_base_object *base; in vmw_user_resource_lookup_handle() local
264 base = ttm_base_object_lookup(tfile, handle); in vmw_user_resource_lookup_handle()
265 if (unlikely(base == NULL)) in vmw_user_resource_lookup_handle()
268 if (unlikely(ttm_base_object_type(base) != converter->object_type)) in vmw_user_resource_lookup_handle()
271 res = converter->base_obj_to_res(base); in vmw_user_resource_lookup_handle()
304 struct ttm_base_object *base; vmw_user_resource_noref_lookup_handle() local
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/kernel/linux/linux-5.10/drivers/spi/
H A Dspi-uniphier.c26 void __iomem *base; member
113 val = readl(priv->base + SSI_IE); in uniphier_spi_irq_enable()
115 writel(val, priv->base + SSI_IE); in uniphier_spi_irq_enable()
123 val = readl(priv->base + SSI_IE); in uniphier_spi_irq_disable()
125 writel(val, priv->base + SSI_IE); in uniphier_spi_irq_disable()
171 writel(val1, priv->base + SSI_CKS); in uniphier_spi_set_mode()
172 writel(val2, priv->base + SSI_FPS); in uniphier_spi_set_mode()
177 writel(val1, priv->base + SSI_TXWDS); in uniphier_spi_set_mode()
178 writel(val1, priv->base + SSI_RXWDS); in uniphier_spi_set_mode()
186 val = readl(priv->base in uniphier_spi_set_transfer_size()
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/kernel/linux/linux-6.6/drivers/spi/
H A Dspi-uniphier.c26 void __iomem *base; member
113 val = readl(priv->base + SSI_IE); in uniphier_spi_irq_enable()
115 writel(val, priv->base + SSI_IE); in uniphier_spi_irq_enable()
123 val = readl(priv->base + SSI_IE); in uniphier_spi_irq_disable()
125 writel(val, priv->base + SSI_IE); in uniphier_spi_irq_disable()
171 writel(val1, priv->base + SSI_CKS); in uniphier_spi_set_mode()
172 writel(val2, priv->base + SSI_FPS); in uniphier_spi_set_mode()
177 writel(val1, priv->base + SSI_TXWDS); in uniphier_spi_set_mode()
178 writel(val1, priv->base + SSI_RXWDS); in uniphier_spi_set_mode()
186 val = readl(priv->base in uniphier_spi_set_transfer_size()
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/kernel/linux/linux-6.6/drivers/video/fbdev/omap2/omapfb/dss/
H A Dhdmi4_core.c33 return core->base + HDMI_CORE_AV; in hdmi_av_base()
38 void __iomem *base = core->base; in hdmi_core_ddc_init() local
41 REG_FLD_MOD(base, HDMI_CORE_AV_DPD, 0x7, 2, 0); in hdmi_core_ddc_init()
44 if (REG_GET(base, HDMI_CORE_DDC_STATUS, 4, 4) == 1) { in hdmi_core_ddc_init()
46 REG_FLD_MOD(base, HDMI_CORE_DDC_CMD, 0xf, 3, 0); in hdmi_core_ddc_init()
48 if (hdmi_wait_for_bit_change(base, HDMI_CORE_DDC_STATUS, in hdmi_core_ddc_init()
56 REG_FLD_MOD(base, HDMI_CORE_DDC_CMD, 0xA, 3, 0); in hdmi_core_ddc_init()
59 if (hdmi_wait_for_bit_change(base, HDMI_CORE_DDC_STATUS, in hdmi_core_ddc_init()
66 REG_FLD_MOD(base, HDMI_CORE_DDC_CM in hdmi_core_ddc_init()
81 void __iomem *base = core->base; hdmi_core_ddc_edid() local
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/kernel/linux/linux-6.6/drivers/gpu/drm/omapdrm/dss/
H A Dhdmi4_core.c32 return core->base + HDMI_CORE_AV; in hdmi_av_base()
37 void __iomem *base = core->base; in hdmi4_core_ddc_init() local
40 REG_FLD_MOD(base, HDMI_CORE_AV_DPD, 0x7, 2, 0); in hdmi4_core_ddc_init()
43 if (REG_GET(base, HDMI_CORE_DDC_STATUS, 4, 4) == 1) { in hdmi4_core_ddc_init()
45 REG_FLD_MOD(base, HDMI_CORE_DDC_CMD, 0xf, 3, 0); in hdmi4_core_ddc_init()
47 if (hdmi_wait_for_bit_change(base, HDMI_CORE_DDC_STATUS, in hdmi4_core_ddc_init()
55 REG_FLD_MOD(base, HDMI_CORE_DDC_CMD, 0xA, 3, 0); in hdmi4_core_ddc_init()
58 if (hdmi_wait_for_bit_change(base, HDMI_CORE_DDC_STATUS, in hdmi4_core_ddc_init()
65 REG_FLD_MOD(base, HDMI_CORE_DDC_CM in hdmi4_core_ddc_init()
80 void __iomem *base = core->base; hdmi4_core_ddc_read() local
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/kernel/linux/linux-6.6/drivers/i2c/busses/
H A Di2c-mpc.c85 void __iomem *base; member
117 writeb(x, i2c->base + MPC_I2C_CR); in writeccr()
132 writeb(0, i2c->base + MPC_I2C_SR); /* clear any status bits */ in mpc_i2c_fixup()
134 readb(i2c->base + MPC_I2C_DR); /* init xfer */ in mpc_i2c_fixup()
138 readb(i2c->base + MPC_I2C_DR); in mpc_i2c_fixup()
144 readb(i2c->base + MPC_I2C_DR); in mpc_i2c_fixup()
151 void __iomem *addr = i2c->base + MPC_I2C_SR; in i2c_mpc_wait_sr()
189 val = readb(i2c->base + MPC_I2C_SR); in mpc_i2c_fixup_A004447()
200 val = readb(i2c->base + MPC_I2C_DR); in mpc_i2c_fixup_A004447()
208 val = readb(i2c->base in mpc_i2c_fixup_A004447()
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/third_party/gn/src/gn/
H A Dohos_components_checker.cc12 #include "base/files/file_path.h"
13 #include "base/files/file_util.h"
14 #include "base/json/json_reader.h"
15 #include "base/values.h"
60 base::FilePath path(dir); in CreateScanOutDir()
61 base::CreateDirectory(path); in CreateScanOutDir()
70 base::FilePath path(dir); in RemoveScanOutDir()
71 base::DeleteFile(path, true); in RemoveScanOutDir()
75 static bool ReadBuildConfigFile(base::FilePath path, std::string &content) in ReadBuildConfigFile()
77 if (!base in ReadBuildConfigFile()
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/third_party/mesa3d/src/gallium/drivers/i915/
H A Di915_state.c1030 i915->base.create_blend_state = i915_create_blend_state; in i915_init_state_functions()
1031 i915->base.bind_blend_state = i915_bind_blend_state; in i915_init_state_functions()
1032 i915->base.delete_blend_state = i915_delete_blend_state; in i915_init_state_functions()
1034 i915->base.create_sampler_state = i915_create_sampler_state; in i915_init_state_functions()
1035 i915->base.bind_sampler_states = i915_bind_sampler_states; in i915_init_state_functions()
1036 i915->base.delete_sampler_state = i915_delete_sampler_state; in i915_init_state_functions()
1038 i915->base.create_depth_stencil_alpha_state = in i915_init_state_functions()
1040 i915->base.bind_depth_stencil_alpha_state = i915_bind_depth_stencil_state; in i915_init_state_functions()
1041 i915->base.delete_depth_stencil_alpha_state = in i915_init_state_functions()
1044 i915->base in i915_init_state_functions()
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/kernel/linux/linux-5.10/arch/sparc/crypto/
H A Daes_glue.c384 .base.cra_name = "ecb(aes)",
385 .base.cra_driver_name = "ecb-aes-sparc64",
386 .base.cra_priority = SPARC_CR_OPCODE_PRIORITY,
387 .base.cra_blocksize = AES_BLOCK_SIZE,
388 .base.cra_ctxsize = sizeof(struct crypto_sparc64_aes_ctx),
389 .base.cra_alignmask = 7,
390 .base.cra_module = THIS_MODULE,
397 .base.cra_name = "cbc(aes)",
398 .base.cra_driver_name = "cbc-aes-sparc64",
399 .base
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/kernel/linux/linux-5.10/crypto/
H A Dcts.c121 skcipher_request_set_callback(subreq, req->base.flags & in cts_cbc_encrypt()
159 skcipher_request_set_callback(subreq, req->base.flags, in crypto_cts_encrypt()
160 req->base.complete, in crypto_cts_encrypt()
161 req->base.data); in crypto_cts_encrypt()
170 skcipher_request_set_callback(subreq, req->base.flags, in crypto_cts_encrypt()
214 skcipher_request_set_callback(subreq, req->base.flags & in cts_cbc_decrypt()
254 skcipher_request_set_callback(subreq, req->base.flags, in crypto_cts_decrypt()
255 req->base.complete, in crypto_cts_decrypt()
256 req->base.data); in crypto_cts_decrypt()
262 skcipher_request_set_callback(subreq, req->base in crypto_cts_decrypt()
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/kernel/linux/linux-5.10/drivers/crypto/rockchip/
H A Drk3288_crypto_ahash.c44 rctx->fallback_req.base.flags = areq->base.flags & in rk_ahash_digest_fb()
118 rctx->fallback_req.base.flags = req->base.flags & in rk_ahash_init()
131 rctx->fallback_req.base.flags = req->base.flags & in rk_ahash_update()
146 rctx->fallback_req.base.flags = req->base.flags & in rk_ahash_final()
160 rctx->fallback_req.base.flags = req->base in rk_ahash_finup()
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/kernel/linux/linux-6.6/arch/sparc/crypto/
H A Daes_glue.c384 .base.cra_name = "ecb(aes)",
385 .base.cra_driver_name = "ecb-aes-sparc64",
386 .base.cra_priority = SPARC_CR_OPCODE_PRIORITY,
387 .base.cra_blocksize = AES_BLOCK_SIZE,
388 .base.cra_ctxsize = sizeof(struct crypto_sparc64_aes_ctx),
389 .base.cra_alignmask = 7,
390 .base.cra_module = THIS_MODULE,
397 .base.cra_name = "cbc(aes)",
398 .base.cra_driver_name = "cbc-aes-sparc64",
399 .base
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/kernel/linux/linux-5.10/drivers/net/
H A Dmdio.c365 cmd->base.phy_address = mdio->prtad; in mdio45_ethtool_ksettings_get_npage()
366 cmd->base.mdio_support = in mdio45_ethtool_ksettings_get_npage()
376 cmd->base.port = PORT_TP; in mdio45_ethtool_ksettings_get_npage()
395 cmd->base.port = PORT_OTHER; in mdio45_ethtool_ksettings_get_npage()
403 cmd->base.port = PORT_OTHER; in mdio45_ethtool_ksettings_get_npage()
422 cmd->base.port = PORT_FIBRE; in mdio45_ethtool_ksettings_get_npage()
433 cmd->base.autoneg = AUTONEG_ENABLE; in mdio45_ethtool_ksettings_get_npage()
439 cmd->base.autoneg = AUTONEG_DISABLE; in mdio45_ethtool_ksettings_get_npage()
442 cmd->base.autoneg = AUTONEG_DISABLE; in mdio45_ethtool_ksettings_get_npage()
445 if (cmd->base in mdio45_ethtool_ksettings_get_npage()
[all...]
/kernel/linux/linux-5.10/drivers/usb/dwc3/
H A Ddwc3-omap.c118 void __iomem *base; member
141 static inline u32 dwc3_omap_readl(void __iomem *base, u32 offset) in dwc3_omap_readl() argument
143 return readl(base + offset); in dwc3_omap_readl()
146 static inline void dwc3_omap_writel(void __iomem *base, u32 offset, u32 value) in dwc3_omap_writel() argument
148 writel(value, base + offset); in dwc3_omap_writel()
153 return dwc3_omap_readl(omap->base, USBOTGSS_UTMI_OTG_CTRL + in dwc3_omap_read_utmi_ctrl()
159 dwc3_omap_writel(omap->base, USBOTGSS_UTMI_OTG_CTRL + in dwc3_omap_write_utmi_ctrl()
166 return dwc3_omap_readl(omap->base, USBOTGSS_IRQSTATUS_RAW_0 - in dwc3_omap_read_irq0_status()
172 dwc3_omap_writel(omap->base, USBOTGSS_IRQSTATUS_0 - in dwc3_omap_write_irq0_status()
179 return dwc3_omap_readl(omap->base, USBOTGSS_IRQSTATUS_RAW_MIS in dwc3_omap_read_irqmisc_status()
465 void __iomem *base; dwc3_omap_probe() local
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Dgv100.c44 struct nvkm_subdev *subdev = &disp->base.engine.subdev; in gv100_disp_super()
51 list_for_each_entry(head, &disp->base.head, head) { in gv100_disp_super()
59 list_for_each_entry(head, &disp->base.head, head) { in gv100_disp_super()
66 list_for_each_entry(head, &disp->base.head, head) { in gv100_disp_super()
71 nvkm_outp_route(&disp->base); in gv100_disp_super()
72 list_for_each_entry(head, &disp->base.head, head) { in gv100_disp_super()
77 list_for_each_entry(head, &disp->base.head, head) { in gv100_disp_super()
84 list_for_each_entry(head, &disp->base.head, head) { in gv100_disp_super()
91 list_for_each_entry(head, &disp->base.head, head) in gv100_disp_super()
99 struct nvkm_subdev *subdev = &disp->base in gv100_disp_exception()
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/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dnv20.c34 struct nvkm_device *device = gr->base.engine.subdev.device; in nv20_gr_chan_fini()
75 nv20_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch, in nv20_gr_chan_new() argument
78 struct nv20_gr *gr = nv20_gr(base); in nv20_gr_chan_new()
89 ret = nvkm_memory_new(gr->base.engine.subdev.device, in nv20_gr_chan_new()
149 nv20_gr_tile(struct nvkm_gr *base, int i, struct nvkm_fb_tile *tile) in nv20_gr_tile() argument
151 struct nv20_gr *gr = nv20_gr(base); in nv20_gr_tile()
152 struct nvkm_device *device = gr->base.engine.subdev.device; in nv20_gr_tile()
157 nv04_gr_idle(&gr->base); in nv20_gr_tile()
180 nv20_gr_intr(struct nvkm_gr *base) in nv20_gr_intr() argument
182 struct nv20_gr *gr = nv20_gr(base); in nv20_gr_intr()
220 nv20_gr_oneinit(struct nvkm_gr *base) nv20_gr_oneinit() argument
229 nv20_gr_init(struct nvkm_gr *base) nv20_gr_init() argument
324 nv20_gr_dtor(struct nvkm_gr *base) nv20_gr_dtor() argument
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/kernel/linux/linux-5.10/drivers/perf/hisilicon/
H A Dhisi_uncore_hha_pmu.c61 return readq(hha_pmu->base + hisi_hha_pmu_get_counter_offset(idx)); in hisi_hha_pmu_read_counter()
75 writeq(val, hha_pmu->base + hisi_hha_pmu_get_counter_offset(idx)); in hisi_hha_pmu_write_counter()
95 val = readl(hha_pmu->base + reg); in hisi_hha_pmu_write_evtype()
98 writel(val, hha_pmu->base + reg); in hisi_hha_pmu_write_evtype()
109 val = readl(hha_pmu->base + HHA_PERF_CTRL); in hisi_hha_pmu_start_counters()
111 writel(val, hha_pmu->base + HHA_PERF_CTRL); in hisi_hha_pmu_start_counters()
122 val = readl(hha_pmu->base + HHA_PERF_CTRL); in hisi_hha_pmu_stop_counters()
124 writel(val, hha_pmu->base + HHA_PERF_CTRL); in hisi_hha_pmu_stop_counters()
133 val = readl(hha_pmu->base + HHA_EVENT_CTRL); in hisi_hha_pmu_enable_counter()
135 writel(val, hha_pmu->base in hisi_hha_pmu_enable_counter()
[all...]
H A Dhisi_uncore_l3c_pmu.c60 return readq(l3c_pmu->base + hisi_l3c_pmu_get_counter_offset(idx)); in hisi_l3c_pmu_read_counter()
74 writeq(val, l3c_pmu->base + hisi_l3c_pmu_get_counter_offset(idx)); in hisi_l3c_pmu_write_counter()
94 val = readl(l3c_pmu->base + reg); in hisi_l3c_pmu_write_evtype()
97 writel(val, l3c_pmu->base + reg); in hisi_l3c_pmu_write_evtype()
108 val = readl(l3c_pmu->base + L3C_PERF_CTRL); in hisi_l3c_pmu_start_counters()
110 writel(val, l3c_pmu->base + L3C_PERF_CTRL); in hisi_l3c_pmu_start_counters()
121 val = readl(l3c_pmu->base + L3C_PERF_CTRL); in hisi_l3c_pmu_stop_counters()
123 writel(val, l3c_pmu->base + L3C_PERF_CTRL); in hisi_l3c_pmu_stop_counters()
132 val = readl(l3c_pmu->base + L3C_EVENT_CTRL); in hisi_l3c_pmu_enable_counter()
134 writel(val, l3c_pmu->base in hisi_l3c_pmu_enable_counter()
[all...]
/kernel/linux/linux-6.6/drivers/net/ethernet/mellanox/mlxbf_gige/
H A Dmlxbf_gige_main.c95 p->rx_din_dropped_pkts += readq(priv->base + in mlxbf_gige_cache_stats()
97 p->rx_filter_passed_pkts += readq(priv->base + in mlxbf_gige_cache_stats()
99 p->rx_filter_discard_pkts += readq(priv->base + in mlxbf_gige_cache_stats()
110 control = readq(priv->base + MLXBF_GIGE_CONTROL); in mlxbf_gige_clean_port()
112 writeq(control, priv->base + MLXBF_GIGE_CONTROL); in mlxbf_gige_clean_port()
117 err = readq_poll_timeout_atomic(priv->base + MLXBF_GIGE_STATUS, temp, in mlxbf_gige_clean_port()
122 control = readq(priv->base + MLXBF_GIGE_CONTROL); in mlxbf_gige_clean_port()
124 writeq(control, priv->base + MLXBF_GIGE_CONTROL); in mlxbf_gige_clean_port()
138 control = readq(priv->base + MLXBF_GIGE_CONTROL); in mlxbf_gige_open()
140 writeq(control, priv->base in mlxbf_gige_open()
372 void __iomem *base; mlxbf_gige_probe() local
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