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/kernel/linux/linux-6.6/lib/
H A Dsort.c21 * @base: pointer to data
26 * The size must be a multiple of the alignment, and the base address must
33 static bool is_aligned(const void *base, size_t size, unsigned char align) in is_aligned() argument
37 (void)base; in is_aligned()
39 lsbits |= (unsigned char)(uintptr_t)base; in is_aligned()
50 * Exchange the two objects in memory. This exploits base+index addressing,
73 * Exchange the two objects in memory. This exploits base+index
78 * one requires base+index+4 addressing which x86 has but most other
91 /* Use two 32-bit transfers to avoid base+index+4 addressing */ in swap_words_64()
193 * @base
210 sort_r(void *base, size_t num, size_t size, cmp_r_func_t cmp_func, swap_r_func_t swap_func, const void *priv) sort_r() argument
281 sort(void *base, size_t num, size_t size, cmp_func_t cmp_func, swap_func_t swap_func) sort() argument
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/third_party/node/test/parallel/
H A Dtest-path-parse-format.js54 ['t', { base: 't', name: 't', root: '', dir: '', ext: '' }],
55 ['/foo/bar', { root: '/', dir: '/foo', base: 'bar', ext: '', name: 'bar' }],
60 [{ base: 'index.html' }, 'index.html'],
94 [{ base: 'index.html' }, 'index.html'],
125 [['.\\', { root: '', dir: '', base: '.', ext: '', name: '.' }],
126 ['\\\\', { root: '\\', dir: '\\', base: '', ext: '', name: '' }],
127 ['\\\\', { root: '\\', dir: '\\', base: '', ext: '', name: '' }],
129 { root: 'c:\\', dir: 'c:\\', base: 'foo', ext: '', name: 'foo' }],
133 base: 'bar.baz',
140 [['./', { root: '', dir: '', base
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/third_party/mesa3d/src/vulkan/runtime/
H A Dvk_log.c52 return container_of(obj, struct vk_physical_device, base); in vk_object_to_physical_device()
71 return container_of(obj, struct vk_instance, base); in vk_object_to_instance()
107 assert(instance->base.client_visible); in __vk_log_impl()
160 if (!instance->base.client_visible) { in __vk_log_impl()
183 struct vk_object_base *base = objects[i]; in __vk_log_impl() local
184 if (base == NULL || !base->client_visible) in __vk_log_impl()
187 switch (base->type) { in __vk_log_impl()
192 (struct vk_command_buffer *)base; in __vk_log_impl()
204 struct vk_queue *queue = (struct vk_queue *)base; in __vk_log_impl()
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/third_party/mesa3d/src/gallium/auxiliary/pipe-loader/
H A Dpipe_loader_drm.c57 struct pipe_loader_device base; member
132 ddev->base.type = PIPE_LOADER_DEVICE_PCI; in pipe_loader_drm_probe_fd_nodup()
133 ddev->base.u.pci.vendor_id = vendor_id; in pipe_loader_drm_probe_fd_nodup()
134 ddev->base.u.pci.chip_id = chip_id; in pipe_loader_drm_probe_fd_nodup()
136 ddev->base.type = PIPE_LOADER_DEVICE_PLATFORM; in pipe_loader_drm_probe_fd_nodup()
138 ddev->base.ops = &pipe_loader_drm_ops; in pipe_loader_drm_probe_fd_nodup()
141 ddev->base.driver_name = loader_get_driver_for_fd(fd); in pipe_loader_drm_probe_fd_nodup()
142 if (!ddev->base.driver_name) in pipe_loader_drm_probe_fd_nodup()
149 if (strcmp(ddev->base.driver_name, "amdgpu") == 0) { in pipe_loader_drm_probe_fd_nodup()
150 FREE(ddev->base in pipe_loader_drm_probe_fd_nodup()
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/kernel/linux/linux-6.6/drivers/crypto/inside-secure/
H A Dsafexcel_hash.c24 struct safexcel_context base; member
112 struct safexcel_crypto_priv *priv = ctx->base.priv; in safexcel_context_control()
125 memcpy(ctx->base.ctxr->data, &ctx->base.ipad, ctx->key_sz); in safexcel_context_control()
127 memcpy(ctx->base.ctxr->data, req->state, req->state_sz); in safexcel_context_control()
162 memcpy(ctx->base.ctxr->data, req->state, req->state_sz); in safexcel_context_control()
198 ctx->base.ctxr->data[req->state_sz >> 2] = in safexcel_context_control()
206 memcpy(ctx->base.ctxr->data + (req->state_sz >> 2), in safexcel_context_control()
207 &ctx->base.opad, req->state_sz); in safexcel_context_control()
276 memcpy(sreq->state, &ctx->base in safexcel_handle_req_result()
1167 safexcel_hmac_setkey(struct safexcel_context *base, const u8 *key, unsigned int keylen, const char *alg, unsigned int state_sz) safexcel_hmac_setkey() argument
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/third_party/skia/third_party/externals/zlib/google/
H A Dzip_writer.h11 #include "base/files/file_path.h"
38 const base::FilePath& root_dir,
41 static std::unique_ptr<ZipWriter> Create(const base::FilePath& zip_file,
42 const base::FilePath& root_dir,
50 bool WriteEntries(const std::vector<base::FilePath>& paths);
54 const base::FilePath& root_dir,
66 bool AddEntries(const std::vector<base::FilePath>& paths);
74 std::vector<base::FilePath> pending_entries_;
80 base::FilePath root_dir_;
/third_party/gn/src/gn/
H A Dparse_tree.cc13 #include "base/json/string_escape.h"
14 #include "base/stl_util.h"
15 #include "base/strings/string_number_conversions.h"
16 #include "base/strings/string_util.h"
64 if (!base::starts_with(str, "\"") || !base::ends_with(str, "\"")) in SplitAtFirst()
92 return node->AsAccessor()->base().value(); in GetStringRepresentation()
96 void AddLocationJSONNodes(base::Value* dict, LocationRange location) { in AddLocationJSONNodes()
97 base::Value loc(base in AddLocationJSONNodes()
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/kernel/linux/linux-5.10/arch/arm/crypto/
H A Daes-ce-glue.c589 .base.cra_name = "__ecb(aes)",
590 .base.cra_driver_name = "__ecb-aes-ce",
591 .base.cra_priority = 300,
592 .base.cra_flags = CRYPTO_ALG_INTERNAL,
593 .base.cra_blocksize = AES_BLOCK_SIZE,
594 .base.cra_ctxsize = sizeof(struct crypto_aes_ctx),
595 .base.cra_module = THIS_MODULE,
603 .base.cra_name = "__cbc(aes)",
604 .base.cra_driver_name = "__cbc-aes-ce",
605 .base
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/kernel/linux/linux-5.10/drivers/net/can/
H A Dsun4i_can.c67 /* Registers address (physical base address 0x01C2BC00) */
205 void __iomem *base; member
227 writel(val, priv->base + SUN4I_REG_CMD_ADDR); in sun4i_can_write_cmdreg()
238 mod_reg_val = readl(priv->base + SUN4I_REG_MSEL_ADDR); in set_normal_mode()
240 writel(mod_reg_val, priv->base + SUN4I_REG_MSEL_ADDR); in set_normal_mode()
243 if (readl(priv->base + SUN4I_REG_MSEL_ADDR) & SUN4I_MSEL_RESET_MODE) { in set_normal_mode()
259 mod_reg_val = readl(priv->base + SUN4I_REG_MSEL_ADDR); in set_reset_mode()
261 writel(mod_reg_val, priv->base + SUN4I_REG_MSEL_ADDR); in set_reset_mode()
264 if (!(readl(priv->base + SUN4I_REG_MSEL_ADDR) & in set_reset_mode()
288 writel(cfg, priv->base in sun4ican_set_bittiming()
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/kernel/linux/linux-6.6/arch/arm/crypto/
H A Daes-ce-glue.c589 .base.cra_name = "__ecb(aes)",
590 .base.cra_driver_name = "__ecb-aes-ce",
591 .base.cra_priority = 300,
592 .base.cra_flags = CRYPTO_ALG_INTERNAL,
593 .base.cra_blocksize = AES_BLOCK_SIZE,
594 .base.cra_ctxsize = sizeof(struct crypto_aes_ctx),
595 .base.cra_module = THIS_MODULE,
603 .base.cra_name = "__cbc(aes)",
604 .base.cra_driver_name = "__cbc-aes-ce",
605 .base
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/kernel/linux/linux-6.6/drivers/mailbox/
H A Dmtk-cmdq-mailbox.c61 void __iomem *base; member
76 void __iomem *base; member
98 writel(GCE_DDR_EN | GCE_CTRL_BY_SW, cmdq->base + GCE_GCTL_VALUE); in cmdq_sw_ddr_enable()
100 writel(GCE_CTRL_BY_SW, cmdq->base + GCE_GCTL_VALUE); in cmdq_sw_ddr_enable()
117 writel(CMDQ_THR_SUSPEND, thread->base + CMDQ_THR_SUSPEND_TASK); in cmdq_thread_suspend()
120 if (!(readl(thread->base + CMDQ_THR_ENABLE_TASK) & CMDQ_THR_ENABLED)) in cmdq_thread_suspend()
123 if (readl_poll_timeout_atomic(thread->base + CMDQ_THR_CURR_STATUS, in cmdq_thread_suspend()
126 (u32)(thread->base - cmdq->base)); in cmdq_thread_suspend()
135 writel(CMDQ_THR_RESUME, thread->base in cmdq_thread_resume()
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/kernel/linux/linux-5.10/arch/sparc/crypto/
H A Ddes_glue.c379 .base.cra_name = "ecb(des)",
380 .base.cra_driver_name = "ecb-des-sparc64",
381 .base.cra_priority = SPARC_CR_OPCODE_PRIORITY,
382 .base.cra_blocksize = DES_BLOCK_SIZE,
383 .base.cra_ctxsize = sizeof(struct des_sparc64_ctx),
384 .base.cra_alignmask = 7,
385 .base.cra_module = THIS_MODULE,
392 .base.cra_name = "cbc(des)",
393 .base.cra_driver_name = "cbc-des-sparc64",
394 .base
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/kernel/linux/linux-6.6/arch/sparc/crypto/
H A Ddes_glue.c379 .base.cra_name = "ecb(des)",
380 .base.cra_driver_name = "ecb-des-sparc64",
381 .base.cra_priority = SPARC_CR_OPCODE_PRIORITY,
382 .base.cra_blocksize = DES_BLOCK_SIZE,
383 .base.cra_ctxsize = sizeof(struct des_sparc64_ctx),
384 .base.cra_alignmask = 7,
385 .base.cra_module = THIS_MODULE,
392 .base.cra_name = "cbc(des)",
393 .base.cra_driver_name = "cbc-des-sparc64",
394 .base
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/kernel/linux/linux-5.10/drivers/i2c/busses/
H A Di2c-riic.c90 void __iomem *base; member
109 writeb((readb(riic->base + reg) & ~clear) | set, riic->base + reg); in riic_clear_set_bit()
121 if (readb(riic->base + RIIC_ICCR2) & ICCR2_BBSY) { in riic_xfer()
129 writeb(0, riic->base + RIIC_ICSR2); in riic_xfer()
137 writeb(ICIER_NAKIE | ICIER_TIE, riic->base + RIIC_ICIER); in riic_xfer()
139 writeb(start_bit, riic->base + RIIC_ICCR2); in riic_xfer()
193 writeb(val, riic->base + RIIC_ICDRT); in riic_tdre_isr()
202 if (readb(riic->base + RIIC_ICSR2) & ICSR2_NACKF) { in riic_tend_isr()
204 readb(riic->base in riic_tend_isr()
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/kernel/linux/linux-5.10/drivers/soc/imx/
H A Dgpc.c43 struct generic_pm_domain base; member
56 return container_of(genpd, struct imx_pm_domain, base); in to_imx_pm_domain()
193 if (domain->base.power_on) in imx_pgc_power_domain_probe()
194 domain->base.power_on(&domain->base); in imx_pgc_power_domain_probe()
197 pm_genpd_init(&domain->base, NULL, false); in imx_pgc_power_domain_probe()
198 ret = of_genpd_add_provider_simple(dev->of_node, &domain->base); in imx_pgc_power_domain_probe()
208 pm_genpd_remove(&domain->base); in imx_pgc_power_domain_probe()
220 pm_genpd_remove(&domain->base); in imx_pgc_power_domain_remove()
254 .base
411 void __iomem *base; imx_gpc_probe() local
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/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/dispnv50/
H A Dheadc37d.c33 struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push; in headc37d_or()
34 const int i = head->base.index; in headc37d_or()
67 struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push; in headc37d_procamp()
68 const int i = head->base.index; in headc37d_procamp()
88 struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push; in headc37d_dither()
89 const int i = head->base.index; in headc37d_dither()
107 struct nvif_push *push = nv50_disp(head->base in headc37d_curs_clr()
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/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
H A Dnv04.c48 nv04_fifo_pause(struct nvkm_fifo *base, unsigned long *pflags)
49 __acquires(fifo->base.lock)
51 struct nv04_fifo *fifo = nv04_fifo(base);
52 struct nvkm_device *device = fifo->base.engine.subdev.device;
55 spin_lock_irqsave(&fifo->base.lock, flags);
84 nv04_fifo_start(struct nvkm_fifo *base, unsigned long *pflags)
85 __releases(fifo->base.lock)
87 struct nv04_fifo *fifo = nv04_fifo(base);
88 struct nvkm_device *device = fifo->base.engine.subdev.device;
94 spin_unlock_irqrestore(&fifo->base
240 nv04_fifo_intr(struct nvkm_fifo *base) nv04_fifo_intr() argument
299 nv04_fifo_init(struct nvkm_fifo *base) nv04_fifo_init() argument
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/kernel/linux/linux-5.10/include/linux/
H A Dmemblock.h44 * @base: base address of the region
50 phys_addr_t base; member
103 int memblock_add_node(phys_addr_t base, phys_addr_t size, int nid);
104 int memblock_add(phys_addr_t base, phys_addr_t size);
105 int memblock_remove(phys_addr_t base, phys_addr_t size);
106 int memblock_free(phys_addr_t base, phys_addr_t size);
107 int memblock_reserve(phys_addr_t base, phys_addr_t size);
109 int memblock_physmem_add(phys_addr_t base, phys_addr_t size);
113 phys_addr_t base, phys_addr_
443 memblock_free_early(phys_addr_t base, phys_addr_t size) memblock_free_early() argument
449 memblock_free_early_nid(phys_addr_t base, phys_addr_t size, int nid) memblock_free_early_nid() argument
455 memblock_free_late(phys_addr_t base, phys_addr_t size) memblock_free_late() argument
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/kernel/linux/linux-6.6/drivers/pmdomain/imx/
H A Dgpc.c43 struct generic_pm_domain base; member
56 return container_of(genpd, struct imx_pm_domain, base); in to_imx_pm_domain()
193 if (domain->base.power_on) in imx_pgc_power_domain_probe()
194 domain->base.power_on(&domain->base); in imx_pgc_power_domain_probe()
197 pm_genpd_init(&domain->base, NULL, false); in imx_pgc_power_domain_probe()
198 ret = of_genpd_add_provider_simple(dev->of_node, &domain->base); in imx_pgc_power_domain_probe()
208 pm_genpd_remove(&domain->base); in imx_pgc_power_domain_probe()
220 pm_genpd_remove(&domain->base); in imx_pgc_power_domain_remove()
254 .base
411 void __iomem *base; imx_gpc_probe() local
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/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/dispnv50/
H A Dheadc37d.c33 struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push; in headc37d_or()
34 const int i = head->base.index; in headc37d_or()
67 struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push; in headc37d_procamp()
68 const int i = head->base.index; in headc37d_procamp()
88 struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push; in headc37d_dither()
89 const int i = head->base.index; in headc37d_dither()
107 struct nvif_push *push = nv50_disp(head->base in headc37d_curs_clr()
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/kernel/linux/linux-6.6/drivers/i2c/busses/
H A Di2c-riic.c91 void __iomem *base; member
110 writeb((readb(riic->base + reg) & ~clear) | set, riic->base + reg); in riic_clear_set_bit()
122 if (readb(riic->base + RIIC_ICCR2) & ICCR2_BBSY) { in riic_xfer()
130 writeb(0, riic->base + RIIC_ICSR2); in riic_xfer()
138 writeb(ICIER_NAKIE | ICIER_TIE, riic->base + RIIC_ICIER); in riic_xfer()
140 writeb(start_bit, riic->base + RIIC_ICCR2); in riic_xfer()
194 writeb(val, riic->base + RIIC_ICDRT); in riic_tdre_isr()
203 if (readb(riic->base + RIIC_ICSR2) & ICSR2_NACKF) { in riic_tend_isr()
205 readb(riic->base in riic_tend_isr()
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/third_party/mesa3d/src/gallium/drivers/softpipe/
H A Dsp_texture.c59 struct pipe_resource *pt = &spr->base; in softpipe_resource_layout()
121 spr.base = *res; in softpipe_can_create_resource()
139 spr->base.bind, in softpipe_displaytarget_layout()
140 spr->base.format, in softpipe_displaytarget_layout()
141 spr->base.width0, in softpipe_displaytarget_layout()
142 spr->base.height0, in softpipe_displaytarget_layout()
165 spr->base = *templat; in softpipe_resource_create_front()
166 pipe_reference_init(&spr->base.reference, 1); in softpipe_resource_create_front()
167 spr->base.screen = screen; in softpipe_resource_create_front()
173 if (spr->base in softpipe_resource_create_front()
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/third_party/node/deps/openssl/openssl/providers/implementations/ciphers/
H A Dcipher_aes_ocb.c84 if (ctx->base.enc) { in aes_generic_ocb_cipher()
115 ctx->base.enc = enc; in aes_ocb_init()
118 if (ivlen != ctx->base.ivlen) { in aes_ocb_init()
124 ctx->base.ivlen = ivlen; in aes_ocb_init()
126 if (!ossl_cipher_generic_initiv(&ctx->base, iv, ivlen)) in aes_ocb_init()
131 if (keylen != ctx->base.keylen) { in aes_ocb_init()
135 if (!ctx->base.hw->init(&ctx->base, key, keylen)) in aes_ocb_init()
223 if (!aes_generic_ocb_setiv(ctx, ctx->base.iv, ctx->base in update_iv()
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/third_party/skia/third_party/externals/libjpeg-turbo/gtest/
H A Dcjpeg-gtest-wrapper.cpp21 #include "base/files/file.h"
22 #include "base/files/file_util.h"
23 #include "base/path_service.h"
33 base::FilePath icc_path; in TEST()
35 base::FilePath input_image_path; in TEST()
37 base::FilePath output_path(GetTargetDirectory()); in TEST()
64 base::FilePath input_image_path; in TEST()
66 base::FilePath output_path(GetTargetDirectory()); in TEST()
93 base::FilePath scans_path; in TEST()
95 base in TEST()
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/third_party/vk-gl-cts/external/vulkancts/modules/vulkan/api/
H A DvktApiBufferMarkerTests.cpp459 BaseTestParams base; member
480 *executionScope = params.base.stage | VK_PIPELINE_STAGE_TRANSFER_BIT; in computeMemoryDepBarrier()
508 createDeviceWithExtension(context, wd, params.base.testQueue, params.base.useHostPtr, params.base.offset); in bufferMarkerMemoryDep()
520 const deUint32 size(params.base.size); in bufferMarkerMemoryDep()
521 const VkDeviceSize markerBufferSize(params.base.size * sizeof(deUint32)); in bufferMarkerMemoryDep()
529 if (params.base.useHostPtr) in bufferMarkerMemoryDep()
536 *markerBuffer, params.base.offset, wd.allocator, MemoryRequirement::HostVisible, params.base in bufferMarkerMemoryDep()
1105 getTestCaseName(const std::string base, size_t offset) getTestCaseName() argument
1120 BaseTestParams base; createBufferMarkerTestsInGroup() local
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