Home
last modified time | relevance | path

Searched refs:base (Results 12801 - 12825 of 18412) sorted by relevance

1...<<511512513514515516517518519520>>...737

/foundation/distributeddatamgr/data_share/test/native/unittest/mediadatashare_test/src/
H A Dmediadatashare_unit_test.cpp670 int base = 100; in HWTEST_F() local
671 DataShare::DataShareValueObject object(base); in HWTEST_F()
673 EXPECT_EQ(value, base); in HWTEST_F()
751 int base = 100; in HWTEST_F() local
752 DataShare::SingleValue sv(base); in HWTEST_F()
754 EXPECT_EQ(value, base); in HWTEST_F()
789 vector<int> base; in HWTEST_F() local
790 base.push_back(100); in HWTEST_F()
791 DataShare::MutliValue mv(base); in HWTEST_F()
793 EXPECT_EQ(value[0], base[ in HWTEST_F()
[all...]
/kernel/linux/common_modules/tzdriver/tui/
H A Dtui.c381 check_params = (g_dss_fd->comp.base.xres > MAX_SCREEN_RESOLUTION) || in get_frame_addr()
382 (g_dss_fd->comp.base.yres > MAX_SCREEN_RESOLUTION); in get_frame_addr()
387 screen_r = g_dss_fd->comp.base.xres * g_dss_fd->comp.base.yres * COLOR_TYPE * BUFFER_NUM; in get_frame_addr()
1013 mb_pack->operation.params[0].value.b = make32(g_dss_fd->comp.base.xres, g_dss_fd->comp.base.yres);
1778 int base = TP_BASE_VALUE; local
1781 int32_t ret = kstrtol(tokens, base, &value);
1790 ret = kstrtol(tokens, base, &value);
1799 int32_t ret = kstrtol(tokens, base,
[all...]
/kernel/linux/linux-5.10/crypto/
H A Ddrbg.c2053 memcpy(alg->base.cra_name, "stdrng", 6); in drbg_fill_array()
2055 memcpy(alg->base.cra_driver_name, "drbg_pr_", 8); in drbg_fill_array()
2058 memcpy(alg->base.cra_driver_name, "drbg_nopr_", 10); in drbg_fill_array()
2061 memcpy(alg->base.cra_driver_name + pos, core->cra_name, in drbg_fill_array()
2064 alg->base.cra_priority = priority; in drbg_fill_array()
2072 alg->base.cra_priority += 200; in drbg_fill_array()
2074 alg->base.cra_ctxsize = sizeof(struct drbg_state); in drbg_fill_array()
2075 alg->base.cra_module = THIS_MODULE; in drbg_fill_array()
2076 alg->base.cra_init = drbg_kcapi_init; in drbg_fill_array()
2077 alg->base in drbg_fill_array()
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_mpc.c37 mpc30->base.ctx
227 cm_helper_program_gamcor_xfer_func(mpc30->base.ctx, params, &gam_regs); in mpc3_program_luta()
260 cm_helper_program_gamcor_xfer_func(mpc30->base.ctx, params, &gam_regs); in mpc3_program_lutb()
275 /*the entries of DCN3AG gamma LUTs take 18bit base values as opposed to in mpc3_program_ogam_pwl()
276 *38 base+delta values per entry in earlier DCN architectures in mpc3_program_ogam_pwl()
277 *last base value for our lut is compute by adding the last base value in mpc3_program_ogam_pwl()
1065 mpc30->base.ctx, in program_gamut_remap()
1075 mpc30->base.ctx, in program_gamut_remap()
1236 mpc30->base in mpc3_set_output_csc()
[all...]
/kernel/linux/linux-6.6/arch/arm64/kvm/
H A Darm.c1696 static void kvm_init_vector_slot(void *base, enum arm64_hyp_spectre_vector slot) in kvm_init_vector_slot() argument
1698 hyp_spectre_vector_selector[slot] = __kvm_vector_slot2addr(base, slot); in kvm_init_vector_slot()
1704 void *base; in kvm_init_vector_slots() local
1706 base = kern_hyp_va(kvm_ksym_ref(__kvm_hyp_vector)); in kvm_init_vector_slots()
1707 kvm_init_vector_slot(base, HYP_VECTOR_DIRECT); in kvm_init_vector_slots()
1709 base = kern_hyp_va(kvm_ksym_ref(__bp_harden_hyp_vecs)); in kvm_init_vector_slots()
1710 kvm_init_vector_slot(base, HYP_VECTOR_SPECTRE_DIRECT); in kvm_init_vector_slots()
1715 __BP_HARDEN_HYP_VECS_SZ, &base); in kvm_init_vector_slots()
1720 kvm_init_vector_slot(base, HYP_VECTOR_INDIRECT); in kvm_init_vector_slots()
1721 kvm_init_vector_slot(base, HYP_VECTOR_SPECTRE_INDIREC in kvm_init_vector_slots()
[all...]
/kernel/linux/linux-5.10/drivers/iommu/
H A Domap-iommu.c257 l->base = MMU_LOCK_BASE(val); in iotlb_lock_get()
265 val = (l->base << MMU_LOCK_BASE_SHIFT); in iotlb_lock_set()
342 if (l.base == obj->nr_tlb_entries) { in load_iotlb_entry()
363 l.vict = l.base; in load_iotlb_entry()
377 l.base++; in load_iotlb_entry()
380 l.vict = l.base; in load_iotlb_entry()
449 l.base = 0; in flush_iotlb_all()
910 obj->num_cr_ctx = lock.base; in omap_iommu_save_tlb_entries()
929 l.base = 0; in omap_iommu_restore_tlb_entries()
936 l.base in omap_iommu_restore_tlb_entries()
[all...]
/kernel/linux/linux-5.10/drivers/iommu/loongson/
H A Diommu.c1381 resource_size_t base, size; in loongson_iommu_probe() local
1389 base = pci_resource_start(pdev, 0); in loongson_iommu_probe()
1391 if (!request_mem_region(base, size, "loongson_iommu")) { in loongson_iommu_probe()
1396 iommu->membase = ioremap(base, size); in loongson_iommu_probe()
1402 base = pci_resource_start(pdev, 2); in loongson_iommu_probe()
1404 if (!request_mem_region(base, size, "loongson_iommu")) { in loongson_iommu_probe()
1408 iommu->pgtbase = ioremap(base, size); in loongson_iommu_probe()
1818 u8 *base = (u8 *)ivrs; in get_highest_supported_ivhd_type() local
1819 struct ivhd_header *ivhd = (struct ivhd_header *)(base + IVRS_HEADER_LENGTH); in get_highest_supported_ivhd_type()
1823 while (((u8 *)ivhd - base < ivr in get_highest_supported_ivhd_type()
[all...]
/kernel/linux/linux-5.10/drivers/media/platform/rcar-vin/
H A Drcar-core.c615 if (vep->base.port || vep->base.id) in rvin_parallel_parse_v4l2()
801 if (vep->base.port != 1 || vep->base.id >= RVIN_CSI_MAX) in rvin_mc_parse_of_endpoint()
812 if (vin->group->csi[vep->base.id].fwnode) { in rvin_mc_parse_of_endpoint()
819 vin->group->csi[vep->base.id].fwnode = asd->match.fwnode; in rvin_mc_parse_of_endpoint()
822 to_of_node(asd->match.fwnode), vep->base.id); in rvin_mc_parse_of_endpoint()
1352 vin->base = devm_platform_ioremap_resource(pdev, 0); in rcar_vin_probe()
1353 if (IS_ERR(vin->base)) in rcar_vin_probe()
1354 return PTR_ERR(vin->base); in rcar_vin_probe()
[all...]
/kernel/linux/linux-5.10/drivers/mtd/devices/
H A Ddocg3.c94 u8 val = readb(docg3->cascade->base + reg); in doc_readb()
102 u16 val = readw(docg3->cascade->base + reg); in doc_readw()
110 writeb(val, docg3->cascade->base + reg); in doc_writeb()
116 writew(val, docg3->cascade->base + reg); in doc_writew()
1786 * @base: the io space where the device is probed
1839 docg3->cascade->base, floor); in doc_probe_device()
1968 void __iomem *base; in docg3_probe() local
1980 base = devm_ioremap(dev, ress->start, DOC_IOSPACE_SIZE); in docg3_probe()
1981 if (!base) { in docg3_probe()
1990 cascade->base in docg3_probe()
[all...]
/kernel/linux/linux-5.10/drivers/i3c/master/
H A Di3c-master-cdns.c401 struct i3c_master_controller base; member
425 return container_of(master, struct cdns_i3c_master, base); in to_cdns_i3c_master()
1065 struct i3c_master_controller *m = &master->base; in cdns_i3c_master_upd_i3c_scl_lim()
1158 ret = i3c_master_entdaa_locked(&master->base); in cdns_i3c_master_do_daa()
1182 i3c_master_defslvs_locked(&master->base); in cdns_i3c_master_do_daa()
1279 ret = i3c_master_set_info(&master->base, &info); in cdns_i3c_master_bus_init()
1378 queue_work(master->base.wq, &master->hj_work); in cnds_i3c_master_demux_ibis()
1553 i3c_master_do_daa(&master->base); in cdns_i3c_master_hj()
1648 ret = i3c_master_register(&master->base, &pdev->dev, in cdns_i3c_master_probe()
1669 ret = i3c_master_unregister(&master->base); in cdns_i3c_master_remove()
[all...]
/kernel/linux/linux-5.10/drivers/thermal/tegra/
H A Dsoctherm.c388 void __iomem *base = tegra->regs + sensor->base; in enable_tsensor() local
392 writel(val, base + SENSOR_CONFIG0); in enable_tsensor()
398 writel(val, base + SENSOR_CONFIG1); in enable_tsensor()
400 writel(tegra->calib[i], base + SENSOR_CONFIG2); in enable_tsensor()
1304 r = readl(ts->regs + tsensors[i].base + SENSOR_CONFIG1); in regs_show()
1322 r = readl(ts->regs + tsensors[i].base + SENSOR_STATUS1); in regs_show()
1328 r = readl(ts->regs + tsensors[i].base + SENSOR_STATUS0); in regs_show()
1334 r = readl(ts->regs + tsensors[i].base + SENSOR_CONFIG0); in regs_show()
1346 r = readl(ts->regs + tsensors[i].base in regs_show()
[all...]
/kernel/linux/linux-5.10/drivers/usb/host/
H A Dehci-sched.c1466 u32 now, base, next, start, period, span, now2; in iso_stream_schedule() local
1554 * Use ehci->last_iso_frame as the base. There can't be any in iso_stream_schedule()
1557 base = ehci->last_iso_frame << 3; in iso_stream_schedule()
1558 next = (next - base) & (mod - 1); in iso_stream_schedule()
1559 start = (stream->next_uframe - base) & (mod - 1); in iso_stream_schedule()
1570 now2 = (now - base) & (mod - 1); in iso_stream_schedule()
1575 urb, stream->next_uframe, base, period, mod); in iso_stream_schedule()
1580 /* Is the next packet scheduled after the base time? */ in iso_stream_schedule()
1604 urb, start + base, span - period, now2 + base, in iso_stream_schedule()
[all...]
/kernel/linux/linux-5.10/sound/soc/ti/
H A Ddavinci-mcasp.c79 void __iomem *base; member
131 void __iomem *reg = mcasp->base + offset; in mcasp_set_bits()
138 void __iomem *reg = mcasp->base + offset; in mcasp_clr_bits()
145 void __iomem *reg = mcasp->base + offset; in mcasp_mod_bits()
152 __raw_writel(val, mcasp->base + offset); in mcasp_set_reg()
157 return (u32)__raw_readl(mcasp->base + offset); in mcasp_get_reg()
2087 .base = -1,
2167 mcasp->base = devm_ioremap_resource(&pdev->dev, mem); in davinci_mcasp_probe()
2168 if (IS_ERR(mcasp->base)) in davinci_mcasp_probe()
2169 return PTR_ERR(mcasp->base); in davinci_mcasp_probe()
[all...]
/kernel/linux/linux-5.10/fs/hmdfs/
H A Dstash.c191 struct dentry *base = NULL; in hmdfs_stash_new_work_dir() local
194 base = hmdfs_do_vfs_mkdir(parent, HMDFS_STASH_DIR_NAME, in hmdfs_stash_new_work_dir()
196 if (IS_ERR(base)) in hmdfs_stash_new_work_dir()
197 return base; in hmdfs_stash_new_work_dir()
199 work = hmdfs_do_vfs_mkdir(base, HMDFS_STASH_FMT_DIR_NAME, in hmdfs_stash_new_work_dir()
201 dput(base); in hmdfs_stash_new_work_dir()
711 static void hmdfs_init_stash_cache_work_fn(struct work_struct *base) in hmdfs_init_stash_cache_work_fn() argument
714 container_of(base, struct hmdfs_stash_work, work); in hmdfs_init_stash_cache_work_fn()
1799 static void hmdfs_rebuild_check_work_fn(struct work_struct *base) in hmdfs_rebuild_check_work_fn() argument
1802 container_of(base, struc in hmdfs_rebuild_check_work_fn()
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dctxgf100.c1012 struct nvkm_device *device = info->gr->base.engine.subdev.device; in gf100_grctx_mmio_item()
1035 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_grctx_generate_r419cb8()
1097 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_grctx_generate_r4060a8()
1117 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_grctx_generate_rop_mapping()
1163 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_grctx_generate_max_ways_evict()
1273 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gf100_grctx_generate_alpha_beta_tables()
1309 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_grctx_generate_tpc_nr()
1317 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_grctx_generate_sm_id()
1366 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_grctx_generate_main()
1439 struct nvkm_subdev *subdev = &gr->base in gf100_grctx_generate()
[all...]
/kernel/linux/linux-5.10/drivers/media/platform/stm32/
H A Dstm32-dcmi.c184 static inline u32 reg_read(void __iomem *base, u32 reg) in reg_read() argument
186 return readl_relaxed(base + reg); in reg_read()
189 static inline void reg_write(void __iomem *base, u32 reg, u32 val) in reg_write() argument
191 writel_relaxed(val, base + reg); in reg_write()
194 static inline void reg_set(void __iomem *base, u32 reg, u32 mask) in reg_set() argument
196 reg_write(base, reg, reg_read(base, reg) | mask); in reg_set()
199 static inline void reg_clear(void __iomem *base, u32 reg, u32 mask) in reg_clear() argument
201 reg_write(base, reg, reg_read(base, re in reg_clear()
[all...]
/kernel/linux/linux-6.6/drivers/mtd/devices/
H A Ddocg3.c94 u8 val = readb(docg3->cascade->base + reg); in doc_readb()
102 u16 val = readw(docg3->cascade->base + reg); in doc_readw()
110 writeb(val, docg3->cascade->base + reg); in doc_writeb()
116 writew(val, docg3->cascade->base + reg); in doc_writew()
1846 docg3->cascade->base, floor); in doc_probe_device()
1975 void __iomem *base; in docg3_probe() local
1987 base = devm_ioremap(dev, ress->start, DOC_IOSPACE_SIZE); in docg3_probe()
1988 if (!base) { in docg3_probe()
1997 cascade->base = base; in docg3_probe()
[all...]
/kernel/linux/linux-6.6/drivers/net/dsa/hirschmann/
H A Dhellcreek.c97 return readw(hellcreek->base + offset); in hellcreek_read()
102 return readw(hellcreek->base + HR_CTRL_C); in hellcreek_read_ctrl()
107 return readw(hellcreek->base + HR_SWSTAT); in hellcreek_read_stat()
113 writew(data, hellcreek->base + offset); in hellcreek_write()
1671 /* Calculate difference to admin base time */ in hellcreek_schedule_startable()
1687 /* Forward base time into the future if needed */ in hellcreek_start_schedule()
1704 /* Set admin base time and switch schedule */ in hellcreek_start_schedule()
1861 static int hellcreek_tc_query_caps(struct tc_query_caps_base *base) in hellcreek_tc_query_caps() argument
1863 switch (base->type) { in hellcreek_tc_query_caps()
1865 struct tc_taprio_caps *caps = base in hellcreek_tc_query_caps()
[all...]
/kernel/linux/linux-6.6/fs/hmdfs/
H A Dstash.c191 struct dentry *base = NULL; in hmdfs_stash_new_work_dir() local
194 base = hmdfs_do_vfs_mkdir(parent, HMDFS_STASH_DIR_NAME, in hmdfs_stash_new_work_dir()
196 if (IS_ERR(base)) in hmdfs_stash_new_work_dir()
197 return base; in hmdfs_stash_new_work_dir()
199 work = hmdfs_do_vfs_mkdir(base, HMDFS_STASH_FMT_DIR_NAME, in hmdfs_stash_new_work_dir()
201 dput(base); in hmdfs_stash_new_work_dir()
701 static void hmdfs_init_stash_cache_work_fn(struct work_struct *base) in hmdfs_init_stash_cache_work_fn() argument
704 container_of(base, struct hmdfs_stash_work, work); in hmdfs_init_stash_cache_work_fn()
1784 static void hmdfs_rebuild_check_work_fn(struct work_struct *base) in hmdfs_rebuild_check_work_fn() argument
1787 container_of(base, struc in hmdfs_rebuild_check_work_fn()
[all...]
/kernel/linux/linux-6.6/drivers/usb/host/
H A Dehci-sched.c1477 u32 now, base, next, start, period, span, now2; in iso_stream_schedule() local
1565 * Use ehci->last_iso_frame as the base. There can't be any in iso_stream_schedule()
1568 base = ehci->last_iso_frame << 3; in iso_stream_schedule()
1569 next = (next - base) & (mod - 1); in iso_stream_schedule()
1570 start = (stream->next_uframe - base) & (mod - 1); in iso_stream_schedule()
1581 now2 = (now - base) & (mod - 1); in iso_stream_schedule()
1586 urb, stream->next_uframe, base, period, mod); in iso_stream_schedule()
1591 /* Is the next packet scheduled after the base time? */ in iso_stream_schedule()
1615 urb, start + base, span - period, now2 + base, in iso_stream_schedule()
[all...]
/kernel/linux/linux-6.6/drivers/thermal/tegra/
H A Dsoctherm.c388 void __iomem *base = tegra->regs + sensor->base; in enable_tsensor() local
392 writel(val, base + SENSOR_CONFIG0); in enable_tsensor()
398 writel(val, base + SENSOR_CONFIG1); in enable_tsensor()
400 writel(tegra->calib[i], base + SENSOR_CONFIG2); in enable_tsensor()
1266 r = readl(ts->regs + tsensors[i].base + SENSOR_CONFIG1); in regs_show()
1284 r = readl(ts->regs + tsensors[i].base + SENSOR_STATUS1); in regs_show()
1290 r = readl(ts->regs + tsensors[i].base + SENSOR_STATUS0); in regs_show()
1296 r = readl(ts->regs + tsensors[i].base + SENSOR_CONFIG0); in regs_show()
1308 r = readl(ts->regs + tsensors[i].base in regs_show()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_plane.c316 const uint64_t modifier = afb->base.modifier; in fill_gfx9_plane_attributes_from_modifiers()
323 uint64_t dcc_address = afb->address + afb->base.offsets[1]; in fill_gfx9_plane_attributes_from_modifiers()
328 dcc->meta_pitch = afb->base.pitches[1]; in fill_gfx9_plane_attributes_from_modifiers()
765 const struct drm_framebuffer *fb = &afb->base; in amdgpu_dm_plane_fill_plane_buffer_attributes()
861 r = dma_resv_reserve_fences(rbo->tbo.base.resv, 1); in dm_plane_helper_prepare_fb()
1279 attributes.pitch = afb->base.pitches[0] / afb->base.format->cpp[0]; in amdgpu_dm_plane_handle_cursor_update()
1337 __drm_atomic_helper_plane_reset(plane, &amdgpu_state->base); in dm_drm_plane_reset()
1350 __drm_atomic_helper_plane_duplicate_state(plane, &dm_plane_state->base); in dm_drm_plane_duplicate_state()
1357 return &dm_plane_state->base; in dm_drm_plane_duplicate_state()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_mpc.c37 mpc30->base.ctx
237 cm_helper_program_gamcor_xfer_func(mpc30->base.ctx, params, &gam_regs); in mpc3_program_luta()
270 cm_helper_program_gamcor_xfer_func(mpc30->base.ctx, params, &gam_regs); in mpc3_program_lutb()
285 /*the entries of DCN3AG gamma LUTs take 18bit base values as opposed to in mpc3_program_ogam_pwl()
286 *38 base+delta values per entry in earlier DCN architectures in mpc3_program_ogam_pwl()
287 *last base value for our lut is compute by adding the last base value in mpc3_program_ogam_pwl()
1094 mpc30->base.ctx, in program_gamut_remap()
1104 mpc30->base.ctx, in program_gamut_remap()
1268 mpc30->base in mpc3_set_output_csc()
[all...]
/kernel/linux/linux-6.6/drivers/media/platform/st/stm32/
H A Dstm32-dcmi.c180 static inline u32 reg_read(void __iomem *base, u32 reg) in reg_read() argument
182 return readl_relaxed(base + reg); in reg_read()
185 static inline void reg_write(void __iomem *base, u32 reg, u32 val) in reg_write() argument
187 writel_relaxed(val, base + reg); in reg_write()
190 static inline void reg_set(void __iomem *base, u32 reg, u32 mask) in reg_set() argument
192 reg_write(base, reg, reg_read(base, reg) | mask); in reg_set()
195 static inline void reg_clear(void __iomem *base, u32 reg, u32 mask) in reg_clear() argument
197 reg_write(base, reg, reg_read(base, re in reg_clear()
[all...]
/kernel/linux/linux-6.6/crypto/
H A Ddrbg.c2079 memcpy(alg->base.cra_name, "stdrng", 6); in drbg_fill_array()
2081 memcpy(alg->base.cra_driver_name, "drbg_pr_", 8); in drbg_fill_array()
2084 memcpy(alg->base.cra_driver_name, "drbg_nopr_", 10); in drbg_fill_array()
2087 memcpy(alg->base.cra_driver_name + pos, core->cra_name, in drbg_fill_array()
2090 alg->base.cra_priority = priority; in drbg_fill_array()
2098 alg->base.cra_priority += 200; in drbg_fill_array()
2100 alg->base.cra_ctxsize = sizeof(struct drbg_state); in drbg_fill_array()
2101 alg->base.cra_module = THIS_MODULE; in drbg_fill_array()
2102 alg->base.cra_init = drbg_kcapi_init; in drbg_fill_array()
2103 alg->base in drbg_fill_array()
[all...]

Completed in 62 milliseconds

1...<<511512513514515516517518519520>>...737