Home
last modified time | relevance | path

Searched refs:base (Results 1251 - 1275 of 17150) sorted by relevance

1...<<51525354555657585960>>...686

/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
H A Ddmanv10.c36 nv10_fifo_dma_new(struct nvkm_fifo *base, const struct nvkm_oclass *oclass, in nv10_fifo_dma_new() argument
43 struct nv04_fifo *fifo = nv04_fifo(base); in nv10_fifo_dma_new()
45 struct nvkm_device *device = fifo->base.engine.subdev.device; in nv10_fifo_dma_new()
61 *pobject = &chan->base.object; in nv10_fifo_dma_new()
63 ret = nvkm_fifo_chan_ctor(&nv04_fifo_dma_func, &fifo->base, in nv10_fifo_dma_new()
68 0, 0x800000, 0x10000, oclass, &chan->base); in nv10_fifo_dma_new()
73 args->v0.chid = chan->base.chid; in nv10_fifo_dma_new()
74 chan->ramfc = chan->base.chid * 32; in nv10_fifo_dma_new()
79 nvkm_wo32(imem->ramfc, chan->ramfc + 0x0c, chan->base.push->addr >> 4); in nv10_fifo_dma_new()
93 .base
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/vmwgfx/
H A Dttm_object.h53 * TTM_REF_USAGE is a simple refcount on a base object.
98 * @type: derived type this object is base class for.
106 * including the hash entry. A reference to a base object can
114 * "base" should be set to NULL by the function.
121 * This struct is intended to be used as a base struct for objects that
130 void (*refcount_release) (struct ttm_base_object **base);
131 void (*ref_obj_release) (struct ttm_base_object *base,
140 * struct ttm_prime_object - Modified base object that is prime-aware
142 * @base: struct ttm_base_object that we derive from
146 * the value of @base
154 struct ttm_base_object base; global() member
340 ttm_base_object_type(struct ttm_base_object *base) ttm_base_object_type() argument
[all...]
/kernel/linux/linux-5.10/drivers/reset/
H A Dreset-brcmstb-rescal.c18 void __iomem *base; member
28 void __iomem *base = data->base; in brcm_rescal_reset_set() local
32 reg = readl(base + BRCM_RESCAL_START); in brcm_rescal_reset_set()
33 writel(reg | BRCM_RESCAL_START_BIT, base + BRCM_RESCAL_START); in brcm_rescal_reset_set()
34 reg = readl(base + BRCM_RESCAL_START); in brcm_rescal_reset_set()
40 ret = readl_poll_timeout(base + BRCM_RESCAL_STATUS, reg, in brcm_rescal_reset_set()
47 reg = readl(base + BRCM_RESCAL_START); in brcm_rescal_reset_set()
48 writel(reg & ~BRCM_RESCAL_START_BIT, base + BRCM_RESCAL_START); in brcm_rescal_reset_set()
76 data->base in brcm_rescal_reset_probe()
[all...]
/kernel/linux/linux-6.6/drivers/reset/
H A Dreset-brcmstb-rescal.c18 void __iomem *base; member
28 void __iomem *base = data->base; in brcm_rescal_reset_set() local
32 reg = readl(base + BRCM_RESCAL_START); in brcm_rescal_reset_set()
33 writel(reg | BRCM_RESCAL_START_BIT, base + BRCM_RESCAL_START); in brcm_rescal_reset_set()
34 reg = readl(base + BRCM_RESCAL_START); in brcm_rescal_reset_set()
40 ret = readl_poll_timeout(base + BRCM_RESCAL_STATUS, reg, in brcm_rescal_reset_set()
47 reg = readl(base + BRCM_RESCAL_START); in brcm_rescal_reset_set()
48 writel(reg & ~BRCM_RESCAL_START_BIT, base + BRCM_RESCAL_START); in brcm_rescal_reset_set()
74 data->base in brcm_rescal_reset_probe()
[all...]
/kernel/linux/linux-6.6/drivers/char/tpm/
H A Dtpm_atmel.h23 unsigned long base; member
41 static void __iomem * atmel_get_base_addr(unsigned long *base, int *region_size) in atmel_get_base_addr() argument
78 *base = address; in atmel_get_base_addr()
80 return ioremap(*base, *region_size); in atmel_get_base_addr()
83 #define atmel_getb(chip, offset) inb(atmel_get_priv(chip)->base + offset)
85 outb(val, atmel_get_priv(chip)->base + offset)
94 static inline int tpm_read_index(int base, int index) in tpm_read_index() argument
96 outb(index, base); in tpm_read_index()
97 return inb(base+1) & 0xFF; in tpm_read_index()
125 static void __iomem * atmel_get_base_addr(unsigned long *base, in argument
[all...]
H A Dtpm_nsc.c64 unsigned long base; member
76 *data = inb(priv->base + NSC_STATUS); in wait_for_stat()
84 *data = inb(priv->base + 1); in wait_for_stat()
100 status = inb(priv->base + NSC_STATUS); in nsc_wait_for_ready()
102 status = inb(priv->base + NSC_DATA); in nsc_wait_for_ready()
110 status = inb(priv->base + NSC_STATUS); in nsc_wait_for_ready()
112 status = inb(priv->base + NSC_DATA); in nsc_wait_for_ready()
139 data = inb(priv->base + NSC_DATA); in tpm_nsc_recv()
156 *p = inb(priv->base + NSC_DATA); in tpm_nsc_recv()
165 data = inb(priv->base in tpm_nsc_recv()
276 tpm_read_index(int base, int index) tpm_read_index() argument
282 tpm_write_index(int base, int index, int value) tpm_write_index() argument
294 unsigned long base; init_nsc() local
[all...]
/kernel/linux/linux-6.6/drivers/gpio/
H A Dgpio-sl28cpld.c49 unsigned int base, in sl28cpld_gpio_irq_init()
72 irq_chip->status_base = base + GPIO_REG_IP; in sl28cpld_gpio_irq_init()
73 irq_chip->unmask_base = base + GPIO_REG_IE; in sl28cpld_gpio_irq_init()
74 irq_chip->ack_base = base + GPIO_REG_IP; in sl28cpld_gpio_irq_init()
93 u32 base; in sl28cpld_gpio_probe() local
103 ret = device_property_read_u32(&pdev->dev, "reg", &base); in sl28cpld_gpio_probe()
117 config.reg_dat_base = base + GPIO_REG_IN; in sl28cpld_gpio_probe()
118 config.reg_set_base = base + GPIO_REG_OUT; in sl28cpld_gpio_probe()
120 config.reg_dir_out_base = GPIO_REGMAP_ADDR(base + GPIO_REG_DIR); in sl28cpld_gpio_probe()
123 ret = sl28cpld_gpio_irq_init(pdev, base, in sl28cpld_gpio_probe()
48 sl28cpld_gpio_irq_init(struct platform_device *pdev, unsigned int base, struct gpio_regmap_config *config) sl28cpld_gpio_irq_init() argument
[all...]
/kernel/linux/linux-6.6/drivers/phy/marvell/
H A Dphy-mvebu-sata.c18 void __iomem *base; member
37 reg = readl(priv->base + SATA_PHY_MODE_2); in phy_mvebu_sata_power_on()
40 writel(reg , priv->base + SATA_PHY_MODE_2); in phy_mvebu_sata_power_on()
43 reg = readl(priv->base + SATA_IF_CTRL); in phy_mvebu_sata_power_on()
45 writel(reg, priv->base + SATA_IF_CTRL); in phy_mvebu_sata_power_on()
60 reg = readl(priv->base + SATA_PHY_MODE_2); in phy_mvebu_sata_power_off()
63 writel(reg, priv->base + SATA_PHY_MODE_2); in phy_mvebu_sata_power_off()
66 reg = readl(priv->base + SATA_IF_CTRL); in phy_mvebu_sata_power_off()
68 writel(reg, priv->base + SATA_IF_CTRL); in phy_mvebu_sata_power_off()
91 priv->base in phy_mvebu_sata_probe()
[all...]
/kernel/linux/linux-6.6/arch/x86/kernel/cpu/mtrr/
H A Dcyrix.c14 cyrix_get_arr(unsigned int reg, unsigned long *base, in cyrix_get_arr() argument
26 ((unsigned char *)base)[3] = getCx86(arr); in cyrix_get_arr()
27 ((unsigned char *)base)[2] = getCx86(arr + 1); in cyrix_get_arr()
28 ((unsigned char *)base)[1] = getCx86(arr + 2); in cyrix_get_arr()
34 shift = ((unsigned char *) base)[1] & 0x0f; in cyrix_get_arr()
35 *base >>= PAGE_SHIFT; in cyrix_get_arr()
85 * @base: the starting (base) address of the region.
91 cyrix_get_free_region(unsigned long base, unsigned long size, int replace_reg) in cyrix_get_free_region() argument
179 static void cyrix_set_arr(unsigned int reg, unsigned long base, in cyrix_set_arr() argument
[all...]
/kernel/linux/linux-6.6/drivers/gpu/host1x/
H A Dfence.c30 return container_of(f, struct host1x_syncpt_fence, base); in to_host1x_fence()
82 dma_fence_put(&f->base); in host1x_fence_signal()
91 dma_fence_put(&f->base); in host1x_fence_signal()
94 dma_fence_signal_locked(&f->base); in host1x_fence_signal()
95 dma_fence_put(&f->base); in host1x_fence_signal()
107 dma_fence_put(&f->base); in do_fence_timeout()
116 dma_fence_put(&f->base); in do_fence_timeout()
119 dma_fence_set_error(&f->base, -ETIMEDOUT); in do_fence_timeout()
120 dma_fence_signal(&f->base); in do_fence_timeout()
122 dma_fence_put(&f->base); in do_fence_timeout()
[all...]
/third_party/gn/src/gn/
H A Dohos_components_mapping.cc12 #include "base/files/file_path.h"
13 #include "base/files/file_util.h"
14 #include "base/json/json_reader.h"
15 #include "base/values.h"
40 base::FilePath file = base::FilePath(settings->root_path().MaybeAsASCII() + path); in GetRealImportFile()
41 if (!base::PathExists(file)) { in GetRealImportFile()
47 static bool ReadBuildConfigFile(base::FilePath path, std::string &content) in ReadBuildConfigFile()
49 if (!base::ReadFileToString(path, &content)) { in ReadBuildConfigFile()
55 static void LoadGniMappingFileMap(const base
[all...]
/third_party/mesa3d/src/freedreno/vulkan/
H A Dtu_descriptor_set.h47 struct vk_object_base base; member
73 VK_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set_layout, base,
79 struct vk_object_base base; member
94 VK_DEFINE_NONDISP_HANDLE_CASTS(tu_pipeline_layout, base, VkPipelineLayout,
99 struct vk_object_base base; member
113 VK_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_set, base, VkDescriptorSet,
125 struct vk_object_base base; member
142 VK_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_pool, base, VkDescriptorPool,
174 struct vk_object_base base; member
180 VK_DEFINE_NONDISP_HANDLE_CASTS(tu_descriptor_update_template, base,
185 struct vk_object_base base; global() member
[all...]
/third_party/mesa3d/src/glx/
H A Ddri_common_query_renderer.c81 dri2_query_renderer_integer(struct glx_screen *base, int attribute, in dri2_query_renderer_integer() argument
85 struct dri2_screen *const psc = (struct dri2_screen *) base; in dri2_query_renderer_integer()
105 dri2_query_renderer_string(struct glx_screen *base, int attribute, in dri2_query_renderer_string() argument
108 struct dri2_screen *const psc = (struct dri2_screen *) base; in dri2_query_renderer_string()
124 dri3_query_renderer_integer(struct glx_screen *base, int attribute, in dri3_query_renderer_integer() argument
128 struct dri3_screen *const psc = (struct dri3_screen *) base; in dri3_query_renderer_integer()
148 dri3_query_renderer_string(struct glx_screen *base, int attribute, in dri3_query_renderer_string() argument
151 struct dri3_screen *const psc = (struct dri3_screen *) base; in dri3_query_renderer_string()
167 drisw_query_renderer_integer(struct glx_screen *base, int attribute, in drisw_query_renderer_integer() argument
171 struct drisw_screen *const psc = (struct drisw_screen *) base; in drisw_query_renderer_integer()
191 drisw_query_renderer_string(struct glx_screen *base, int attribute, const char **value) drisw_query_renderer_string() argument
[all...]
/third_party/node/deps/v8/src/wasm/
H A Dstreaming-decoder.h14 #include "src/base/macros.h"
15 #include "src/base/vector.h"
33 virtual bool ProcessModuleHeader(base::Vector<const uint8_t> bytes,
39 base::Vector<const uint8_t> bytes,
51 virtual bool ProcessFunctionBody(base::Vector<const uint8_t> bytes,
59 virtual void OnFinishedStream(base::OwnedVector<uint8_t> bytes) = 0;
66 virtual bool Deserialize(base::Vector<const uint8_t> module_bytes,
67 base::Vector<const uint8_t> wire_bytes) = 0;
78 virtual void OnBytesReceived(base::Vector<const uint8_t> bytes) = 0;
100 base in SetCompiledModuleBytes()
[all...]
/third_party/rust/crates/memoffset/src/
H A Draw_field.rs157 /// Computes a const raw pointer to the given field of the given base pointer
160 /// The `base` pointer *must not* be dangling, but it *may* point to
164 ($base:expr, $parent:path, $field:tt) => {{
166 let base = $base; // evaluate $base outside the `unsafe` block
173 _memoffset__addr_of!((*(base as *const $parent)).$field)
178 /// Computes a const raw pointer to the given field of the given base pointer
181 /// The `base` pointer *must not* be dangling, but it *may* point to
186 ($base
[all...]
/kernel/linux/linux-5.10/drivers/char/tpm/
H A Dtpm_nsc.c64 unsigned long base; member
76 *data = inb(priv->base + NSC_STATUS); in wait_for_stat()
84 *data = inb(priv->base + 1); in wait_for_stat()
100 status = inb(priv->base + NSC_STATUS); in nsc_wait_for_ready()
102 status = inb(priv->base + NSC_DATA); in nsc_wait_for_ready()
110 status = inb(priv->base + NSC_STATUS); in nsc_wait_for_ready()
112 status = inb(priv->base + NSC_DATA); in nsc_wait_for_ready()
139 data = inb(priv->base + NSC_DATA); in tpm_nsc_recv()
156 *p = inb(priv->base + NSC_DATA); in tpm_nsc_recv()
165 data = inb(priv->base in tpm_nsc_recv()
276 tpm_read_index(int base, int index) tpm_read_index() argument
282 tpm_write_index(int base, int index, int value) tpm_write_index() argument
294 unsigned long base; init_nsc() local
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_link_encoder.c38 enc10->base.ctx
40 enc10->base.ctx->logger
405 enc10->base.funcs = &dcn20_link_enc_funcs; in dcn20_link_encoder_construct()
406 enc10->base.ctx = init_data->ctx; in dcn20_link_encoder_construct()
407 enc10->base.id = init_data->encoder; in dcn20_link_encoder_construct()
409 enc10->base.hpd_source = init_data->hpd_source; in dcn20_link_encoder_construct()
410 enc10->base.connector = init_data->connector; in dcn20_link_encoder_construct()
412 enc10->base.preferred_engine = ENGINE_ID_UNKNOWN; in dcn20_link_encoder_construct()
414 enc10->base.features = *enc_features; in dcn20_link_encoder_construct()
416 enc10->base in dcn20_link_encoder_construct()
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/arm/display/komeda/
H A Dkomeda_pipeline.h88 * component register base,
223 #define to_comp(__c) (((__c) == NULL) ? NULL : &((__c)->base))
227 struct komeda_component base; member
243 struct komeda_component_state base; member
255 struct komeda_component base; member
264 struct komeda_component_state base; member
278 struct komeda_component base; member
289 struct komeda_component_state base; member
296 struct komeda_component base; member
302 struct komeda_component_state base; member
308 struct komeda_component base; global() member
313 struct komeda_component_state base; global() member
319 struct komeda_component base; global() member
328 struct komeda_component_state base; global() member
337 struct komeda_component base; global() member
342 struct komeda_component_state base; global() member
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
H A Dintel_atomic.c71 property->base.id, property->name); in intel_digital_connector_atomic_get_property()
108 property->base.id, property->name); in intel_digital_connector_atomic_set_property()
149 new_conn_state->base.colorspace != old_conn_state->base.colorspace || in intel_digital_connector_atomic_check()
150 new_conn_state->base.picture_aspect_ratio != old_conn_state->base.picture_aspect_ratio || in intel_digital_connector_atomic_check()
151 new_conn_state->base.content_type != old_conn_state->base.content_type || in intel_digital_connector_atomic_check()
152 new_conn_state->base.scaling_mode != old_conn_state->base in intel_digital_connector_atomic_check()
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/dispnv04/
H A Doverlay.c39 struct drm_plane base; member
123 container_of(plane, struct nouveau_plane, base); in nv10_update_plane()
197 container_of(plane, struct nouveau_plane, base); in nv10_disable_plane()
219 struct nvif_object *dev = &nouveau_drm(plane->base.dev)->client.device.object; in nv10_set_params()
249 container_of(plane, struct nouveau_plane, base); in nv_set_property()
261 else if (property == nv_plane->base.color_encoding_property) in nv_set_property()
299 ret = drm_plane_init(device, &plane->base, 3 /* both crtc's */, in nv10_overlay_init()
324 drm_object_attach_property(&plane->base.base, in nv10_overlay_init()
328 drm_object_attach_property(&plane->base in nv10_overlay_init()
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dgf100.c24 #define gf100_clk(p) container_of((p), struct gf100_clk, base)
42 struct nvkm_clk base; member
51 struct nvkm_device *device = clk->base.subdev.device; in read_vco()
54 return nvkm_clk_read(&clk->base, nv_clk_src_sppll0); in read_vco()
55 return nvkm_clk_read(&clk->base, nv_clk_src_sppll1); in read_vco()
61 struct nvkm_device *device = clk->base.subdev.device; in read_pll()
79 sclk = nvkm_clk_read(&clk->base, nv_clk_src_mpllsrc); in read_pll()
82 sclk = nvkm_clk_read(&clk->base, nv_clk_src_mpllsrcref); in read_pll()
100 struct nvkm_device *device = clk->base.subdev.device; in read_div()
135 struct nvkm_device *device = clk->base in read_clk()
158 gf100_clk_read(struct nvkm_clk *base, enum nv_clk_src src) gf100_clk_read() argument
325 gf100_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate) gf100_clk_calc() argument
416 gf100_clk_prog(struct nvkm_clk *base) gf100_clk_prog() argument
442 gf100_clk_tidy(struct nvkm_clk *base) gf100_clk_tidy() argument
[all...]
/kernel/linux/linux-6.6/drivers/watchdog/
H A Dimx7ulp_wdt.c62 void __iomem *base; member
68 static int imx7ulp_wdt_wait_ulk(void __iomem *base) in imx7ulp_wdt_wait_ulk() argument
70 u32 val = readl(base + WDOG_CS); in imx7ulp_wdt_wait_ulk()
73 readl_poll_timeout_atomic(base + WDOG_CS, val, in imx7ulp_wdt_wait_ulk()
84 u32 val = readl(wdt->base + WDOG_CS); in imx7ulp_wdt_wait_rcs()
91 readl_poll_timeout(wdt->base + WDOG_CS, val, val & WDOG_CS_RCS, 100, in imx7ulp_wdt_wait_rcs()
104 u32 val = readl(wdt->base + WDOG_CS); in _imx7ulp_wdt_enable()
108 writel(UNLOCK, wdt->base + WDOG_CNT); in _imx7ulp_wdt_enable()
109 ret = imx7ulp_wdt_wait_ulk(wdt->base); in _imx7ulp_wdt_enable()
113 writel(val | WDOG_CS_EN, wdt->base in _imx7ulp_wdt_enable()
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_link_encoder.c37 enc10->base.ctx
39 enc10->base.ctx->logger
404 enc10->base.funcs = &dcn20_link_enc_funcs; in dcn20_link_encoder_construct()
405 enc10->base.ctx = init_data->ctx; in dcn20_link_encoder_construct()
406 enc10->base.id = init_data->encoder; in dcn20_link_encoder_construct()
408 enc10->base.hpd_source = init_data->hpd_source; in dcn20_link_encoder_construct()
409 enc10->base.connector = init_data->connector; in dcn20_link_encoder_construct()
411 enc10->base.preferred_engine = ENGINE_ID_UNKNOWN; in dcn20_link_encoder_construct()
413 enc10->base.features = *enc_features; in dcn20_link_encoder_construct()
415 enc10->base in dcn20_link_encoder_construct()
[all...]
/kernel/linux/linux-6.6/drivers/pci/controller/dwc/
H A Dpcie-uniphier-ep.c73 void __iomem *base; member
95 val = readl(priv->base + PCL_APP_READY_CTRL); in uniphier_pcie_ltssm_enable()
100 writel(val, priv->base + PCL_APP_READY_CTRL); in uniphier_pcie_ltssm_enable()
108 val = readl(priv->base + PCL_RSTCTRL2); in uniphier_pcie_phy_reset()
113 writel(val, priv->base + PCL_RSTCTRL2); in uniphier_pcie_phy_reset()
121 val = readl(priv->base + PCL_MODE); in uniphier_pcie_pro5_init_ep()
123 writel(val, priv->base + PCL_MODE); in uniphier_pcie_pro5_init_ep()
126 val = readl(priv->base + PCL_APP_CLK_CTRL); in uniphier_pcie_pro5_init_ep()
128 writel(val, priv->base + PCL_APP_CLK_CTRL); in uniphier_pcie_pro5_init_ep()
131 val = readl(priv->base in uniphier_pcie_pro5_init_ep()
[all...]
/kernel/linux/linux-6.6/drivers/phy/ingenic/
H A Dphy-ingenic-usb.c94 void __iomem *base; member
115 reg = readl(priv->base + REG_USBPCR_OFFSET); in ingenic_usb_phy_init()
116 writel(reg & ~USBPCR_POR, priv->base + REG_USBPCR_OFFSET); in ingenic_usb_phy_init()
163 reg = readl(priv->base + REG_USBPCR_OFFSET); in ingenic_usb_phy_set_mode()
168 writel(reg, priv->base + REG_USBPCR_OFFSET); in ingenic_usb_phy_set_mode()
172 reg = readl(priv->base + REG_USBPCR_OFFSET); in ingenic_usb_phy_set_mode()
177 writel(reg, priv->base + REG_USBPCR_OFFSET); in ingenic_usb_phy_set_mode()
181 reg = readl(priv->base + REG_USBPCR_OFFSET); in ingenic_usb_phy_set_mode()
186 writel(reg, priv->base + REG_USBPCR_OFFSET); in ingenic_usb_phy_set_mode()
218 writel(reg, priv->base in jz4770_usb_phy_init()
[all...]

Completed in 13 milliseconds

1...<<51525354555657585960>>...686