/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
H A D | umc_v6_1.c | 146 uint32_t umc_inst = 0; in umc_v6_1_clear_error_count() local 258 uint32_t umc_inst = 0; in umc_v6_1_query_ras_error_count() local 86 get_umc_6_reg_offset(struct amdgpu_device *adev, uint32_t umc_inst, uint32_t ch_inst) get_umc_6_reg_offset() argument 294 umc_v6_1_query_error_address(struct amdgpu_device *adev, struct ras_err_data *err_data, uint32_t umc_reg_offset, uint32_t ch_inst, uint32_t umc_inst) umc_v6_1_query_error_address() argument 373 uint32_t umc_inst = 0; umc_v6_1_query_ras_error_address() local 446 uint32_t umc_inst = 0; umc_v6_1_err_cnt_init() local [all...] |
H A D | umc_v8_7.c | 89 uint32_t umc_inst = 0; in umc_v8_7_clear_error_count() local 175 uint32_t umc_inst = 0; in umc_v8_7_query_ras_error_count() local 42 get_umc_8_reg_offset(struct amdgpu_device *adev, uint32_t umc_inst, uint32_t ch_inst) get_umc_8_reg_offset() argument 195 umc_v8_7_query_error_address(struct amdgpu_device *adev, struct ras_err_data *err_data, uint32_t umc_reg_offset, uint32_t ch_inst, uint32_t umc_inst) umc_v8_7_query_error_address() argument 265 uint32_t umc_inst = 0; umc_v8_7_query_ras_error_address() local 313 uint32_t umc_inst = 0; umc_v8_7_err_cnt_init() local [all...] |
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_umc.c | 314 uint32_t umc_inst = 0; in amdgpu_umc_loop_channels() local 27 amdgpu_umc_convert_error_address(struct amdgpu_device *adev, struct ras_err_data *err_data, uint64_t err_addr, uint32_t ch_inst, uint32_t umc_inst) amdgpu_umc_convert_error_address() argument 45 amdgpu_umc_page_retirement_mca(struct amdgpu_device *adev, uint64_t err_addr, uint32_t ch_inst, uint32_t umc_inst) amdgpu_umc_page_retirement_mca() argument 289 amdgpu_umc_fill_error_record(struct ras_err_data *err_data, uint64_t err_addr, uint64_t retired_page, uint32_t channel_index, uint32_t umc_inst) amdgpu_umc_fill_error_record() argument [all...] |
H A D | umc_v6_1.c | 147 uint32_t umc_inst = 0; in umc_v6_1_clear_error_count() local 259 uint32_t umc_inst = 0; in umc_v6_1_query_ras_error_count() local 87 get_umc_6_reg_offset(struct amdgpu_device *adev, uint32_t umc_inst, uint32_t ch_inst) get_umc_6_reg_offset() argument 295 umc_v6_1_query_error_address(struct amdgpu_device *adev, struct ras_err_data *err_data, uint32_t umc_reg_offset, uint32_t ch_inst, uint32_t umc_inst) umc_v6_1_query_error_address() argument 358 uint32_t umc_inst = 0; umc_v6_1_query_ras_error_address() local 431 uint32_t umc_inst = 0; umc_v6_1_err_cnt_init() local [all...] |
H A D | umc_v8_10.c | 70 get_umc_v8_10_reg_offset(struct amdgpu_device *adev, uint32_t node_inst, uint32_t umc_inst, uint32_t ch_inst) get_umc_v8_10_reg_offset() argument 79 umc_v8_10_clear_error_count_per_channel(struct amdgpu_device *adev, uint32_t node_inst, uint32_t umc_inst, uint32_t ch_inst, void *data) umc_v8_10_clear_error_count_per_channel() argument 143 umc_v8_10_query_ecc_error_count(struct amdgpu_device *adev, uint32_t node_inst, uint32_t umc_inst, uint32_t ch_inst, void *data) umc_v8_10_query_ecc_error_count() argument 205 umc_v8_10_convert_error_address(struct amdgpu_device *adev, struct ras_err_data *err_data, uint64_t err_addr, uint32_t ch_inst, uint32_t umc_inst, uint32_t node_inst, uint64_t mc_umc_status) umc_v8_10_convert_error_address() argument 244 umc_v8_10_query_error_address(struct amdgpu_device *adev, uint32_t node_inst, uint32_t umc_inst, uint32_t ch_inst, void *data) umc_v8_10_query_error_address() argument 294 umc_v8_10_err_cnt_init_per_channel(struct amdgpu_device *adev, uint32_t node_inst, uint32_t umc_inst, uint32_t ch_inst, void *data) umc_v8_10_err_cnt_init_per_channel() argument 335 umc_v8_10_ecc_info_query_correctable_error_count(struct amdgpu_device *adev, uint32_t node_inst, uint32_t umc_inst, uint32_t ch_inst, unsigned long *error_count) umc_v8_10_ecc_info_query_correctable_error_count() argument 356 umc_v8_10_ecc_info_query_uncorrectable_error_count(struct amdgpu_device *adev, uint32_t node_inst, uint32_t umc_inst, uint32_t ch_inst, unsigned long *error_count) umc_v8_10_ecc_info_query_uncorrectable_error_count() argument 381 umc_v8_10_ecc_info_query_ecc_error_count(struct amdgpu_device *adev, uint32_t node_inst, uint32_t umc_inst, uint32_t ch_inst, void *data) umc_v8_10_ecc_info_query_ecc_error_count() argument 403 umc_v8_10_ecc_info_query_error_address(struct amdgpu_device *adev, uint32_t node_inst, uint32_t umc_inst, uint32_t ch_inst, void *data) umc_v8_10_ecc_info_query_error_address() argument [all...] |
H A D | umc_v8_7.c | 95 uint32_t umc_inst = 0; in umc_v8_7_ecc_info_query_ras_error_count() local 43 get_umc_v8_7_reg_offset(struct amdgpu_device *adev, uint32_t umc_inst, uint32_t ch_inst) get_umc_v8_7_reg_offset() argument 50 umc_v8_7_ecc_info_query_correctable_error_count(struct amdgpu_device *adev, uint32_t umc_inst, uint32_t ch_inst, unsigned long *error_count) umc_v8_7_ecc_info_query_correctable_error_count() argument 69 umc_v8_7_ecc_info_querry_uncorrectable_error_count(struct amdgpu_device *adev, uint32_t umc_inst, uint32_t ch_inst, unsigned long *error_count) umc_v8_7_ecc_info_querry_uncorrectable_error_count() argument 111 umc_v8_7_convert_error_address(struct amdgpu_device *adev, struct ras_err_data *err_data, uint64_t err_addr, uint32_t ch_inst, uint32_t umc_inst) umc_v8_7_convert_error_address() argument 130 umc_v8_7_ecc_info_query_error_address(struct amdgpu_device *adev, struct ras_err_data *err_data, uint32_t ch_inst, uint32_t umc_inst) umc_v8_7_ecc_info_query_error_address() argument 165 uint32_t umc_inst = 0; umc_v8_7_ecc_info_query_ras_error_address() local 220 uint32_t umc_inst = 0; umc_v8_7_clear_error_count() local 306 uint32_t umc_inst = 0; umc_v8_7_query_ras_error_count() local 326 umc_v8_7_query_error_address(struct amdgpu_device *adev, struct ras_err_data *err_data, uint32_t umc_reg_offset, uint32_t ch_inst, uint32_t umc_inst) umc_v8_7_query_error_address() argument 373 uint32_t umc_inst = 0; umc_v8_7_query_ras_error_address() local 421 uint32_t umc_inst = 0; umc_v8_7_err_cnt_init() local [all...] |
H A D | umc_v6_7.c | 46 get_umc_v6_7_reg_offset(struct amdgpu_device *adev, uint32_t umc_inst, uint32_t ch_inst) get_umc_v6_7_reg_offset() argument 94 umc_v6_7_ecc_info_query_correctable_error_count(struct amdgpu_device *adev, uint32_t umc_inst, uint32_t ch_inst, unsigned long *error_count) umc_v6_7_ecc_info_query_correctable_error_count() argument 136 umc_v6_7_ecc_info_querry_uncorrectable_error_count(struct amdgpu_device *adev, uint32_t umc_inst, uint32_t ch_inst, unsigned long *error_count) umc_v6_7_ecc_info_querry_uncorrectable_error_count() argument 163 umc_v6_7_ecc_info_querry_ecc_error_count(struct amdgpu_device *adev, uint32_t node_inst, uint32_t umc_inst, uint32_t ch_inst, void *data) umc_v6_7_ecc_info_querry_ecc_error_count() argument 187 umc_v6_7_convert_error_address(struct amdgpu_device *adev, struct ras_err_data *err_data, uint64_t err_addr, uint32_t ch_inst, uint32_t umc_inst) umc_v6_7_convert_error_address() argument 222 umc_v6_7_ecc_info_query_error_address(struct amdgpu_device *adev, uint32_t node_inst, uint32_t umc_inst, uint32_t ch_inst, void *data) umc_v6_7_ecc_info_query_error_address() argument 261 umc_v6_7_query_correctable_error_count(struct amdgpu_device *adev, uint32_t umc_reg_offset, unsigned long *error_count, uint32_t ch_inst, uint32_t umc_inst) umc_v6_7_query_correctable_error_count() argument 361 umc_v6_7_reset_error_count_per_channel(struct amdgpu_device *adev, uint32_t node_inst, uint32_t umc_inst, uint32_t ch_inst, void *data) umc_v6_7_reset_error_count_per_channel() argument 412 umc_v6_7_query_ecc_error_count(struct amdgpu_device *adev, uint32_t node_inst, uint32_t umc_inst, uint32_t ch_inst, void *data) umc_v6_7_query_ecc_error_count() argument 441 umc_v6_7_query_error_address(struct amdgpu_device *adev, uint32_t node_inst, uint32_t umc_inst, uint32_t ch_inst, void *data) umc_v6_7_query_error_address() argument [all...] |
H A D | amdgpu_ras.c | 3047 uint32_t umc_inst = 0, ch_inst = 0; in amdgpu_bad_page_notifier() local
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