| H A D | vp9_mc_msa.c | 164 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; common_hz_8t_4x4_msa() local 193 v16i8 src0, src1, src2, src3; common_hz_8t_4x8_msa() local 240 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; common_hz_8t_8x4_msa() local 272 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; common_hz_8t_8x8mult_msa() local 320 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; common_hz_8t_16w_msa() local 359 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; common_hz_8t_32w_msa() local 418 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; common_hz_8t_64w_msa() local 475 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; common_vt_8t_4w_msa() local 527 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; common_vt_8t_8w_msa() local 582 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; common_vt_8t_16w_msa() local 664 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; common_vt_8t_16w_mult_msa() local 768 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; common_hv_8ht_8vt_4w_msa() local 844 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; common_hv_8ht_8vt_8w_msa() local 992 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; common_hz_8t_and_aver_dst_4x4_msa() local 1027 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; common_hz_8t_and_aver_dst_4x8_msa() local 1089 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; common_hz_8t_and_aver_dst_8w_msa() local 1129 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; common_hz_8t_and_aver_dst_16w_msa() local 1187 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; common_hz_8t_and_aver_dst_32w_msa() local 1246 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; common_hz_8t_and_aver_dst_64w_msa() local 1309 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; common_vt_8t_and_aver_dst_4w_msa() local 1368 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; common_vt_8t_and_aver_dst_8w_msa() local 1432 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; common_vt_8t_and_aver_dst_16w_mult_msa() local 1558 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; common_hv_8ht_8vt_and_aver_dst_4w_msa() local 1641 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; common_hv_8ht_8vt_and_aver_dst_8w_msa() local 1799 v16i8 src0, src1, src2, src3, mask; common_hz_2t_4x4_msa() local 1823 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask; common_hz_2t_4x8_msa() local 1865 v16i8 src0, src1, src2, src3, mask; common_hz_2t_8x4_msa() local 1889 v16i8 src0, src1, src2, src3, mask, out0, out1; common_hz_2t_8x8mult_msa() local 1966 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask; ff_put_bilin_16h_msa() local 2033 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask; ff_put_bilin_32h_msa() local 2080 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask; ff_put_bilin_64h_msa() local 2121 v16i8 src0, src1, src2, src3, src4; common_vt_2t_4x4_msa() local 2147 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; common_vt_2t_4x8_msa() local 2194 v16u8 src0, src1, src2, src3, src4, vec0, vec1, vec2, vec3, filt0; common_vt_2t_8x4_msa() local 2219 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8; common_vt_2t_8x8mult_msa() local 2279 v16u8 src0, src1, src2, src3, src4; ff_put_bilin_16v_msa() local 2333 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9; ff_put_bilin_32v_msa() local 2411 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; ff_put_bilin_64v_msa() local 2490 v16i8 src0, src1, src2, src3, src4, mask; common_hv_2ht_2vt_4x4_msa() local 2523 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, mask; common_hv_2ht_2vt_4x8_msa() local 2585 v16i8 src0, src1, src2, src3, src4, mask, out0, out1; common_hv_2ht_2vt_8x4_msa() local 2630 v16i8 src0, src1, src2, src3, src4, mask, out0, out1; common_hv_2ht_2vt_8x8mult_msa() local 2726 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask; ff_put_bilin_16hv_msa() local 2824 v16i8 src0, src1, src2, src3, mask; common_hz_2t_and_aver_dst_4x4_msa() local 2853 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask; common_hz_2t_and_aver_dst_4x8_msa() local 2902 v16i8 src0, src1, src2, src3, mask; common_hz_2t_and_aver_dst_8x4_msa() local 2932 v16i8 src0, src1, src2, src3, mask; common_hz_2t_and_aver_dst_8x8mult_msa() local 3017 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask; ff_avg_bilin_16h_msa() local 3085 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask; ff_avg_bilin_32h_msa() local 3135 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask; ff_avg_bilin_64h_msa() local 3177 v16i8 src0, src1, src2, src3, src4; common_vt_2t_and_aver_dst_4x4_msa() local 3214 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src87_r; common_vt_2t_and_aver_dst_4x8_msa() local 3268 v16u8 src0, src1, src2, src3, src4; common_vt_2t_and_aver_dst_8x4_msa() local 3299 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8; common_vt_2t_and_aver_dst_8x8mult_msa() local 3366 v16u8 src0, src1, src2, src3, src4, dst0, dst1, dst2, dst3, filt0; ff_avg_bilin_16v_msa() local 3420 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9; ff_avg_bilin_32v_msa() local 3500 v16u8 src0, src1, src2, src3, src4, src5; ff_avg_bilin_64v_msa() local 3589 v16i8 src0, src1, src2, src3, src4, mask; common_hv_2ht_2vt_and_aver_dst_4x4_msa() local 3633 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, mask; common_hv_2ht_2vt_and_aver_dst_4x8_msa() local 3701 v16i8 src0, src1, src2, src3, src4, mask; common_hv_2ht_2vt_and_aver_dst_8x4_msa() local 3753 v16i8 src0, src1, src2, src3, src4, mask; common_hv_2ht_2vt_and_aver_dst_8x8mult_msa() local 3830 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask; ff_avg_bilin_16hv_msa() local 3957 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; copy_width16_msa() local 4001 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; copy_width32_msa() local 4031 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; copy_width64_msa() local 4090 v16u8 src0, src1, src2, src3; avg_width8_msa() local 4131 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; avg_width16_msa() local 4167 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; avg_width32_msa() local 4230 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; avg_width64_msa() local [all...] |
| H A D | assembler-x64.h | 1172 vpblendvb(XMMRegister dst, XMMRegister src1, XMMRegister src2, XMMRegister mask) vpblendvb() argument 1178 vpblendvb(YMMRegister dst, YMMRegister src1, YMMRegister src2, YMMRegister mask) vpblendvb() argument 1185 vblendvps(XMMRegister dst, XMMRegister src1, XMMRegister src2, XMMRegister mask) vblendvps() argument 1191 vblendvps(YMMRegister dst, YMMRegister src1, YMMRegister src2, YMMRegister mask) vblendvps() argument 1198 vblendvpd(XMMRegister dst, XMMRegister src1, XMMRegister src2, XMMRegister mask) vblendvpd() argument 1204 vblendvpd(YMMRegister dst, YMMRegister src1, YMMRegister src2, YMMRegister mask) vblendvpd() argument 1395 vmovsd(XMMRegister dst, XMMRegister src1, XMMRegister src2) vmovsd() argument 1482 vmovlhps(XMMRegister dst, XMMRegister src1, XMMRegister src2) vmovlhps() argument 1485 vmovhlps(XMMRegister dst, XMMRegister src1, XMMRegister src2) vmovhlps() argument 1494 vcvtlsi2sd(XMMRegister dst, XMMRegister src1, Register src2) vcvtlsi2sd() argument 1498 vcvtlsi2sd(XMMRegister dst, XMMRegister src1, Operand src2) vcvtlsi2sd() argument 1501 vcvtlsi2ss(XMMRegister dst, XMMRegister src1, Register src2) vcvtlsi2ss() argument 1505 vcvtlsi2ss(XMMRegister dst, XMMRegister src1, Operand src2) vcvtlsi2ss() argument 1508 vcvtqsi2ss(XMMRegister dst, XMMRegister src1, Register src2) vcvtqsi2ss() argument 1512 vcvtqsi2ss(XMMRegister dst, XMMRegister src1, Operand src2) vcvtqsi2ss() argument 1515 vcvtqsi2sd(XMMRegister dst, XMMRegister src1, Register src2) vcvtqsi2sd() argument 1519 vcvtqsi2sd(XMMRegister dst, XMMRegister src1, Operand src2) vcvtqsi2sd() argument 1558 vroundss(XMMRegister dst, XMMRegister src1, XMMRegister src2, RoundingMode mode) vroundss() argument 1563 vroundss(XMMRegister dst, XMMRegister src1, Operand src2, RoundingMode mode) vroundss() argument 1568 vroundsd(XMMRegister dst, XMMRegister src1, XMMRegister src2, RoundingMode mode) vroundsd() argument 1573 vroundsd(XMMRegister dst, XMMRegister src1, Operand src2, RoundingMode mode) vroundsd() argument 1596 vsd(byte op, Reg dst, Reg src1, Op src2) vsd() argument 1600 vmovss(XMMRegister dst, XMMRegister src1, XMMRegister src2) vmovss() argument 1610 vshufps(XMMRegister dst, XMMRegister src1, XMMRegister src2, byte imm8) vshufps() argument 1613 vshufps(YMMRegister dst, YMMRegister src1, YMMRegister src2, byte imm8) vshufps() argument 1650 vcmpps(XMMRegister dst, XMMRegister src1, XMMRegister src2, int8_t cmp) vcmpps() argument 1654 vcmpps(YMMRegister dst, YMMRegister src1, YMMRegister src2, int8_t cmp) vcmpps() argument 1658 vcmpps(XMMRegister dst, XMMRegister src1, Operand src2, int8_t cmp) vcmpps() argument 1662 vcmpps(YMMRegister dst, YMMRegister src1, Operand src2, int8_t cmp) vcmpps() argument 1666 vcmppd(XMMRegister dst, XMMRegister src1, XMMRegister src2, int8_t cmp) vcmppd() argument 1670 vcmppd(YMMRegister dst, YMMRegister src1, YMMRegister src2, int8_t cmp) vcmppd() argument 1674 vcmppd(XMMRegister dst, XMMRegister src1, Operand src2, int8_t cmp) vcmppd() argument 1678 vcmppd(YMMRegister dst, YMMRegister src1, Operand src2, int8_t cmp) vcmppd() argument 1718 vinsertps(XMMRegister dst, XMMRegister src1, XMMRegister src2, byte imm8) vinsertps() argument 1723 vinsertps(XMMRegister dst, XMMRegister src1, Operand src2, byte imm8) vinsertps() argument 1732 vpinsrb(XMMRegister dst, XMMRegister src1, Register src2, uint8_t imm8) vpinsrb() argument 1737 vpinsrb(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t imm8) vpinsrb() argument 1741 vpinsrw(XMMRegister dst, XMMRegister src1, Register src2, uint8_t imm8) vpinsrw() argument 1746 vpinsrw(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t imm8) vpinsrw() argument 1750 vpinsrd(XMMRegister dst, XMMRegister src1, Register src2, uint8_t imm8) vpinsrd() argument 1755 vpinsrd(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t imm8) vpinsrd() argument 1759 vpinsrq(XMMRegister dst, XMMRegister src1, Register src2, uint8_t imm8) vpinsrq() argument 1764 vpinsrq(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t imm8) vpinsrq() argument 1818 vpblendw(XMMRegister dst, XMMRegister src1, XMMRegister src2, uint8_t mask) vpblendw() argument 1823 vpblendw(YMMRegister dst, YMMRegister src1, YMMRegister src2, uint8_t mask) vpblendw() argument 1828 vpblendw(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t mask) vpblendw() argument 1832 vpblendw(YMMRegister dst, YMMRegister src1, Operand src2, uint8_t mask) vpblendw() argument 1837 vpalignr(XMMRegister dst, XMMRegister src1, XMMRegister src2, uint8_t imm8) vpalignr() argument 1842 vpalignr(YMMRegister dst, YMMRegister src1, YMMRegister src2, uint8_t imm8) vpalignr() argument 1847 vpalignr(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t imm8) vpalignr() argument 1851 vpalignr(YMMRegister dst, YMMRegister src1, Operand src2, uint8_t imm8) vpalignr() argument 1880 andnq(Register dst, Register src1, Register src2) andnq() argument 1883 andnq(Register dst, Register src1, Operand src2) andnq() argument 1886 andnl(Register dst, Register src1, Register src2) andnl() argument 1889 andnl(Register dst, Register src1, Operand src2) andnl() argument 1892 bextrq(Register dst, Register src1, Register src2) bextrq() argument 1895 bextrq(Register dst, Operand src1, Register src2) bextrq() argument 1898 bextrl(Register dst, Register src1, Register src2) bextrl() argument 1901 bextrl(Register dst, Operand src1, Register src2) bextrl() argument 1931 bzhiq(Register dst, Register src1, Register src2) bzhiq() argument 1934 bzhiq(Register dst, Operand src1, Register src2) bzhiq() argument 1937 bzhil(Register dst, Register src1, Register src2) bzhil() argument 1940 bzhil(Register dst, Operand src1, Register src2) bzhil() argument 1955 pdepq(Register dst, Register src1, Register src2) pdepq() argument 1958 pdepq(Register dst, Register src1, Operand src2) pdepq() argument 1961 pdepl(Register dst, Register src1, Register src2) pdepl() argument 1964 pdepl(Register dst, Register src1, Operand src2) pdepl() argument 1967 pextq(Register dst, Register src1, Register src2) pextq() argument 1970 pextq(Register dst, Register src1, Operand src2) pextq() argument 1973 pextl(Register dst, Register src1, Register src2) pextl() argument 1976 pextl(Register dst, Register src1, Operand src2) pextl() argument 1979 sarxq(Register dst, Register src1, Register src2) sarxq() argument 1982 sarxq(Register dst, Operand src1, Register src2) sarxq() argument 1985 sarxl(Register dst, Register src1, Register src2) sarxl() argument 1988 sarxl(Register dst, Operand src1, Register src2) sarxl() argument 1991 shlxq(Register dst, Register src1, Register src2) shlxq() argument 1994 shlxq(Register dst, Operand src1, Register src2) shlxq() argument 1997 shlxl(Register dst, Register src1, Register src2) shlxl() argument 2000 shlxl(Register dst, Operand src1, Register src2) shlxl() argument 2003 shrxq(Register dst, Register src1, Register src2) shrxq() argument 2006 shrxq(Register dst, Operand src1, Register src2) shrxq() argument 2009 shrxl(Register dst, Register src1, Register src2) shrxl() argument 2012 shrxl(Register dst, Operand src1, Register src2) shrxl() argument [all...] |