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/third_party/pcre2/pcre2/src/sljit/
H A DsljitNativeX86_common.c1735 emit_cum_binary(struct sljit_compiler *compiler, sljit_u32 op_types, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) global() argument
1842 emit_non_cum_binary(struct sljit_compiler *compiler, sljit_u32 op_types, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) global() argument
1915 emit_mul(struct sljit_compiler *compiler, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) global() argument
2043 emit_lea_binary(struct sljit_compiler *compiler, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) global() argument
2100 emit_cmp_binary(struct sljit_compiler *compiler, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) global() argument
2151 emit_test_binary(struct sljit_compiler *compiler, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) global() argument
2261 emit_shift(struct sljit_compiler *compiler, sljit_u8 mode, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) global() argument
2368 emit_shift_with_flags(struct sljit_compiler *compiler, sljit_u8 mode, sljit_s32 set_flags, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) global() argument
2404 sljit_emit_op2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) global() argument
2487 sljit_emit_op2u(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) global() argument
2516 sljit_emit_shift_into(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 src_dst, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) global() argument
2810 sljit_emit_fop1_cmp(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) global() argument
2901 sljit_emit_fop2(struct sljit_compiler *compiler, sljit_s32 op, sljit_s32 dst, sljit_sw dstw, sljit_s32 src1, sljit_sw src1w, sljit_s32 src2, sljit_sw src2w) global() argument
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/third_party/skia/third_party/externals/swiftshader/src/OpenGL/compiler/
H A DOutputASM.cpp2086 Instruction *OutputASM::emit(sw::Shader::Opcode op, TIntermTyped *dst, TIntermNode *src0, TIntermNode *src1, TIntermNode *src2, TIntermNode *src3, TIntermNode *src4) in emit() argument
2091 Instruction *OutputASM::emit(sw::Shader::Opcode op, TIntermTyped *dst, int dstIndex, TIntermNode *src0, int index0, TIntermNode *src1, int index1, in emit() argument
2172 void OutputASM::emitBinary(sw::Shader::Opcode op, TIntermTyped *dst, TIntermNode *src0, TIntermNode *src1, TIntermNode *src2) in emitBinary() argument
2180 void OutputASM::emitAssign(sw::Shader::Opcode op, TIntermTyped *result, TIntermTyped *lhs, TIntermTyped *src0, TIntermTyped *src1) in emitAssign() argument
/third_party/skia/third_party/externals/swiftshader/src/Shader/
H A DShaderCore.cpp766 void ShaderCore::add(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) in add() argument
774 void ShaderCore::iadd(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) in iadd() argument
782 sub(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) sub() argument
790 isub(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) isub() argument
798 mad(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, const Vector4f &src2) mad() argument
806 imad(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, const Vector4f &src2) imad() argument
814 mul(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) mul() argument
822 imul(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) imul() argument
840 div(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) div() argument
848 idiv(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) idiv() argument
861 udiv(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) udiv() argument
874 mod(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) mod() argument
882 imod(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) imod() argument
895 umod(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) umod() argument
908 shl(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) shl() argument
916 ishr(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) ishr() argument
924 ushr(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) ushr() argument
973 dist1(Float4 &dst, const Vector4f &src0, const Vector4f &src1, bool pp) dist1() argument
978 dist2(Float4 &dst, const Vector4f &src0, const Vector4f &src1, bool pp) dist2() argument
986 dist3(Float4 &dst, const Vector4f &src0, const Vector4f &src1, bool pp) dist3() argument
995 dist4(Float4 &dst, const Vector4f &src0, const Vector4f &src1, bool pp) dist4() argument
1005 dp1(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) dp1() argument
1015 dp2(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) dp2() argument
1025 dp2add(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, const Vector4f &src2) dp2add() argument
1035 dp3(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) dp3() argument
1045 dp4(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) dp4() argument
1055 min(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) min() argument
1063 imin(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) imin() argument
1071 umin(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) umin() argument
1079 max(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) max() argument
1087 imax(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) imax() argument
1095 umax(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) umax() argument
1103 slt(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) slt() argument
1189 att(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) att() argument
1198 lrp(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, const Vector4f &src2) lrp() argument
1309 det2(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) det2() argument
1315 det3(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, const Vector4f &src2) det3() argument
1321 det4(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, const Vector4f &src2, const Vector4f &src3) det4() argument
1396 powx(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, bool pp) powx() argument
1406 pow(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, bool pp) pow() argument
1414 crs(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) crs() argument
1654 atan2(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, bool pp) atan2() argument
1759 cmp0(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, const Vector4f &src2) cmp0() argument
1767 select(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, const Vector4f &src2) select() argument
1775 extract(Float4 &dst, const Vector4f &src0, const Float4 &src1) extract() argument
1804 cmp0(Float4 &dst, const Float4 &src0, const Float4 &src1, const Float4 &src2) cmp0() argument
1810 cmp0i(Float4 &dst, const Float4 &src0, const Float4 &src1, const Float4 &src2) cmp0i() argument
1816 select(Float4 &dst, RValue<Int4> src0, const Float4 &src1, const Float4 &src2) select() argument
1822 cmp(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, Control control) cmp() argument
1867 icmp(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, Control control) icmp() argument
1912 ucmp(Vector4f &dst, const Vector4f &src0, const Vector4f &src1, Control control) ucmp() argument
1975 bitwise_or(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) bitwise_or() argument
1983 bitwise_xor(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) bitwise_xor() argument
1991 bitwise_and(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) bitwise_and() argument
1999 equal(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) equal() argument
2010 notEqual(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) notEqual() argument
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/
H A DIceTargetLoweringARM32.cpp2255 Operand *src1() const { return Src1; } in src1() function in __anon25511::NumericOperandsBase
/third_party/vixl/src/aarch64/
H A Dmacro-assembler-aarch64.cc2251 const CPURegister& src1 = registers.PopLowestIndex(); in Emit() local
2195 Push(const CPURegister& src0, const CPURegister& src1, const CPURegister& src2, const CPURegister& src3) Emit() argument
2320 PushHelper(int count, int size, const CPURegister& src0, const CPURegister& src1, const CPURegister& src2, const CPURegister& src3) Emit() argument
[all...]
/device/soc/rockchip/common/vendor/drivers/video/rockchip/rga2/
H A Drga2.h460 rga_img_info_t src1; // src1 active window member
/device/soc/rockchip/common/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd_wifi6/include/
H A Dbcmutils.h773 xor_128bit_block(const uint8 *src1, const uint8 *src2, uint8 *dst) in xor_128bit_block() argument
/third_party/ffmpeg/libavcodec/
H A Dhevcdec.c1584 uint8_t *src1 = ref1->data[0] + y_off1 * src1stride + (int)((unsigned)x_off1 << s->ps.sps->pixel_shift); in luma_mc_bi() local
1724 uint8_t *src1 = ref0->data[cidx+1]; in chroma_mc_bi() local
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/third_party/ffmpeg/libavcodec/mips/
H A Dh264qpel_msa.c647 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; in ff_put_h264_qpel16_mc00_msa() local
662 uint64_t src0, src1, src2, src3, src4, src5, src6, src7; in ff_put_h264_qpel8_mc00_msa() local
675 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; in ff_avg_h264_qpel16_mc00_msa() local
703 v16u8 src0 = { 0 }, src1 = { 0 }, src2 = { 0 }, src3 = { 0 }; ff_avg_h264_qpel8_mc00_msa() local
747 v16i8 dst0, dst1, dst2, dst3, src0, src1, src2, src3, src4, src5, src6; ff_put_h264_qpel16_mc10_msa() local
815 v16i8 dst0, dst1, dst2, dst3, src0, src1, src2, src3, src4, src5, src6; ff_put_h264_qpel16_mc30_msa() local
882 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask0, mask1, mask2; ff_put_h264_qpel8_mc10_msa() local
937 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask0, mask1, mask2; ff_put_h264_qpel8_mc30_msa() local
992 v16i8 src0, src1, src2, src3, res, mask0, mask1, mask2; ff_put_h264_qpel4_mc10_msa() local
1023 v16i8 src0, src1, src2, src3, res, mask0, mask1, mask2; ff_put_h264_qpel4_mc30_msa() local
1055 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask0, mask1, mask2; ff_put_h264_qpel16_mc20_msa() local
1114 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask0, mask1, mask2; ff_put_h264_qpel8_mc20_msa() local
1161 v16i8 src0, src1, src2, src3, mask0, mask1, mask2; ff_put_h264_qpel4_mc20_msa() local
1190 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_put_h264_qpel16_mc01_msa() local
1264 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_put_h264_qpel16_mc03_msa() local
1335 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; ff_put_h264_qpel8_mc01_msa() local
1388 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; ff_put_h264_qpel8_mc03_msa() local
1442 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_put_h264_qpel4_mc01_msa() local
1483 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_put_h264_qpel4_mc03_msa() local
1604 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, mask0, mask1; ff_put_h264_qpel16_mc21_msa() local
1717 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, mask0, mask1; ff_put_h264_qpel16_mc23_msa() local
1827 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; ff_put_h264_qpel8_mc21_msa() local
1962 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; ff_put_h264_qpel8_mc23_msa() local
2097 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_put_h264_qpel4_mc21_msa() local
2161 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_put_h264_qpel4_mc23_msa() local
2227 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_put_h264_qpel16_mc02_msa() local
2293 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; ff_put_h264_qpel8_mc02_msa() local
2343 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_put_h264_qpel4_mc02_msa() local
2378 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; ff_put_h264_qpel16_mc12_msa() local
2460 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; ff_put_h264_qpel16_mc32_msa() local
2543 v16i8 src0, src1, src2, src3, src4, src5, src6; ff_put_h264_qpel8_mc12_msa() local
2618 v16i8 src0, src1, src2, src3, src4, src5, src6; ff_put_h264_qpel8_mc32_msa() local
2696 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_put_h264_qpel4_mc12_msa() local
2788 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_put_h264_qpel4_mc32_msa() local
2887 v16i8 src0, src1, src2, src3, src4, mask0, mask1, mask2; ff_put_h264_qpel16_mc22_msa() local
2984 v16i8 src0, src1, src2, src3, src4, mask0, mask1, mask2; ff_put_h264_qpel8_mc22_msa() local
3097 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_put_h264_qpel4_mc22_msa() local
3150 v16i8 out0, out1, out2, out3, src0, src1, src2, src3, src4, src5, src6; ff_avg_h264_qpel16_mc10_msa() local
3222 v16i8 out0, out1, out2, out3, src0, src1, src2, src3, src4, src5, src6; ff_avg_h264_qpel16_mc30_msa() local
3294 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask0, mask1, mask2; ff_avg_h264_qpel8_mc10_msa() local
3359 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask0, mask1, mask2; ff_avg_h264_qpel8_mc30_msa() local
3424 v16i8 src0, src1, src2, src3, res, vec0, vec1, vec2, vec3, vec4, vec5; ff_avg_h264_qpel4_mc10_msa() local
3460 v16i8 src0, src1, src2, src3, res, vec0, vec1, vec2, vec3, vec4, vec5; ff_avg_h264_qpel4_mc30_msa() local
3496 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask0, mask1, mask2; ff_avg_h264_qpel16_mc20_msa() local
3560 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask0, mask1, mask2; ff_avg_h264_qpel8_mc20_msa() local
3617 v16i8 src0, src1, src2, src3, vec0, vec1, vec2, vec3, vec4, vec5; ff_avg_h264_qpel4_mc20_msa() local
3649 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_avg_h264_qpel16_mc01_msa() local
3726 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_avg_h264_qpel16_mc03_msa() local
3802 v16i8 src0, src1, src2, src3, src4, src7, src8, src9, src10, src11, src12; ff_avg_h264_qpel8_mc01_msa() local
3868 v16i8 src0, src1, src2, src3, src4, src7, src8, src9, src10, src11, src12; ff_avg_h264_qpel8_mc03_msa() local
3934 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_avg_h264_qpel4_mc01_msa() local
3979 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_avg_h264_qpel4_mc03_msa() local
4127 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, mask0, mask1; ff_avg_h264_qpel16_mc21_msa() local
4259 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, mask0, mask1; ff_avg_h264_qpel16_mc23_msa() local
4385 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; ff_avg_h264_qpel8_mc21_msa() local
4531 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; ff_avg_h264_qpel8_mc23_msa() local
4677 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_avg_h264_qpel4_mc21_msa() local
4744 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_avg_h264_qpel4_mc23_msa() local
4812 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_avg_h264_qpel16_mc02_msa() local
4883 v16i8 src0, src1, src2, src3, src4, src7, src8, src9, src10, src109_r; ff_avg_h264_qpel8_mc02_msa() local
4948 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_avg_h264_qpel4_mc02_msa() local
4986 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; ff_avg_h264_qpel16_mc12_msa() local
5070 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; ff_avg_h264_qpel16_mc32_msa() local
5156 v16i8 src0, src1, src2, src3, src4, src5, src6; ff_avg_h264_qpel8_mc12_msa() local
5235 v16i8 src0, src1, src2, src3, src4, src5, src6; ff_avg_h264_qpel8_mc32_msa() local
5317 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_avg_h264_qpel4_mc12_msa() local
5413 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_avg_h264_qpel4_mc32_msa() local
5515 v16i8 src0, src1, src2, src3, src4, mask0, mask1, mask2; ff_avg_h264_qpel16_mc22_msa() local
5616 v16i8 src0, src1, src2, src3, src4, mask0, mask1, mask2; ff_avg_h264_qpel8_mc22_msa() local
5738 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; ff_avg_h264_qpel4_mc22_msa() local
[all...]
/third_party/mesa3d/src/freedreno/ir3/
H A Dir3.h2331 ir3_SAM(struct ir3_block *block, opc_t opc, type_t type, unsigned wrmask, unsigned flags, struct ir3_instruction *samp_tex, struct ir3_instruction *src0, struct ir3_instruction *src1) ir3_SAM() argument
/third_party/mesa3d/src/compiler/spirv/
H A Dspirv_to_nir.c3891 vtn_vector_shuffle(struct vtn_builder *b, unsigned num_components, nir_ssa_def *src0, nir_ssa_def *src1, const uint32_t *indices) vtn_vector_shuffle() argument
5405 vtn_nir_select(struct vtn_builder *b, struct vtn_ssa_value *src0, struct vtn_ssa_value *src1, struct vtn_ssa_value *src2) vtn_nir_select() argument
5705 ray_query_load_intrinsic_create(struct vtn_builder *b, SpvOp opcode, const uint32_t *w, nir_ssa_def *src0, nir_ssa_def *src1) ray_query_load_intrinsic_create() argument
[all...]
/third_party/mesa3d/src/broadcom/compiler/
H A Dnir_to_vir.c1163 struct qreg src1; in ntq_emit_comparison() local
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/third_party/mesa3d/src/gallium/drivers/zink/
H A Dzink_compiler.c2837 nir_ssa_def *src1; in lower_sparse_instr() local
/third_party/mesa3d/src/gallium/drivers/zink/nir_to_spirv/
H A Dnir_to_spirv.c1704 emit_atomic(struct ntv_context *ctx, SpvId op, SpvId type, SpvId src0, SpvId src1, SpvId src2) in emit_atomic() argument
1721 emit_binop(struct ntv_context *ctx, SpvOp op, SpvId type, SpvId src0, SpvId src1) emit_binop() argument
1728 emit_triop(struct ntv_context *ctx, SpvOp op, SpvId type, SpvId src0, SpvId src1, SpvId src2) emit_triop() argument
1744 emit_builtin_binop(struct ntv_context *ctx, enum GLSLstd450 op, SpvId type, SpvId src0, SpvId src1) emit_builtin_binop() argument
1753 emit_builtin_triop(struct ntv_context *ctx, enum GLSLstd450 op, SpvId type, SpvId src0, SpvId src1, SpvId src2) emit_builtin_triop() argument
2623 SpvId src1 = 0; emit_interpolate() local
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/third_party/node/deps/v8/src/wasm/baseline/ppc/
H A Dliftoff-assembler-ppc.h1787 emit_f64x2_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_f64x2_replace_lane() argument
1899 emit_f32x4_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_f32x4_replace_lane() argument
1996 emit_i64x2_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i64x2_replace_lane() argument
2060 emit_i64x2_extmul_low_i32x4_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i64x2_extmul_low_i32x4_s() argument
2066 emit_i64x2_extmul_low_i32x4_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i64x2_extmul_low_i32x4_u() argument
2072 emit_i64x2_extmul_high_i32x4_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i64x2_extmul_high_i32x4_s() argument
2103 emit_i64x2_extmul_high_i32x4_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i64x2_extmul_high_i32x4_u() argument
2120 emit_i32x4_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i32x4_replace_lane() argument
2229 emit_i32x4_extmul_low_i16x8_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i32x4_extmul_low_i16x8_s() argument
2235 emit_i32x4_extmul_low_i16x8_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i32x4_extmul_low_i16x8_u() argument
2241 emit_i32x4_extmul_high_i16x8_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i32x4_extmul_high_i16x8_s() argument
2247 emit_i32x4_extmul_high_i16x8_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i32x4_extmul_high_i16x8_u() argument
2374 emit_i16x8_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i16x8_replace_lane() argument
2397 emit_i16x8_extmul_low_i8x16_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i16x8_extmul_low_i8x16_s() argument
2403 emit_i16x8_extmul_low_i8x16_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i16x8_extmul_low_i8x16_u() argument
2409 emit_i16x8_extmul_high_i8x16_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i16x8_extmul_high_i8x16_s() argument
2415 emit_i16x8_q15mulr_sat_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i16x8_q15mulr_sat_s() argument
2421 emit_i16x8_extmul_high_i8x16_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i16x8_extmul_high_i8x16_u() argument
2451 emit_i8x16_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i8x16_replace_lane() argument
2725 emit_s128_select(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, LiftoffRegister mask) emit_s128_select() argument
[all...]
/third_party/mesa3d/src/gallium/drivers/llvmpipe/
H A Dlp_state_fs.c2388 LLVMValueRef src1[4 * 4]; in generate_unswizzled_blend() local
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/third_party/node/deps/v8/src/compiler/backend/arm64/
H A Dinstruction-selector-arm64.cc4177 InstructionOperand src0, src1; in VisitI8x16Shuffle() local
4115 ArrangeShuffleTable(Arm64OperandGenerator* g, Node* input0, Node* input1, InstructionOperand* src0, InstructionOperand* src1) ArrangeShuffleTable() argument
/third_party/node/deps/v8/src/compiler/backend/riscv64/
H A Dinstruction-selector-riscv64.cc992 InstructionOperand src1 = g.TempSimd128Register(); in VisitI32x4ExtAddPairwiseI16x8S() local
1005 InstructionOperand src1 = g.TempSimd128Register(); in VisitI32x4ExtAddPairwiseI16x8U() local
1018 InstructionOperand src1 = g.TempSimd128Register(); in VisitI16x8ExtAddPairwiseI8x16S() local
1031 InstructionOperand src1 in VisitI16x8ExtAddPairwiseI8x16U() local
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/third_party/node/deps/v8/src/codegen/mips64/
H A Dmacro-assembler-mips64.cc4803 void TurboAssembler::MovToFloatParameters(DoubleRegister src1, in CallRecordWriteStub() argument
103 LoadRoot(Register destination, RootIndex index, Condition cond, Register src1, const Operand& src2) LoadRoot() argument
5694 Float32Max(FPURegister dst, FPURegister src1, FPURegister src2, Label* out_of_line) CallRecordWriteStub() argument
5740 Float32MaxOutOfLine(FPURegister dst, FPURegister src1, FPURegister src2) CallRecordWriteStub() argument
5745 Float32Min(FPURegister dst, FPURegister src1, FPURegister src2, Label* out_of_line) CallRecordWriteStub() argument
5791 Float32MinOutOfLine(FPURegister dst, FPURegister src1, FPURegister src2) CallRecordWriteStub() argument
5796 Float64Max(FPURegister dst, FPURegister src1, FPURegister src2, Label* out_of_line) CallRecordWriteStub() argument
5841 Float64MaxOutOfLine(FPURegister dst, FPURegister src1, FPURegister src2) CallRecordWriteStub() argument
5846 Float64Min(FPURegister dst, FPURegister src1, FPURegister src2, Label* out_of_line) CallRecordWriteStub() argument
5891 Float64MinOutOfLine(FPURegister dst, FPURegister src1, FPURegister src2) CallRecordWriteStub() argument
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/third_party/node/deps/v8/src/codegen/arm/
H A Dmacro-assembler-arm.cc542 void MacroAssembler::Mls(Register dst, Register src1, Register src2, in Mls() argument
556 void MacroAssembler::And(Register dst, Register src1, const Operand& src2, in And() argument
496 MovePair(Register dst0, Register src0, Register dst1, Register src1) MovePair() argument
575 Ubfx(Register dst, Register src1, int lsb, int width, Condition cond) Ubfx() argument
590 Sbfx(Register dst, Register src1, int lsb, int width, Condition cond) Sbfx() argument
869 VFPCompareAndSetFlags(const SwVfpRegister src1, const SwVfpRegister src2, const Condition cond) CallRecordWriteStub() argument
876 VFPCompareAndSetFlags(const SwVfpRegister src1, const float src2, const Condition cond) CallRecordWriteStub() argument
883 VFPCompareAndSetFlags(const DwVfpRegister src1, const DwVfpRegister src2, const Condition cond) CallRecordWriteStub() argument
890 VFPCompareAndSetFlags(const DwVfpRegister src1, const double src2, const Condition cond) CallRecordWriteStub() argument
897 VFPCompareAndLoadFlags(const SwVfpRegister src1, const SwVfpRegister src2, const Register fpscr_flags, const Condition cond) CallRecordWriteStub() argument
906 VFPCompareAndLoadFlags(const SwVfpRegister src1, const float src2, const Register fpscr_flags, const Condition cond) CallRecordWriteStub() argument
915 VFPCompareAndLoadFlags(const DwVfpRegister src1, const DwVfpRegister src2, const Register fpscr_flags, const Condition cond) CallRecordWriteStub() argument
924 VFPCompareAndLoadFlags(const DwVfpRegister src1, const double src2, const Register fpscr_flags, const Condition cond) CallRecordWriteStub() argument
2486 MovToFloatParameters(DwVfpRegister src1, DwVfpRegister src2) CallRecordWriteStub() argument
2672 I64x2Eq(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) CallRecordWriteStub() argument
2681 I64x2Ne(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) CallRecordWriteStub() argument
2691 I64x2GtS(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) CallRecordWriteStub() argument
2698 I64x2GeS(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) CallRecordWriteStub() argument
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/third_party/node/deps/v8/src/codegen/arm64/
H A Dmacro-assembler-arm64.cc71 const CPURegister& src1 = registers.PopHighestIndex(); in PushCPURegList() local
1116 void TurboAssembler::Push(const CPURegister& src0, const CPURegister& src1, in Push() argument
1176 PushHelper(int count, int size, const CPURegister& src0, const CPURegister& src1, const CPURegister& src2, const CPURegister& src3) PushHelper() argument
1252 PokePair(const CPURegister& src1, const CPURegister& src2, int offset) PokePair() argument
1494 MovePair(Register dst0, Register src0, Register dst1, Register src1) MovePair() argument
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/third_party/node/deps/v8/src/codegen/ppc/
H A Dmacro-assembler-ppc.cc2274 void TurboAssembler::MovToFloatParameters(DoubleRegister src1, in CallRecordWriteStub() argument
2997 void TurboAssembler::CmpS64(Register src1, Register src2, CRegister cr) { in CallRecordWriteStub() argument
3001 void TurboAssembler::CmpS64(Register src1, const Operand& src2, in CallRecordWriteStub() argument
3012 void TurboAssembler::CmpU64(Register src1, cons in CallRecordWriteStub() argument
3023 CmpU64(Register src1, Register src2, CRegister cr) CallRecordWriteStub() argument
3027 CmpS32(Register src1, const Operand& src2, Register scratch, CRegister cr) CallRecordWriteStub() argument
3038 CmpS32(Register src1, Register src2, CRegister cr) CallRecordWriteStub() argument
3042 CmpU32(Register src1, const Operand& src2, Register scratch, CRegister cr) CallRecordWriteStub() argument
3053 CmpU32(Register src1, Register src2, CRegister cr) CallRecordWriteStub() argument
3106 CmpSmiLiteral(Register src1, Smi smi, Register scratch, CRegister cr) CallRecordWriteStub() argument
3116 CmplSmiLiteral(Register src1, Smi smi, Register scratch, CRegister cr) CallRecordWriteStub() argument
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H A Dassembler-ppc.cc798 void Assembler::addc(Register dst, Register src1, Register src2, OEBit o, in addc() argument
803 void Assembler::adde(Register dst, Register src1, Register src2, OEBit o, in adde() argument
808 void Assembler::addze(Register dst, Register src1, OEBit o, RCBit r) { in addze() argument
813 void Assembler::sub(Register dst, Register src1, Register src2, OEBit o, in sub() argument
818 void Assembler::subc(Register dst, Register src1, Register src2, OEBit o, in subc() argument
823 sube(Register dst, Register src1, Register src2, OEBit o, RCBit r) sube() argument
832 add(Register dst, Register src1, Register src2, OEBit o, RCBit r) add() argument
838 mullw(Register dst, Register src1, Register src2, OEBit o, RCBit r) mullw() argument
848 mulhw(Register dst, Register src1, Register src2, RCBit r) mulhw() argument
853 mulhwu(Register dst, Register src1, Register src2, RCBit r) mulhwu() argument
858 divw(Register dst, Register src1, Register src2, OEBit o, RCBit r) divw() argument
864 divwu(Register dst, Register src1, Register src2, OEBit o, RCBit r) divwu() argument
899 cmpi(Register src1, const Operand& src2, CRegister cr) cmpi() argument
912 cmpli(Register src1, const Operand& src2, CRegister cr) cmpli() argument
925 cmpwi(Register src1, const Operand& src2, CRegister cr) cmpwi() argument
942 cmplwi(Register src1, const Operand& src2, CRegister cr) cmplwi() argument
1128 mulld(Register dst, Register src1, Register src2, OEBit o, RCBit r) mulld() argument
1133 divd(Register dst, Register src1, Register src2, OEBit o, RCBit r) divd() argument
1138 divdu(Register dst, Register src1, Register src2, OEBit o, RCBit r) divdu() argument
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/third_party/node/deps/v8/src/codegen/ia32/
H A Dassembler-ia32.cc2865 void Assembler::vss(byte op, XMMRegister dst, XMMRegister src1, Operand src2) { in vss() argument
2869 void Assembler::vps(byte op, XMMRegister dst, XMMRegister src1, Operand src2) { in vps() argument
2873 void Assembler::vpd(byte op, XMMRegister dst, XMMRegister src1, Operand src2) { in vpd() argument
2877 void Assembler::vshufpd(XMMRegister dst, XMMRegister src1, Operand src2, in vshufpd() argument
2884 void Assembler::vmovhlps(XMMRegister dst, XMMRegister src1, XMMRegister src2) { in vmovhlps() argument
2888 vmovlhps(XMMRegister dst, XMMRegister src1, XMMRegister src2) vmovlhps() argument
2892 vmovlps(XMMRegister dst, XMMRegister src1, Operand src2) vmovlps() argument
2900 vmovhps(XMMRegister dst, XMMRegister src1, Operand src2) vmovhps() argument
2908 vcmpps(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t cmp) vcmpps() argument
2914 vcmppd(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t cmp) vcmppd() argument
2920 vshufps(XMMRegister dst, XMMRegister src1, Operand src2, byte imm8) vshufps() argument
2990 vblendvps(XMMRegister dst, XMMRegister src1, XMMRegister src2, XMMRegister mask) vblendvps() argument
2996 vblendvpd(XMMRegister dst, XMMRegister src1, XMMRegister src2, XMMRegister mask) vblendvpd() argument
3002 vpblendvb(XMMRegister dst, XMMRegister src1, XMMRegister src2, XMMRegister mask) vpblendvb() argument
3008 vpblendw(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t mask) vpblendw() argument
3014 vpalignr(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t mask) vpalignr() argument
3035 vinsertps(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t offset) vinsertps() argument
3041 vpinsrb(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t offset) vpinsrb() argument
3047 vpinsrw(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t offset) vpinsrw() argument
3053 vpinsrd(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t offset) vpinsrd() argument
3059 vroundsd(XMMRegister dst, XMMRegister src1, XMMRegister src2, RoundingMode mode) vroundsd() argument
3064 vroundss(XMMRegister dst, XMMRegister src1, XMMRegister src2, RoundingMode mode) vroundss() argument
3107 vpcmpgtq(XMMRegister dst, XMMRegister src1, XMMRegister src2) vpcmpgtq() argument
3205 vinstr(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2, SIMDPrefix pp, LeadingOpcode m, VexW w, CpuFeature feature) vinstr() argument
3211 vinstr(byte op, XMMRegister dst, XMMRegister src1, Operand src2, SIMDPrefix pp, LeadingOpcode m, VexW w, CpuFeature feature) vinstr() argument
3217 vinstr(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2, VectorLength l, SIMDPrefix pp, LeadingOpcode m, VexW w, CpuFeature feature) vinstr() argument
3227 vinstr(byte op, XMMRegister dst, XMMRegister src1, Operand src2, VectorLength l, SIMDPrefix pp, LeadingOpcode m, VexW w, CpuFeature feature) vinstr() argument
[all...]
/third_party/node/deps/v8/src/codegen/loong64/
H A Dmacro-assembler-loong64.cc3814 void TurboAssembler::Float32Max(FPURegister dst, FPURegister src1, in CallRecordWriteStub() argument
3829 void TurboAssembler::Float32MaxOutOfLine(FPURegister dst, FPURegister src1, in CallRecordWriteStub() argument
3834 void TurboAssembler::Float32Min(FPURegister dst, FPURegister src1, in CallRecordWriteStub() argument
3849 Float32MinOutOfLine(FPURegister dst, FPURegister src1, FPURegister src2) CallRecordWriteStub() argument
3854 Float64Max(FPURegister dst, FPURegister src1, FPURegister src2, Label* out_of_line) CallRecordWriteStub() argument
3869 Float64MaxOutOfLine(FPURegister dst, FPURegister src1, FPURegister src2) CallRecordWriteStub() argument
3874 Float64Min(FPURegister dst, FPURegister src1, FPURegister src2, Label* out_of_line) CallRecordWriteStub() argument
3889 Float64MinOutOfLine(FPURegister dst, FPURegister src1, FPURegister src2) CallRecordWriteStub() argument
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