| /third_party/ltp/tools/sparse/sparse-src/validation/optim/ |
| H A D | binops-same-args.c | 6 int sdiv(int a) { return a / a; } in sdiv() function
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| /third_party/mesa3d/src/util/tests/ |
| H A D | fast_idiv_by_const_test.cpp | 251 sdiv(int64_t a, int64_t b, unsigned bit_size) in sdiv() function
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| /third_party/node/deps/openssl/openssl/crypto/bn/ |
| H A D | bn_div.c | 268 BIGNUM *tmp, *snum, *sdiv, *res; in bn_div_fixed_top() local
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| /third_party/openssl/crypto/bn/ |
| H A D | bn_div.c | 268 BIGNUM *tmp, *snum, *sdiv, *res; in bn_div_fixed_top() local
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| /third_party/ffmpeg/libavfilter/ |
| H A D | af_afftdn.c | 606 double wscale, sar, sum, sdiv; in config_input() local
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| /third_party/vixl/src/aarch64/ |
| H A D | logic-aarch64.cc | 649 LogicVRegister Simulator::sdiv(VectorFormat vform, in sdiv() function in vixl::aarch64::Simulator
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| H A D | assembler-aarch64.cc | 978 void Assembler::sdiv(const Register& rd, in sdiv() function in vixl::aarch64::Assembler
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| H A D | assembler-sve-aarch64.cc | 2446 void Assembler::sdiv(const ZRegister& zd, in sdiv() function in vixl::aarch64::Assembler
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.cc | 1153 void Assembler::sdiv(const Register& rd, const Register& rn, in sdiv() function in v8::internal::Assembler
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| /third_party/node/deps/v8/src/codegen/arm/ |
| H A D | assembler-arm.cc | 1747 void Assembler::sdiv(Register dst, Register src1, Register src2, in sdiv() function in v8::internal::Assembler
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| /third_party/vixl/src/aarch32/ |
| H A D | assembler-aarch32.cc | 9669 void Assembler::sdiv(Condition cond, Register rd, Register rn, Register rm) { in sdiv() function in vixl::aarch32::Assembler
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| H A D | assembler-aarch32.h | 3032 void sdiv(Register rd, Register rn, Register rm) { sdiv(al, rd, rn, rm); } in sdiv() function in vixl::aarch32::Assembler
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| H A D | disasm-aarch32.cc | 2462 void Disassembler::sdiv(Condition cond, Register rd, Register rn, Register rm) { in sdiv() function in vixl::aarch32::Disassembler
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