reg_addr (definition) in projects: device

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Searched defs:reg_addr (Results 1 - 25 of 31) sorted by relevance

/device/soc/hisilicon/hi3861v100/sdk_liteos/app/demo/src/
H A D	app_demo_i2c.c	`36 hi_u8 reg_addr = ES8311_REG_ADDR; in i2c_demo_send_data_init() local`
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/cbb/include/
H A D	hi_i2c.h	`48 unsigned int reg_addr; member`
/device/soc/hisilicon/hi3516dv300/sdk_linux/include/
H A D	hi_i2c.h	`48 unsigned int reg_addr; member`
/device/soc/hisilicon/hi3516dv300/sdk_liteos/include/
H A D	hi_i2c.h	`48 unsigned int reg_addr; member`
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/component/hdmi/src/mkp/
H A D	drv_hdmi_common.c	`315 hi_void hdmi_reg_write(volatile hi_void reg_addr, hi_u32 value) in hdmi_reg_write() argument 322 hi_u32 hdmi_reg_read(volatile hi_void reg_addr) in hdmi_reg_read() argument`
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/component/hdmi/src/mkp/product/hi3516cv500/
H A D	hdmi_product_define.c	`24 hi_void hdmi_tx_reg_write(hi_u32 reg_addr, hi_u32 value) in hdmi_tx_reg_write() argument 30 hi_u32 hdmi_tx_reg_read(const hi_u32 reg_addr) in hdmi_tx_reg_read() argument 35 hi_void hdmi_reg_write_u32(hi_u32 reg_addr, hi_u32 value) in hdmi_reg_write_u32() argument 50 hi_u32 hdmi_reg_read_u32(hi_u32 reg_addr) in hdmi_reg_read_u32() argument [all...]`
/device/soc/hisilicon/hi3861v100/sdk_liteos/boot/flashboot/drivers/io/
H A D	hi_flashboot_io.c	`39 hi_u32 reg_addr; in hi_io_get_func() local`
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/component/hdmi/src/mkp/hal/ctrl/hisiv100/regs/
H A D	hdmi_reg_aon.c	39 hi_u32 reg_addr = NULL; in hdmi_reg_aon_intr_mask0_set() local 52 hi_u32 reg_addr = NULL; in hdmi_reg_aon_intr_stat1_set() local 65 hi_u32 reg_addr = NULL; in hdmi_reg_aon_intr_stat0_set() local 78 hi_u32 reg_addr = NULL; hdmi_reg_dcc_man_en_set() local 91 hi_u32 reg_addr = NULL; hdmi_reg_ddc_sda_oen_set() local 104 hi_u32 reg_addr = NULL; hdmi_reg_ddc_scl_oen_set() local 117 hi_u32 reg_addr = NULL; hdmi_reg_ddc_i2c_no_ack_get() local 127 hi_u32 reg_addr = NULL; hdmi_reg_ddc_i2c_bus_low_get() local 137 hi_u32 reg_addr = NULL; hdmi_reg_hpd_polarity_ctl_get() local 147 hi_u32 reg_addr = NULL; hdmi_reg_phy_rx_sense_get() local 157 hi_u32 reg_addr = NULL; hdmi_reg_hotplug_state_get() local 167 hi_u32 reg_addr = NULL; hdmi_reg_aon_intr_stat1_get() local 177 hi_u32 reg_addr = NULL; hdmi_reg_aon_intr_stat0_get() local 187 hi_u32 reg_addr = NULL; hdmi_reg_ddc_sda_st_get() local 197 hi_u32 *reg_addr = NULL; hdmi_reg_ddc_scl_st_get() local [all...]
H A D	hdmi_reg_ctrl.c	39 hi_u32 reg_addr = NULL; in hdmi_reg_tx_mcu_srst_req_set() local 52 hi_u32 reg_addr = NULL; in hdmi_reg_tx_afifo_srst_req_set() local 65 hi_u32 reg_addr = NULL; in hdmi_reg_tx_acr_srst_req_set() local 78 hi_u32 reg_addr = NULL; hdmi_reg_tx_aud_srst_req_set() local 91 hi_u32 reg_addr = NULL; hdmi_reg_tx_hdmi_srst_req_set() local 104 hi_u32 reg_addr = NULL; hdmi_reg_tx_pwd_srst_req_set() local 117 hi_u32 reg_addr = NULL; hdmi_reg_pwd_fifo_data_in_set() local 130 hi_u32 reg_addr = NULL; hdmi_reg_pwd_data_out_cnt_set() local 143 hi_u32 reg_addr = NULL; hdmi_reg_pwd_slave_seg_set() local 156 hi_u32 reg_addr = NULL; hdmi_reg_pwd_slave_offset_set() local 169 hi_u32 reg_addr = NULL; hdmi_reg_pwd_slave_addr_set() local 182 hi_u32 reg_addr = NULL; hdmi_reg_pwd_mst_cmd_set() local 195 hi_u32 reg_addr = NULL; hdmi_reg_cpu_ddc_req_set() local 208 hi_u32 reg_addr = NULL; hdmi_reg_rdata_pwd_fifo_data_out_get() local 218 hi_u32 reg_addr = NULL; hdmi_reg_pwd_fifo_data_out_get() local 228 hi_u32 reg_addr = NULL; hdmi_reg_pwd_fifo_empty_get() local 238 hi_u32 reg_addr = NULL; hdmi_reg_pwd_i2c_in_prog_get() local 248 hi_u32 reg_addr = NULL; hdmi_reg_cpu_ddc_req_ack_get() local [all...]
H A D	hdmi_reg_audio_path.c	39 hi_u32 reg_addr = NULL; in hdmi_reg_aud_spdif_en_set() local 52 hi_u32 reg_addr = NULL; in hdmi_reg_aud_i2s_en_set() local 65 hi_u32 reg_addr = NULL; in hdmi_reg_aud_layout_set() local 78 hi_u32 reg_addr = NULL; hdmi_reg_aud_mute_en_set() local 91 hi_u32 reg_addr = NULL; hdmi_reg_aud_in_en_set() local 104 hi_u32 reg_addr = NULL; hdmi_reg_i2s_ch_swap_set() local 117 hi_u32 reg_addr = NULL; hdmi_reg_i2s_length_set() local 130 hi_u32 reg_addr = NULL; hdmi_reg_i2s_vbit_set() local 143 hi_u32 reg_addr = NULL; hdmi_reg_i2s_data_dir_set() local 156 hi_u32 reg_addr = NULL; hdmi_reg_i2s_justify_set() local 169 hi_u32 reg_addr = NULL; hdmi_reg_i2s_ws_polarity_set() local 182 hi_u32 reg_addr = NULL; hdmi_reg_i2s_1st_shift_set() local 195 hi_u32 reg_addr = NULL; hdmi_reg_i2s_hbra_on_set() local 208 hi_u32 reg_addr = NULL; hdmi_reg_chst_byte3_clock_accuracy_set() local 221 hi_u32 reg_addr = NULL; hdmi_reg_chst_byte3_fs_set() local 234 hi_u32 reg_addr = NULL; hdmi_reg_chst_byte0_bset() local 247 hi_u32 reg_addr = NULL; hdmi_reg_chst_byte0_aset() local 260 hi_u32 reg_addr = NULL; hdmi_reg_chst_byte4_org_fs_set() local 273 hi_u32 reg_addr = NULL; hdmi_reg_chst_byte4_length_set() local 286 hi_u32 reg_addr = NULL; hdmi_reg_aud_fifo_hbr_mask_set() local 299 hi_u32 reg_addr = NULL; hdmi_reg_aud_fifo_test_set() local 312 hi_u32 reg_addr = NULL; hdmi_reg_acr_cts_hw_sw_sel_set() local 325 hi_u32 reg_addr = NULL; hdmi_reg_acr_n_val_sw_set() local 338 hi_u32 reg_addr = NULL; hdmi_reg_aud_spdif_en_get() local 348 hi_u32 reg_addr = NULL; hdmi_reg_aud_i2s_en_get() local 358 hi_u32 reg_addr = NULL; hdmi_reg_aud_layout_get() local 368 hi_u32 reg_addr = NULL; hdmi_reg_aud_mute_en_get() local 378 hi_u32 reg_addr = NULL; hdmi_reg_aud_in_en_get() local 388 hi_u32 reg_addr = NULL; hdmi_reg_i2s_hbra_on_get() local 398 hi_u32 reg_addr = NULL; hdmi_reg_chst_byte3_fs_get() local 408 hi_u32 reg_addr = NULL; hdmi_reg_chst_byte4_org_fs_get() local 418 hi_u32 reg_addr = NULL; hdmi_reg_chst_byte4_length_get() local 428 hi_u32 reg_addr = NULL; hdmi_reg_aud_spdif_fs_get() local 438 hi_u32 reg_addr = NULL; hdmi_reg_aud_length_get() local 448 hi_u32 reg_addr = NULL; hdmi_reg_acr_cts_hw_sw_sel_get() local 458 hi_u32 reg_addr = NULL; hdmi_reg_acr_n_val_sw_get() local 468 hi_u32 reg_addr = NULL; hdmi_reg_acr_cts_val_sw_get() local 478 hi_u32 reg_addr = NULL; hdmi_reg_acr_cts_val_hw_get() local [all...]
H A D	hdmi_reg_video_path.c	39 hi_u32 reg_addr = NULL; in hdmi_reg_sync_polarity_set() local 52 hi_u32 reg_addr = NULL; in hdmi_reg_sync_polarity_get() local 62 hi_u32 reg_addr = NULL; in hdmi_reg_timing_sel_set() local 75 hi_u32 reg_addr = NULL; hdmi_reg_timing_sel_get() local 85 hi_u32 reg_addr = NULL; hdmi_reg_extmode_set() local 99 hi_u32 reg_addr = NULL; hdmi_reg_extmode_get() local 109 hi_u32 reg_addr = NULL; hdmi_reg_timing_gen_en_set() local 122 hi_u32 reg_addr = NULL; hdmi_reg_timing_gen_en_get() local 132 hi_u32 reg_addr = NULL; hdmi_reg_video_blank_en_set() local 145 hi_u32 reg_addr = NULL; hdmi_reg_video_blank_en_get() local 155 hi_u32 reg_addr = NULL; hdmi_reg_video_lp_disable_set() local 168 hi_u32 reg_addr = NULL; hdmi_reg_video_lp_disable_get() local 178 hi_u32 reg_addr = NULL; hdmi_reg_cbar_pattern_sel_set() local 191 hi_u32 reg_addr = NULL; hdmi_reg_mask_pattern_en_set() local 204 hi_u32 reg_addr = NULL; hdmi_reg_mask_pattern_en_get() local 214 hi_u32 reg_addr = NULL; hdmi_reg_square_pattern_en_set() local 227 hi_u32 reg_addr = NULL; hdmi_reg_square_pattern_en_get() local 237 hi_u32 reg_addr = NULL; hdmi_reg_colorbar_en_set() local 250 hi_u32 reg_addr = NULL; hdmi_reg_colorbar_en_get() local 261 hi_u32 reg_addr = NULL; hdmi_reg_solid_pattern_en_set() local 274 hi_u32 reg_addr = NULL; hdmi_reg_solid_pattern_en_get() local 284 hi_u32 reg_addr = NULL; hdmi_reg_video_format_set() local 297 hi_u32 reg_addr = NULL; hdmi_reg_video_format_get() local 308 hi_u32 reg_addr = NULL; hdmi_reg_solid_pattern_cr_set() local 321 hi_u32 reg_addr = NULL; hdmi_reg_solid_pattern_y_set() local 334 hi_u32 reg_addr = NULL; hdmi_reg_solid_pattern_cb_set() local 347 hi_u32 reg_addr = NULL; hdmi_reg_fdt_status_clear_set() local 360 hi_u32 reg_addr = NULL; hdmi_reg_sync_polarity_force_set() local 373 hi_u32 reg_addr = NULL; hdmi_reg_vsync_polarity_get() local 384 hi_u32 reg_addr = NULL; hdmi_reg_hsync_polarity_get() local 395 hi_u32 reg_addr = NULL; hdmi_reg_interlaced_get() local 406 hi_u32 reg_addr = NULL; hdmi_reg_hsync_total_cnt_get() local 417 hi_u32 reg_addr = NULL; hdmi_reg_hsync_active_cnt_get() local 427 hi_u32 reg_addr = NULL; hdmi_reg_vsync_total_cnt_get() local 437 hi_u32 reg_addr = NULL; hdmi_reg_vsync_active_cnt_get() local 448 hi_u32 reg_addr = NULL; hdmi_reg_dwsm_vert_bypass_get() local 459 hi_u32 reg_addr = NULL; hdmi_reg_dwsm_vert_en_get() local 470 hi_u32 reg_addr = NULL; hdmi_reg_hori_filter_en_get() local 480 hi_u32 reg_addr = NULL; hdmi_reg_dwsm_hori_en_get() local 491 hi_u32 reg_addr = NULL; hdmi_reg_pxl_div_en_get() local 502 hi_u32 reg_addr = NULL; hdmi_reg_demux_420_en_get() local 513 hi_u32 reg_addr = NULL; hdmi_reg_inver_sync_get() local 524 hi_u32 reg_addr = NULL; hdmi_reg_vmux_cr_sel_get() local 535 hi_u32 reg_addr = NULL; hdmi_reg_vmux_cb_sel_get() local 546 hi_u32 reg_addr = NULL; hdmi_reg_vmux_y_sel_get() local 557 hi_u32 reg_addr = NULL; hdmi_reg_dither_mode_get() local 568 hi_u32 reg_addr = NULL; hdmi_reg_dither_rnd_bypass_get() local 579 hi_u32 reg_addr = NULL; hdmi_reg_csc_en_get() local 590 hi_u32 reg_addr = NULL; hdmi_reg_csc_mode_get() local 600 hi_u32 reg_addr = NULL; hdmi_reg_dither_mode_set() local 613 hi_u32 reg_addr = NULL; hdmi_reg_dither_rnd_bypass_set() local 626 hi_u32 reg_addr = NULL; hdmi_reg_csc_mode_set() local 639 hi_u32 reg_addr = NULL; hdmi_reg_csc_saturate_en_set() local 652 hi_u32 reg_addr = NULL; hdmi_reg_csc_en_set() local 665 hi_u32 reg_addr = NULL; hdmi_reg_dwsm_vert_bypass_set() local 678 hi_u32 reg_addr = NULL; hdmi_reg_dwsm_vert_en_set() local 691 hi_u32 reg_addr = NULL; hdmi_reg_hori_filter_en_set() local 704 hi_u32 reg_addr = NULL; hdmi_reg_dwsm_hori_en_set() local 717 hi_u32 reg_addr = NULL; hdmi_reg_pxl_div_en_set() local 730 hi_u32 reg_addr = NULL; hdmi_reg_demux_420_en_set() local 743 hi_u32 reg_addr = NULL; hdmi_reg_inver_sync_set() local 756 hi_u32 reg_addr = NULL; hdmi_reg_syncmask_en_set() local 769 hi_u32 reg_addr = NULL; hdmi_reg_vmux_cr_sel_set() local 782 hi_u32 reg_addr = NULL; hdmi_reg_vmux_cb_sel_set() local 795 hi_u32 *reg_addr = NULL; hdmi_reg_vmux_y_sel_set() local [all...]
/device/board/hisilicon/hispark_aries/uboot/secureboot_release/ddr_init/boot/
H A D	init_regs.c	`38 unsigned int reg_addr; member`
/device/board/hisilicon/hispark_taurus/uboot/secureboot_release/ddr_init/boot/
H A D	init_regs.c	`39 unsigned int reg_addr; member`
/device/soc/hisilicon/hi3516dv300/sdk_linux/usr/sensor/omnivision_ov2775/
H A D	ov2775_sensor_ctl.c	`2079 HI_U16 reg_addr; in ov2775_cfg_seq() local`
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/component/hdmi/src/mkp/product/hi3516cv500/regs/
H A D	hdmi_reg_crg.c	48 hi_u32 reg_addr = NULL; in hdmi_reg_ssc_in_cken_set() local 61 hi_u32 reg_addr = NULL; in hdmi_reg_ssc_bypass_cken_set() local 74 hi_u32 reg_addr = NULL; in hdmi_reg_ctrl_osc_24m_cken_set() local 87 hi_u32 reg_addr = NULL; hdmi_reg_ctrl_cec_cken_set() local 100 hi_u32 reg_addr = NULL; hdmi_reg_ctrl_os_cken_set() local 113 hi_u32 reg_addr = NULL; hdmi_reg_ctrl_as_cken_set() local 126 hi_u32 reg_addr = NULL; hdmi_reg_ctrl_bus_srst_req_set() local 139 hi_u32 reg_addr = NULL; hdmi_reg_ctrl_srst_req_set() local 152 hi_u32 reg_addr = NULL; hdmi_reg_ctrl_cec_srst_req_set() local 165 hi_u32 reg_addr = NULL; hdmi_reg_ssc_srst_req_set() local 178 hi_u32 reg_addr = NULL; hdmi_reg_ssc_clk_div_set() local 191 hi_u32 reg_addr = NULL; hdmi_reg_pxl_cken_set() local 204 hi_u32 reg_addr = NULL; reg_hdmi_crg_ssc_bypass_clk_sel_set() local 217 hi_u32 reg_addr = NULL; hdmi_reg_hdmirx_phy_tmds_cken_set() local 230 hi_u32 reg_addr = NULL; hdmi_reg_phy_srst_req_set() local 243 hi_u32 reg_addr = NULL; hdmi_reg_phy_srst_req_get() local 253 hi_u32 reg_addr = NULL; hdmi_reg_phy_tmds_srst_req_set() local 266 hi_u32 reg_addr = NULL; hdmi_reg_phy_tmds_srst_req_get() local 276 hi_u32 reg_addr = NULL; hdmi_reg_tmds_clk_div_set() local 289 hi_u32 reg_addr = NULL; reg_hdmi_crg_tmds_clk_div_get() local [all...]
/device/soc/hisilicon/hi3751v350/sdk_linux/source/msp/drv/i2c/std_i2c/
H A D	drv_i2c_intf.c	`44 hi_u32 reg_addr; member`
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/component/hdmi/src/mkp/hal/
H A D	hdmi_hal.h	`52 hi_u32 reg_addr; member`
/device/soc/rockchip/common/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd_wifi6/
H A D	wl_cfg_btcoex.c	`129 char reg_addr[8]; in dev_wlc_intvar_set_reg() local`
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/component/hdmi/src/mkp/hal/ctrl/hisiv100/
H A D	hdmi_hal_intf.c	`70 hi_u32 *reg_addr = HI_NULL; in hal_hdmi_cbar_enable() local`
/device/soc/hisilicon/hi3751v350/sdk_linux/source/msp/drv/i2c/gpio_i2c/
H A D	drv_gpio_i2c.c	`447 hi_u8 reg_addr = 0; in drv_gpioi2c_read_data() local 616 hi_u8 reg_addr = 0; drv_gpioi2c_write_data() local [all...]`
/device/soc/rockchip/common/vendor/drivers/media/platform/rockchip/isp/
H A D	isp_stats_v3x.c	`522 u32 reg_addr, raw_addr; in rkisp_stats_get_rawawb_meas_ddr() local [all...]`
H A D	isp_stats_v21.c	`485 u32 reg_addr, raw_addr; in rkisp_stats_get_rawawb_meas_ddr() local`
/device/soc/rockchip/rk3588/kernel/drivers/media/platform/rockchip/isp/
H A D	isp_stats_v21.c	`473 u32 reg_addr, raw_addr; in rkisp_stats_get_rawawb_meas_ddr() local`
H A D	isp_stats_v3x.c	`548 u32 reg_addr, raw_addr; in rkisp_stats_get_rawawb_meas_ddr() local [all...]`
/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/mpp/component/hdmi/src/mkp/hal/phy/hisiv100/regs/
H A D	hdmi_reg_dphy.c	39 hi_u32 reg_addr = NULL; in hdmi_reg_sscin_bypass_en_set() local 52 hi_u32 reg_addr = NULL; in hdmi_reg_pllfbmash111_en_set() local 65 hi_u32 reg_addr = NULL; in hdmi_reg_dphy_rst_set() local 78 hi_u32 reg_addr = NULL; hdmi_reg_aphy_data_clk_height_set() local 91 hi_u32 reg_addr = NULL; hdmi_reg_aphy_data_clk_low_set() local 104 hi_u32 reg_addr = NULL; hdmi_reg_divsel_set() local 117 hi_u32 reg_addr = NULL; hdmi_reg_gc_txpll_pd_set() local 130 hi_u32 reg_addr = NULL; hdmi_reg_gc_txpll_pd_get() local 140 hi_u32 reg_addr = NULL; hdmi_reg_gc_pd_rxsense_set() local 153 hi_u32 reg_addr = NULL; hdmi_reg_gc_pd_rxsense_get() local 163 hi_u32 reg_addr = NULL; hdmi_reg_gc_pd_rterm_get() local 173 hi_u32 reg_addr = NULL; hdmi_reg_gc_pd_rterm_set() local 186 hi_u32 reg_addr = NULL; hdmi_reg_gc_pd_ldo_set() local 199 hi_u32 reg_addr = NULL; hdmi_reg_gc_pd_ldo_get() local 209 hi_u32 reg_addr = NULL; hdmi_reg_gc_pd_de_set() local 222 hi_u32 reg_addr = NULL; hdmi_reg_gc_pd_de_get() local 232 hi_u32 reg_addr = NULL; hdmi_reg_gc_pd_bist_set() local 245 hi_u32 reg_addr = NULL; hdmi_reg_gc_pd_bist_get() local 256 hi_u32 reg_addr = NULL; hdmi_reg_gc_pd_set() local 269 hi_u32 reg_addr = NULL; hdmi_reg_gc_pd_get() local 279 hi_u32 reg_addr = NULL; hdmi_reg_isel_main_de_clk_set() local 292 hi_u32 reg_addr = NULL; hdmi_reg_isel_main_de_clk_get() local 302 hi_u32 reg_addr = NULL; hdmi_reg_isel_main_d2_set() local 315 hi_u32 reg_addr = NULL; hdmi_reg_isel_main_d1_set() local 328 hi_u32 reg_addr = NULL; hdmi_reg_isel_main_d0_set() local 341 hi_u32 reg_addr = NULL; hdmi_reg_isel_main_clk_set() local 354 hi_u32 reg_addr = NULL; hdmi_reg_isel_pre_d0_set() local 367 hi_u32 reg_addr = NULL; hdmi_reg_isel_pre_clk_set() local 380 hi_u32 reg_addr = NULL; hdmi_reg_isel_main_de_d2_set() local 393 hi_u32 reg_addr = NULL; hdmi_reg_isel_main_de_d2_get() local 404 hi_u32 reg_addr = NULL; hdmi_reg_isel_main_de_d1_set() local 417 hi_u32 reg_addr = NULL; hdmi_reg_isel_main_de_d1_get() local 428 hi_u32 reg_addr = NULL; hdmi_reg_isel_main_de_d0_set() local 441 hi_u32 reg_addr = NULL; hdmi_reg_isel_main_de_d0_get() local 452 hi_u32 reg_addr = NULL; hdmi_reg_isel_main_clk_get() local 463 hi_u32 reg_addr = NULL; hdmi_reg_isel_main_d0_get() local 474 hi_u32 reg_addr = NULL; hdmi_reg_isel_pre_de_d1_set() local 487 hi_u32 reg_addr = NULL; hdmi_reg_isel_pre_de_d0_set() local 500 hi_u32 reg_addr = NULL; hdmi_reg_isel_pre_de_clk_set() local 513 hi_u32 reg_addr = NULL; hdmi_reg_isel_pre_d2_set() local 526 hi_u32 reg_addr = NULL; hdmi_reg_isel_pre_d1_set() local 539 hi_u32 reg_addr = NULL; hdmi_reg_rsel_pre_de_d2_set() local 552 hi_u32 reg_addr = NULL; hdmi_reg_rsel_pre_de_d1_set() local 565 hi_u32 reg_addr = NULL; hdmi_reg_rsel_pre_de_d0_set() local 578 hi_u32 reg_addr = NULL; hdmi_reg_rsel_pre_de_clk_set() local 591 hi_u32 reg_addr = NULL; hdmi_reg_rsel_pre_d2_set() local 604 hi_u32 reg_addr = NULL; hdmi_reg_rsel_pre_d1_set() local 617 hi_u32 reg_addr = NULL; hdmi_reg_rsel_pre_d0_set() local 630 hi_u32 reg_addr = NULL; hdmi_reg_rsel_pre_clk_set() local 643 hi_u32 reg_addr = NULL; hdmi_reg_rsel_pre_clk_get() local 654 hi_u32 reg_addr = NULL; hdmi_reg_rsel_pre_d0_get() local 665 hi_u32 reg_addr = NULL; hdmi_reg_isel_pre_de_d2_set() local 678 hi_u32 reg_addr = NULL; hdmi_reg_rt_d2_set() local 691 hi_u32 reg_addr = NULL; hdmi_reg_test_set() local 704 hi_u32 reg_addr = NULL; hdmi_reg_rt_d1_set() local 717 hi_u32 reg_addr = NULL; hdmi_reg_rt_d0_set() local 730 hi_u32 reg_addr = NULL; hdmi_reg_rt_clk_set() local 743 hi_u32 reg_addr = NULL; hdmi_reg_gc_txpll_en_sscdiv_set() local 756 hi_u32 reg_addr = NULL; hdmi_reg_txpll_icp_ictrl_set() local 769 hi_u32 reg_addr = NULL; hdmi_reg_txpll_divsel_loop_set() local 782 hi_u32 reg_addr = NULL; hdmi_reg_gc_txpll_test_set() local 795 hi_u32 reg_addr = NULL; hdmi_reg_ssc_mode_fb_set() local 808 hi_u32 reg_addr = NULL; hdmi_reg_load_fb_set() local 821 hi_u32 reg_addr = NULL; hdmi_reg_fb_set() local 834 hi_u32 reg_addr = NULL; hdmi_reg_span_fb_set() local 847 hi_u32 reg_addr = NULL; hdmi_reg_span_fb_get() local 857 hi_u32 reg_addr = NULL; hdmi_reg_step_fb_set() local 870 hi_u32 reg_addr = NULL; hdmi_reg_step_fb_get() local [all...]

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