| /third_party/mesa3d/src/intel/compiler/ |
| H A D | brw_fs_nir.cpp | 92 fs_reg reg = bld.vgrf(BRW_REGISTER_TYPE_F, 4 * reg_size); in nir_setup_outputs() local
138 fs_reg *reg; in emit_system_values_block() local
292 fs_reg ® = nir_system_values[SYSTEM_VALUE_SUBGROUP_INVOCATION]; nir_emit_system_values() local
298 allbld8.ADD(byte_offset(reg, 16), reg, brw_imm_uw(8u)); nir_emit_system_values() local
301 allbld16.ADD(byte_offset(reg, 32), reg, brw_imm_uw(16u)); nir_emit_system_values() local
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| H A D | brw_fs_reg_allocate.cpp | 37 assign_reg(unsigned *reg_hw_locations, fs_reg *reg) in assign_reg() argument
413 int reg = inst->dst.nr & ~BRW_MRF_COMPR4; get_used_mrfs() local
617 int reg = BRW_MAX_GRF - fs->alloc.sizes[vgrf]; setup_inst_interference() local
1202 int reg = choose_spill_reg(); assign_regs() local
1218 int reg = choose_spill_reg(); assign_regs() local
1245 int reg = ra_get_node_reg(g, first_vgrf_node + i); assign_regs() local
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| H A D | brw_fs.h | 76 offset(const fs_reg ®, const brw::fs_builder &bld, unsigned delta) in offset() argument
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| H A D | brw_compile_sf.c | 76 static inline int vert_reg_to_vue_slot(struct brw_sf_compile *c, GLuint reg, in vert_reg_to_vue_slot() argument
87 static inline int vert_reg_to_varying(struct brw_sf_compile *c, GLuint reg, in vert_reg_to_varying() argument
283 GLuint reg, i; in alloc_regs() local
360 calculate_masks(struct brw_sf_compile *c, GLuint reg, GLushort *pc, GLushort *pc_persp, GLushort *pc_linear) calculate_masks() argument
400 calculate_point_sprite_mask(struct brw_sf_compile *c, GLuint reg) calculate_point_sprite_mask() argument
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| H A D | brw_shader.cpp | 569 brw_saturate_immediate(enum brw_reg_type type, struct brw_reg *reg) in brw_saturate_immediate() argument
632 brw_negate_immediate(enum brw_reg_type type, struct brw_reg *reg) in brw_negate_immediate() argument
675 brw_abs_immediate(enum brw_reg_type type, struct brw_reg *reg) brw_abs_immediate() argument
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| /third_party/mesa3d/src/mesa/program/ |
| H A D | prog_to_nir.c | 942 nir_register *reg = nir_local_reg_create(b->impl); setup_registers_and_variables() local
967 nir_register *reg; setup_registers_and_variables() local
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| /third_party/mesa3d/src/util/ |
| H A D | register_allocate.c | 205 struct ra_reg *reg = ®s->regs[r]; in ra_make_reg_conflicts_transitive() local
159 ra_add_transitive_reg_conflict(struct ra_regs *regs, unsigned int base_reg, unsigned int reg) ra_add_transitive_reg_conflict() argument
407 struct ra_reg *reg = ®s->regs[r]; ra_set_serialize() local
443 struct ra_reg *reg = ®s->regs[r]; ra_set_deserialize() local
1008 ra_set_node_reg(struct ra_graph *g, unsigned int n, unsigned int reg) ra_set_node_reg() argument
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| /third_party/mesa3d/src/panfrost/bifrost/ |
| H A D | bi_pack.c | 290 bi_get_src_slot(bi_registers *regs, unsigned reg) in bi_get_src_slot() argument
332 uint64_t reg = bi_pack_registers(tuple->regs); in bi_pack_tuple() local
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| /third_party/node/deps/v8/src/compiler/ |
| H A D | linkage.cc | 24 inline LinkageLocation regloc(Register reg, MachineType type) { in regloc() argument
28 inline LinkageLocation regloc(DoubleRegister reg, MachineType type) { in regloc() argument
485 Register reg = descriptor.GetRegisterParameter(i); in GetStubCallDescriptor() local
563 Register reg = descriptor.GetRegisterParameter(i); in GetBytecodeDispatchCallDescriptor() local
617 inline bool IsTaggedReg(const LinkageLocation& loc, Register reg) { in IsTaggedReg() argument
[all...] |
| /third_party/node/deps/v8/src/compiler/backend/ |
| H A D | instruction-selector-impl.h | 96 InstructionOperand DefineAsFixed(Node* node, Register reg) { in DefineAsFixed() argument
102 InstructionOperand DefineAsFixed(Node* node, FPRegType reg) { in DefineAsFixed() argument
192 InstructionOperand UseFixed(Node* node, Register reg) { in UseFixed() argument
198 InstructionOperand UseFixed(Node* node, FPRegType reg) { in UseFixed() argument
286 InstructionOperand TempRegister(Register reg) { in TempRegister() argument
292 TempFpRegister(FPRegType reg) TempFpRegister() argument
[all...] |
| /third_party/node/deps/v8/src/codegen/ia32/ |
| H A D | macro-assembler-ia32.h | 145 void Call(Register reg) { call(reg); } in Call() argument
196 void SmiUntag(Register reg) { sar(reg, kSmiTagSize); } in SmiUntag() argument
202 void SmiToInt32(Register reg) { SmiUntag(reg); } in SmiToInt32() argument
531 void SmiTag(Register reg) { in SmiTag() argument
551 DecodeField(Register reg) DecodeField() argument
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| /third_party/node/deps/v8/src/codegen/mips/ |
| H A D | constants-mips.h | 251 int reg; member
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| /third_party/node/deps/v8/src/codegen/x64/ |
| H A D | macro-assembler-x64.h | 32 Register reg; member
374 void Call(Register reg) { call(reg); } in Call() argument
806 void DecodeField(Register reg) { in DecodeField() argument
[all...] |
| /third_party/node/deps/v8/src/diagnostics/loong64/ |
| H A D | disasm-loong64.cc | 131 void Decoder::PrintRegister(int reg) { in PrintRegister() argument
136 int reg = instr->RjValue(); in PrintRj() local
141 int reg = instr->RkValue(); in PrintRk() local
146 int reg = instr->RdValue(); in PrintRd() local
348 int reg in FormatRegister() local
352 int reg = instr->RkValue(); FormatRegister() local
356 int reg = instr->RdValue(); FormatRegister() local
368 int reg = instr->FjValue(); FormatFPURegister() local
372 int reg = instr->FkValue(); FormatFPURegister() local
376 int reg = instr->FdValue(); FormatFPURegister() local
380 int reg = instr->FaValue(); FormatFPURegister() local
[all...] |
| /third_party/node/deps/v8/src/diagnostics/ppc/ |
| H A D | disasm-ppc.cc | 146 void Decoder::PrintRegister(int reg) { in PrintRegister() argument
151 void Decoder::PrintDRegister(int reg) { in PrintDRegister() argument
156 void Decoder::PrintVectorRegister(int reg) { in PrintVectorRegister() argument
189 int reg = instr->RTValue(); FormatRegister() local
193 int reg = instr->RAValue(); FormatRegister() local
197 int reg = instr->RBValue(); FormatRegister() local
211 int reg = -1; FormatFPRegister() local
231 int reg = -1; FormatVectorRegister() local
[all...] |
| /third_party/node/deps/v8/src/diagnostics/s390/ |
| H A D | disasm-s390.cc | 111 void Decoder::PrintRegister(int reg) { in PrintRegister() argument
116 void Decoder::PrintDRegister(int reg) { in PrintDRegister() argument
149 int reg = instr->Bits<SixByteInstr, int>(39, 36); in FormatRegister() local
153 int reg = instr->Bits<SixByteInstr, int>(35, 32); in FormatRegister() local
165 int reg = instr->Bits<SixByteInstr, int>(31, 28); FormatRegister() local
169 int reg = instr->Bits<SixByteInstr, int>(27, 24); FormatRegister() local
173 int reg = instr->Bits<SixByteInstr, int>(23, 20); FormatRegister() local
177 int reg = instr->Bits<SixByteInstr, int>(19, 16); FormatRegister() local
181 int reg = instr->Bits<SixByteInstr, int>(15, 12); FormatRegister() local
195 int reg = rrinstr->R1Value(); FormatFloatingRegister() local
200 int reg = rrinstr->R2Value(); FormatFloatingRegister() local
205 int reg = rrdinstr->R1Value(); FormatFloatingRegister() local
210 int reg = rreinstr->R1Value(); FormatFloatingRegister() local
215 int reg = rreinstr->R2Value(); FormatFloatingRegister() local
220 int reg = vrreinstr->R4Value(); FormatFloatingRegister() local
[all...] |
| /third_party/node/deps/v8/src/interpreter/ |
| H A D | bytecode-register-optimizer.cc | 18 RegisterInfo(Register reg, uint32_t equivalence_id, bool materialized, in RegisterInfo() argument
254 void BytecodeRegisterOptimizer::PushToRegistersNeedingFlush(RegisterInfo* reg) { in PushToRegistersNeedingFlush() argument
167 GetMaterializedEquivalentOtherThan( Register reg) GetMaterializedEquivalentOtherThan() argument
417 PrepareOutputRegister(Register reg) PrepareOutputRegister() argument
436 GetInputRegister(Register reg) GetInputRegister() argument
464 GrowRegisterMap(Register reg) GrowRegisterMap() argument
486 RegisterAllocateEvent(Register reg) RegisterAllocateEvent() argument
[all...] |
| /third_party/node/deps/v8/src/maglev/ |
| H A D | maglev-ir.cc | 84 void UseFixed(Input& input, Register reg) { in UseFixed() argument
739 Register reg = ToRegister(input()); in GenerateCode() local
62 DefineAsFixed(MaglevVregAllocationState* vreg_state, Node* node, Register reg) DefineAsFixed() argument
[all...] |
| H A D | maglev-graph-builder.h | 273 ValueNode* GetTaggedValue(interpreter::Register reg) { in GetTaggedValue() argument
287 ValueNode* GetSmiUntaggedValue(interpreter::Register reg) { in GetSmiUntaggedValue() argument
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| /third_party/node/deps/v8/src/regexp/ |
| H A D | regexp-macro-assembler-tracer.cc | 112 void RegExpMacroAssemblerTracer::AdvanceRegister(int reg, int by) { in AdvanceRegister() argument
130 void RegExpMacroAssemblerTracer::WriteCurrentPositionToRegister(int reg, in WriteCurrentPositionToRegister() argument
145 void RegExpMacroAssemblerTracer::ReadCurrentPositionFromRegister(int reg) { in ReadCurrentPositionFromRegister() argument
151 void RegExpMacroAssemblerTracer::WriteStackPointerToRegister(int reg) { in WriteStackPointerToRegister() argument
157 ReadStackPointerFromRegister(int reg) ReadStackPointerFromRegister() argument
[all...] |
| /third_party/node/deps/v8/src/wasm/baseline/ |
| H A D | liftoff-register.h | 150 constexpr explicit LiftoffRegister(Register reg) in LiftoffRegister() argument
155 constexpr explicit LiftoffRegister(DoubleRegister reg) in LiftoffRegister() argument
317 operator <<(std::ostream& os, LiftoffRegister reg) operator <<() argument
361 set(Register reg) set() argument
364 set(DoubleRegister reg) set() argument
368 set(LiftoffRegister reg) set() argument
378 clear(LiftoffRegister reg) clear() argument
387 clear(Register reg) clear() argument
390 clear(DoubleRegister reg) clear() argument
519 LiftoffRegister reg = reglist.GetFirstRegSet(); operator <<() local
[all...] |
| /third_party/mesa3d/src/gallium/drivers/freedreno/ |
| H A D | freedreno_util.h | 404 unsigned reg = REG_AXXX_CP_SCRATCH_REG0 + scratch_idx; in emit_marker() local
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| /third_party/mesa3d/src/gallium/drivers/i915/ |
| H A D | i915_fpc.h | 130 swizzle(int reg, uint32_t x, uint32_t y, uint32_t z, uint32_t w) in swizzle() argument
[all...] |
| /third_party/mesa3d/src/gallium/drivers/iris/ |
| H A D | iris_query.c | 235 const uint32_t reg = index_to_reg[q->index]; in write_value() local
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| /third_party/mesa3d/src/gallium/drivers/lima/ir/pp/ |
| H A D | nir.c | 106 nir_register *reg = ns->reg.reg; in ppir_node_add_src() local
54 ppir_node_create_reg(ppir_block *block, ppir_op op, nir_register *reg, unsigned mask) ppir_node_create_reg() argument
[all...] |