| /third_party/mesa3d/src/freedreno/ir3/ |
| H A D | ir3_ra_validate.c | 123 get_file_size(struct ra_val_ctx *ctx, struct ir3_register *reg) in get_file_size() argument
208 ra_val_get_file(struct ra_val_ctx *ctx, struct ir3_register *reg) in ra_val_get_file() argument
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| H A D | ir3_postsched.c | 429 add_reg_dep(struct ir3_postsched_deps_state *state, struct ir3_postsched_node *node, const struct ir3_register *reg, unsigned num, int src_n, int dst_n) add_reg_dep() argument
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| /third_party/mesa3d/src/freedreno/afuc/ |
| H A D | disasm.c | 72 print_src(unsigned reg) in print_src() argument
87 print_dst(unsigned reg) in print_dst() argument
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| /third_party/mesa3d/src/freedreno/decode/ |
| H A D | script.c | 600 openlib(const char *lib, const luaL_Reg *reg) in openlib() argument
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| /third_party/mesa3d/src/freedreno/vulkan/ |
| H A D | tu_cs.h | 332 tu_cs_emit_write_reg(struct tu_cs *cs, uint16_t reg, uint32_t value) in tu_cs_emit_write_reg() argument
418 uint32_t reg; member
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| /third_party/mesa3d/src/asahi/compiler/ |
| H A D | agx_pack.c | 143 unsigned reg = dest.value; in agx_pack_alu_dst() local
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| /third_party/mesa3d/src/amd/compiler/ |
| H A D | aco_print_ir.cpp | 104 print_physReg(PhysReg reg, unsigned bytes, FILE* output, unsigned flags) in print_physReg() argument
133 print_constant(uint8_t reg, FILE* output) print_constant() argument
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| H A D | aco_validate.cpp | 748 PhysReg reg; member
952 PhysReg reg = assignments[tmp.id()].reg; in validate_instr_defs() local
1094 PhysReg reg = assignments[id].reg; validate_ra() local
1112 PhysReg reg = assignments[tmp.id()].reg; validate_ra() local
1143 PhysReg reg = assignments[id].reg; validate_ra() local
1154 PhysReg reg = assignments[tmp.id()].reg; validate_ra() local
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| /third_party/mesa3d/src/gallium/drivers/vc4/ |
| H A D | vc4_qir.c | 392 qir_print_reg(struct vc4_compile *c, struct qreg reg, bool write) in qir_print_reg() argument
569 struct qreg reg; qir_get_temp() local
719 qir_follow_movs(struct vc4_compile *c, struct qreg reg) qir_follow_movs() argument
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| /third_party/mesa3d/src/intel/compiler/ |
| H A D | brw_fs_combine_constants.cpp | 97 fs_reg *reg; member
101 link(void *mem_ctx, fs_reg *reg) in link() argument
300 needs_negate(const fs_reg *reg, const struct imm *imm) in needs_negate() argument
560 fs_reg *reg = link->reg; opt_combine_constants() local
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| H A D | brw_reg.h | 407 struct brw_reg reg; in brw_reg() local
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| H A D | brw_schedule_instructions.cpp | 904 int reg = inst->src[i].nr + off; in get_register_pressure_benefit() local
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| /third_party/mesa3d/src/gallium/drivers/r600/sb/ |
| H A D | sb_bc_finalize.cpp | 490 int reg = -1; in copy_fetch_src() local
580 int reg = -1; in finalize_fetch() local
720 int reg = -1; finalize_cf() local
778 int reg = -1; finalize_cf() local
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| /third_party/mesa3d/src/gallium/drivers/svga/svgadump/ |
| H A D | svga_shader.h | 73 struct sh_reg reg; member
80 struct sh_reg reg; member
92 struct sh_reg reg; member
154 struct sh_dstreg reg; member
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| /third_party/mesa3d/src/mesa/state_tracker/ |
| H A D | st_atifs_to_nir.c | 334 unsigned reg = pass_tex - GL_REG_0_ATI; in compile_setupinst() local
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| /third_party/mesa3d/src/microsoft/compiler/ |
| H A D | dxil_signature.h | 45 uint32_t reg; // Register Index (row index) member
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| /third_party/mesa3d/src/nouveau/codegen/ |
| H A D | nv50_ir_build_util.cpp | 344 LValue *reg = new_LValue(func, f); mkClobber() local
350 LValue *reg = new_LValue(func, f); mkClobber() local
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| /third_party/libdrm/tests/amdgpu/ |
| H A D | vcn_tests.c | 75 static struct amdgpu_vcn_reg reg[] = { variable
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| /third_party/node/deps/v8/src/codegen/arm/ |
| H A D | macro-assembler-arm.h | 509 void SmiUntag(Register reg, SBit s = LeaveCC) { in SmiUntag() argument
871 void DecodeField(Register reg) { in DecodeField() argument
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| H A D | assembler-arm-inl.h | 341 T reg = T::from_code(index); in CanAcquireVfp() local
355 T reg = T::from_code(index); in AcquireVfp() local
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| /third_party/node/deps/v8/src/codegen/x64/ |
| H A D | assembler-x64-inl.h | 61 void Assembler::emit_rex_64(Register reg, Register rm_reg) { in emit_rex_64() argument
65 void Assembler::emit_rex_64(XMMRegister reg, Register rm_reg) { in emit_rex_64() argument
69 void Assembler::emit_rex_64(Register reg, XMMRegister rm_reg) { in emit_rex_64() argument
73 void Assembler::emit_rex_64(XMMRegister reg, XMMRegister rm_reg) { in emit_rex_64() argument
77 void Assembler::emit_rex_64(Register reg, Operand op) { in emit_rex_64() argument
81 emit_rex_64(XMMRegister reg, Operand op) emit_rex_64() argument
92 emit_rex_32(Register reg, Register rm_reg) emit_rex_32() argument
96 emit_rex_32(Register reg, Operand op) emit_rex_32() argument
104 emit_optional_rex_32(Register reg, Register rm_reg) emit_optional_rex_32() argument
109 emit_optional_rex_32(Register reg, Operand op) emit_optional_rex_32() argument
114 emit_optional_rex_32(XMMRegister reg, Operand op) emit_optional_rex_32() argument
119 emit_optional_rex_32(XMMRegister reg, XMMRegister base) emit_optional_rex_32() argument
124 emit_optional_rex_32(XMMRegister reg, Register base) emit_optional_rex_32() argument
129 emit_optional_rex_32(Register reg, XMMRegister base) emit_optional_rex_32() argument
146 emit_optional_rex_8(Register reg) emit_optional_rex_8() argument
153 emit_optional_rex_8(Register reg, Operand op) emit_optional_rex_8() argument
163 emit_vex3_byte1(XMMRegister reg, XMMRegister rm, LeadingOpcode m) emit_vex3_byte1() argument
170 emit_vex3_byte1(XMMRegister reg, Operand rm, LeadingOpcode m) emit_vex3_byte1() argument
176 emit_vex2_byte1(XMMRegister reg, XMMRegister v, VectorLength l, SIMDPrefix pp) emit_vex2_byte1() argument
188 emit_vex_prefix(XMMRegister reg, XMMRegister vreg, XMMRegister rm, VectorLength l, SIMDPrefix pp, LeadingOpcode mm, VexW w) emit_vex_prefix() argument
201 emit_vex_prefix(Register reg, Register vreg, Register rm, VectorLength l, SIMDPrefix pp, LeadingOpcode mm, VexW w) emit_vex_prefix() argument
210 emit_vex_prefix(XMMRegister reg, XMMRegister vreg, Operand rm, VectorLength l, SIMDPrefix pp, LeadingOpcode mm, VexW w) emit_vex_prefix() argument
223 emit_vex_prefix(Register reg, Register vreg, Operand rm, VectorLength l, SIMDPrefix pp, LeadingOpcode mm, VexW w) emit_vex_prefix() argument
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| /third_party/node/deps/v8/src/maglev/ |
| H A D | maglev-regalloc.cc | 436 void StraightForwardRegisterAllocator::DropRegisterValue(Register reg) { in DropRegisterValue() argument
489 Register reg = registers.PopFirst(); InitializeConditionalBranchRegisters() local
549 Register reg = input.AssignedRegister(); TryAllocateToInput() local
604 Register reg = Register::from_code(operand.fixed_register_index()); AssignInput() local
644 Register reg = used_registers().first(); SpillAndClearRegisters() local
691 ForceAllocate( Register reg, ValueNode* node) ForceAllocate() argument
711 SetRegister(Register reg, ValueNode* node) SetRegister() argument
747 Register reg = used_registers().first(); InitializeRegisterValues() local
758 Register reg = entry.reg; InitializeRegisterValues() local
791 Register reg = entry.reg; InitializeBranchTargetRegisterValues() local
812 Register reg = entry.reg; MergeRegisterValues() local
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| H A D | maglev-interpreter-frame-state.h | 52 void set(interpreter::Register reg, ValueNode* value) { in set() argument
102 interpreter::Register reg = interpreter::Register::FromParameterIndex(i); ForEachParameter() local
110 interpreter::Register reg = interpreter::Register::FromParameterIndex(i); ForEachParameter() local
119 interpreter::Register reg = interpreter::Register(register_index); ForEachLocal() local
129 interpreter::Register reg = interpreter::Register(register_index); ForEachLocal() local
192 Register reg; global() member
229 CheckIsLoopPhiIfNeeded(const MaglevCompilationUnit& compilation_unit, int merge_offset, interpreter::Register reg, ValueNode* value) CheckIsLoopPhiIfNeeded() argument
468 NewLoopPhi(Zone* zone, interpreter::Register reg, int merge_offset) NewLoopPhi() argument
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| /third_party/node/deps/v8/src/snapshot/embedded/ |
| H A D | embedded-data.cc | 211 Register reg = descriptor.GetRegisterParameter(i); in BuiltinAliasesOffHeapTrampolineRegister() local
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| /third_party/mesa3d/src/gallium/drivers/freedreno/a5xx/ |
| H A D | fd5_program.c | 229 next_regid(uint32_t reg, uint32_t increment) in next_regid() argument
456 uint32_t reg = 0; in fd5_program_emit() local
472 uint32_t reg in fd5_program_emit() local
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