Searched defs:opc (Results 51 - 60 of 60) sorted by relevance
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| /third_party/backends/backend/ |
| H A D | avision.h | 564 uint8_t opc; member
572 uint8_t opc; member
580 uint8_t opc; member
591 uint8_t opc; member
600 uint8_t opc; member
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| /third_party/mesa3d/src/freedreno/ir3/ |
| H A D | ir3.h | 260 opc_t opc; member
1063 cat3_half_opc(opc_t opc) cat3_half_opc() argument
1082 cat3_full_opc(opc_t opc) cat3_full_opc() argument
1101 cat4_half_opc(opc_t opc) cat4_half_opc() argument
1116 cat4_full_opc(opc_t opc) cat4_full_opc() argument
1315 ir3_cat2_int(opc_t opc) ir3_cat2_int() argument
1358 ir3_cat2_absneg(opc_t opc) ir3_cat2_absneg() argument
1419 ir3_cat3_absneg(opc_t opc) ir3_cat3_absneg() argument
1577 ir3_try_swap_signedness(opc_t opc, bool *can_swap) ir3_try_swap_signedness() argument
2331 ir3_SAM(struct ir3_block *block, opc_t opc, type_t type, unsigned wrmask, unsigned flags, struct ir3_instruction *samp_tex, struct ir3_instruction *src0, struct ir3_instruction *src1) ir3_SAM() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 4532 unsigned opc = fieldFromInstruction(Insn, 4, 28); in DecodeThumb2BCCInstruction() local
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| /third_party/glslang/SPIRV/ |
| H A D | GlslangToSpv.cpp | 9690 spv::Op opc = builder.getOpCode(id); in addImageProcessingQCOMDecoration() local
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| /third_party/mesa3d/src/gallium/drivers/r600/ |
| H A D | r600_shader.c | 11041 int opc; in emit_u64add() local
11113 int op = ALU_OP2_ADD_INT, opc = ALU_OP2_ADDC_UINT; in egcm_u64add() local
11187 const int opc = ALU_OP2_SUBB_UINT; in egcm_i64neg() local
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| H A D | r600_isa.h | 701 int opc = r600_isa_alu(op)->opcode[gfx_level >> 1]; in r600_isa_alu_opcode() local
715 int opc = r600_isa_fetch(op)->opcode[gfx_level]; in r600_isa_fetch_opcode() local
722 int opc = r600_isa_cf(op)->opcode[gfx_level]; in r600_isa_cf_opcode() local
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| /third_party/node/deps/v8/src/execution/arm/ |
| H A D | simulator-arm.cc | 4970 int opc = instr->Bits(11, 8); in DecodeAdvancedSIMDTwoOrThreeRegisters() local
5046 int opc = instr->Bits(11, 8); in DecodeAdvancedSIMDDataProcessing() local
5546 int opc = instr->Bits(11, 8); DecodeAdvancedSIMDDataProcessing() local
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| /third_party/mesa3d/src/panfrost/bifrost/ |
| H A D | bifrost_compile.c | 1489 enum bi_atom_opc opc = bi_atom_opc_for_nir(intrinsic); in bi_emit_atomic_i32_to() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 844 unsigned opc = 0; // target opcode member
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 3124 ARM_AM::AddrOpc opc = PostIdxReg.isAdd ? ARM_AM::add : ARM_AM::sub; in addPostIdxRegShiftedOperands() local
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