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/third_party/skia/third_party/externals/libwebp/src/dsp/
H A Ddec_neon.c845 uint8x16_t op2, op1, op0, oq0, oq1, oq2; in VFilter16_NEON() local
711 ApplyFilter4_NEON( const int8x16_t p1, const int8x16_t p0, const int8x16_t q0, const int8x16_t q1, const int8x16_t delta0, uint8x16_t* const op1, uint8x16_t* const op0, uint8x16_t* const oq0, uint8x16_t* const oq1) ApplyFilter4_NEON() argument
730 DoFilter4_NEON( const uint8x16_t p1, const uint8x16_t p0, const uint8x16_t q0, const uint8x16_t q1, const uint8x16_t mask, const uint8x16_t hev_mask, uint8x16_t* const op1, uint8x16_t* const op0, uint8x16_t* const oq0, uint8x16_t* const oq1) DoFilter4_NEON() argument
764 ApplyFilter6_NEON( const int8x16_t p2, const int8x16_t p1, const int8x16_t p0, const int8x16_t q0, const int8x16_t q1, const int8x16_t q2, const int8x16_t delta, uint8x16_t* const op2, uint8x16_t* const op1, uint8x16_t* const op0, uint8x16_t* const oq0, uint8x16_t* const oq1, uint8x16_t* const oq2) ApplyFilter6_NEON() argument
801 DoFilter6_NEON( const uint8x16_t p2, const uint8x16_t p1, const uint8x16_t p0, const uint8x16_t q0, const uint8x16_t q1, const uint8x16_t q2, const uint8x16_t mask, const uint8x16_t hev_mask, uint8x16_t* const op2, uint8x16_t* const op1, uint8x16_t* const op0, uint8x16_t* const oq0, uint8x16_t* const oq1, uint8x16_t* const oq2) DoFilter6_NEON() argument
862 uint8x16_t op2, op1, op0, oq0, oq1, oq2; HFilter16_NEON() local
927 uint8x16_t op2, op1, op0, oq0, oq1, oq2; VFilter8_NEON() local
945 uint8x16_t op1, op0, oq0, oq1; VFilter8i_NEON() local
960 uint8x16_t op2, op1, op0, oq0, oq1, oq2; HFilter8_NEON() local
977 uint8x16_t op1, op0, oq0, oq1; HFilter8i_NEON() local
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/third_party/optimized-routines/math/test/
H A Dmathtest.c590 unsigned op1, op2; member
624 special_op* find_special_op_from_op(unsigned op1, unsigned op2, int is_double) { in find_special_op_from_op() argument
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/kernel/liteos_m/arch/risc-v/nuclei/gcc/nmsis/Core/Include/
H A Dcore_feature_dsp.h18558 __STATIC_FORCEINLINE int32_t __SMUADX (int32_t op1, int32_t op2) in __SMUADX() argument
18567 __STATIC_FORCEINLINE int32_t __SMLAD(int32_t op1, int32_t op2, int32_t op3) in __SMLAD() argument
18572 __STATIC_FORCEINLINE int32_t __SMLADX(int32_t op1, int32_t op2, int32_t op3) in __SMLADX() argument
18577 __STATIC_FORCEINLINE int32_t __SMLSDX(int32_t op1, int32_t op2, int32_t op3) in __SMLSDX() argument
18582 __STATIC_FORCEINLINE int64_t __SMLALD(int32_t op1, int32_t op2, int64_t acc) in __SMLALD() argument
18587 __SMLALDX(int32_t op1, int32_t op2, int64_t acc) __SMLALDX() argument
18592 __SMUAD(int32_t op1, int32_t op2) __SMUAD() argument
18597 __SMUSD(int32_t op1, int32_t op2) __SMUSD() argument
18604 __SXTAB16(uint32_t op1, uint32_t op2) __SXTAB16() argument
18609 __SMMLA(int32_t op1, int32_t op2, int32_t op3) __SMMLA() argument
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/third_party/glslang/SPIRV/
H A DSpvBuilder.cpp1609 unsigned op1 = value & 0xFFFFFFFF; in makeInt64Constant() local
1662 unsigned op1 = value & 0xFFFFFFFF; in makeDoubleConstant() local
2687 Id Builder::createTriOp(Op opCode, Id typeId, Id op1, Id op2, Id op3) in createTriOp() argument
/third_party/mesa3d/src/amd/compiler/
H A Daco_optimizer.cpp2142 Temp op1 = op_instr[i]->operands[1].getTemp(); in combine_ordering_test() local
2473 match_op3_for_vop3(opt_ctx& ctx, aco_opcode op1, aco_opcode op2, Instruction* op1_instr, bool swap, in match_op3_for_vop3() argument
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/third_party/mesa3d/src/compiler/glsl/
H A Dast_to_hir.cpp1115 do_comparison(void *mem_ctx, int operation, ir_rvalue *op0, ir_rvalue *op1) in do_comparison() argument
/third_party/node/deps/v8/src/codegen/ia32/
H A Dassembler-ia32.cc3327 void Assembler::emit_arith_b(int op1, int op2, Register dst, int imm8) { in emit_arith_b() argument
/third_party/node/deps/v8/src/execution/arm64/
H A Dsimulator-logic-arm64.cc913 uint16_t Simulator::PolynomialMult(uint8_t op1, uint8_t op2) { in PolynomialMult() argument
2921 T Simulator::FPAdd(T op1, T op2) { in FPAdd() argument
2936 T Simulator::FPSub(T op1, T op2) { in FPSub() argument
2951 FPMul(T op1, T op2) FPMul() argument
2966 FPMulx(T op1, T op2) FPMulx() argument
2976 FPMulAdd(T a, T op1, T op2) FPMulAdd() argument
3022 FPDiv(T op1, T op2) FPDiv() argument
3110 FPRecipStepFused(T op1, T op2) FPRecipStepFused() argument
3125 FPRSqrtStepFused(T op1, T op2) FPRSqrtStepFused() argument
3291 T op1 = -src1.Float<T>(i); frecps() local
3317 T op1 = -src1.Float<T>(i); frsqrts() local
3403 T op1 = src1.Float<T>(i); fcmp() local
3483 T op1 = src1.Float<T>(i); fmla() local
3510 T op1 = -src1.Float<T>(i); fmls() local
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H A Dsimulator-arm64.h2478 T FPProcessNaNs(T op1, argument
2495 FPProcessNaNs3(T op1, T op2, T op3) FPProcessNaNs3() argument
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/third_party/skia/third_party/externals/spirv-cross/
H A Dspirv_msl.cpp6731 void CompilerMSL::emit_binary_unord_op(uint32_t result_type, uint32_t result_id, uint32_t op0, uint32_t op1, in emit_binary_unord_op() argument
8236 uint32_t op1 = ops[3]; in emit_instruction() local
8266 uint32_t op1 = ops[3]; emit_instruction() local
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/third_party/vixl/src/aarch64/
H A Dassembler-aarch64.cc1909 void Assembler::sys(int op1, int crn, int crm, int op2, const Register& xt) { in sys() argument
H A Dmacro-assembler-aarch64.h2256 void Sys(int op1, int crn, int crm, int op2, const Register& rt = xzr) { in Sys() argument
H A Dsimulator-aarch64.cc4033 int64_t op1 = ReadRegister(reg_size, instr->GetRn()); in Simulator() local
4086 int64_t op1 = ReadRegister(reg_size, instr->GetRn()); in Simulator() local
/third_party/vulkan-loader/loader/
H A Dloader.c369 bool compare_vk_extension_properties(const VkExtensionProperties *op1, const VkExtensionProperties *op2) { in compare_vk_extension_properties() argument
/third_party/mesa3d/src/freedreno/vulkan/
H A Dmsm_kgsl.h683 unsigned int op1; member
/third_party/mesa3d/src/microsoft/compiler/
H A Ddxil_module.c2631 dxil_emit_binop(struct dxil_module *m, enum dxil_bin_opcode opcode, const struct dxil_value *op0, const struct dxil_value *op1, enum dxil_opt_flags flags) dxil_emit_binop() argument
2650 dxil_emit_cmp(struct dxil_module *m, enum dxil_cmp_pred pred, const struct dxil_value *op0, const struct dxil_value *op1) dxil_emit_cmp() argument
2667 dxil_emit_select(struct dxil_module *m, const struct dxil_value *op0, const struct dxil_value *op1, const struct dxil_value *op2) dxil_emit_select() argument
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H A Dnir_to_dxil.c533 emit_binary_call(struct ntd_context *ctx, enum overload_type overload, enum dxil_intr intr, const struct dxil_value *op0, const struct dxil_value *op1) emit_binary_call() argument
555 emit_tertiary_call(struct ntd_context *ctx, enum overload_type overload, enum dxil_intr intr, const struct dxil_value *op0, const struct dxil_value *op1, const struct dxil_value *op2) emit_tertiary_call() argument
580 emit_quaternary_call(struct ntd_context *ctx, enum overload_type overload, enum dxil_intr intr, const struct dxil_value *op0, const struct dxil_value *op1, const struct dxil_value *op2, const struct dxil_value *op3) emit_quaternary_call() argument
1824 emit_binop(struct ntd_context *ctx, nir_alu_instr *alu, enum dxil_bin_opcode opcode, const struct dxil_value *op0, const struct dxil_value *op1) emit_binop() argument
1842 emit_shift(struct ntd_context *ctx, nir_alu_instr *alu, enum dxil_bin_opcode opcode, const struct dxil_value *op0, const struct dxil_value *op1) emit_shift() argument
1865 emit_cmp(struct ntd_context *ctx, nir_alu_instr *alu, enum dxil_cmp_pred pred, const struct dxil_value *op0, const struct dxil_value *op1) emit_cmp() argument
2050 emit_binary_intin(struct ntd_context *ctx, nir_alu_instr *alu, enum dxil_intr intr, const struct dxil_value *op0, const struct dxil_value *op1) emit_binary_intin() argument
2071 emit_tertiary_intin(struct ntd_context *ctx, nir_alu_instr *alu, enum dxil_intr intr, const struct dxil_value *op0, const struct dxil_value *op1, const struct dxil_value *op2) emit_tertiary_intin() argument
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/third_party/node/deps/v8/src/execution/arm/
H A Dsimulator-arm.cc4354 int op1 = instr->Bit(20); in DecodeUnconditional() local
4375 int op1 = instr->Bits(21, 20); in DecodeAdvancedSIMDTwoOrThreeRegisters() local
5041 int op1 = instr->Bit(4); DecodeAdvancedSIMDDataProcessing() local
5749 int op1 = instr->Bits(11, 10); DecodeAdvancedSIMDElementOrStructureLoadStore() local
6109 int op1 = instr->Bits(11, 9); DecodeSpecialCondition() local
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/third_party/elfutils/src/
H A Dreadelf.c5958 uint64_t op1, op2; in print_debug_rnglists_section() local
6413 uint64_t op1; print_cfa_program() local
9497 uint64_t op1, op2, len; print_debug_loclists_section() local
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/third_party/backends/backend/
H A Dhp3900_rts8822.c12472 SANE_Int op1, op2, op3; in Calib_AdcOffsetRT() local
/third_party/python/Modules/
H A D_testcapimodule.c3419 PyObject *single, **multiple, *op1, *result; in profile_int() local
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/third_party/sqlite/src/
H A Dsqlite3.c220563 int op1 = pExist->op; global() local
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