| /third_party/mesa3d/src/nouveau/codegen/ |
| H A D | nv50_ir_build_util.cpp | 335 const uint32_t mask = rMask & 0xf; in mkClobber() local
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| /third_party/mesa3d/src/panfrost/vulkan/ |
| H A D | panvk_vX_meta_clear.c | 127 panvk_meta_clear_zs_attachment_emit_rsd(struct panfrost_device *pdev, struct pan_pool *desc_pool, VkImageAspectFlags mask, VkClearDepthStencilValue value) panvk_meta_clear_zs_attachment_emit_rsd() argument
263 panvk_meta_clear_attachment(struct panvk_cmd_buffer *cmdbuf, unsigned attachment, unsigned rt, VkImageAspectFlags mask, const VkClearValue *clear_value, const VkClearRect *clear_rect) panvk_meta_clear_attachment() argument
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| /third_party/mesa3d/src/gallium/drivers/llvmpipe/ |
| H A D | lp_state_fs_linear_llvm.c | 201 LLVMValueRef mask = NULL; in llvm_fragment_body() local
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| /third_party/mesa3d/src/gallium/drivers/nouveau/nv30/ |
| H A D | nvfx_fragprog.c | 436 int mask = 0; in tgsi_mask() local
453 int mask, sat, unit = 0; in nvfx_fragprog_parse_instruction() local
[all...] |
| H A D | nvfx_vertprog.c | 451 int mask = 0; in tgsi_mask() local
472 int mask; nvfx_vertprog_parse_instruction() local
1066 unsigned mask; _nvfx_vertprog_translate() local
[all...] |
| /third_party/mesa3d/src/gallium/drivers/nouveau/nv50/ |
| H A D | nv50_program.h | 34 unsigned mask : 4; member
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| H A D | nv50_vbo.c | 296 uint32_t mask; in nv50_vertex_arrays_validate() local
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| /third_party/libevdev/libevdev/ |
| H A D | libevdev-int.h | 287 type_to_mask_const(const struct libevdev *dev, unsigned int type, const unsigned long **mask) in type_to_mask_const() argument
310 type_to_mask(struct libevdev *dev, unsigned int type, unsigned long **mask) in type_to_mask() argument
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| /third_party/libfuse/example/ |
| H A D | passthrough.c | 89 static int xmp_access(const char *path, int mask) in xmp_access() argument
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| /third_party/ltp/testcases/kernel/syscalls/fanotify/ |
| H A D | fanotify16.c | 48 unsigned long long mask; member
79 unsigned long mask; member
[all...] |
| /third_party/node/deps/v8/src/compiler/backend/ |
| H A D | spill-placer.cc | 136 void SetSpillRequired(uint64_t mask) { in SetSpillRequired() argument
142 void SetSpillRequiredInNonDeferredSuccessor(uint64_t mask) { in SetSpillRequiredInNonDeferredSuccessor() argument
148 void SetSpillRequiredInDeferredSuccessor(uint64_t mask) { in SetSpillRequiredInDeferredSuccessor() argument
152 void SetDefinition(uint64_t mask) { UpdateValuesToState<kDefinition>(mask); } in SetDefinition() argument
[all...] |
| /third_party/node/deps/v8/src/compiler/ |
| H A D | csa-load-elimination.cc | 565 int mask = (1 << 8 * ElementSizeInBytes(to.representation())) - 1; in TruncateAndExtend() local
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| H A D | node.cc | 326 unsigned mask = 0; in OwnedBy() local
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| /third_party/node/deps/v8/src/codegen/shared-ia32-x64/ |
| H A D | macro-assembler-shared-ia32-x64.cc | 415 uint32_t mask = bmask << 24 | bmask << 16 | bmask << 8 | bmask; in I8x16Shl() local
499 uint32_t mask = bmask << 24 | bmask << 16 | bmask << 8 | bmask; in I8x16ShrU() local
106 Pblendvb(XMMRegister dst, XMMRegister src1, XMMRegister src2, XMMRegister mask) Pblendvb() argument
1057 uint8_t mask = low ? 0x50 : 0xFA; I64x2ExtMul() local
1121 S128Select(XMMRegister dst, XMMRegister mask, XMMRegister src1, XMMRegister src2, XMMRegister scratch) S128Select() argument
[all...] |
| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | instructions-arm64.cc | 129 int mask = width - 1; in ImmLogical() local
308 Instr mask = ImmLLiteral_mask; in SetImmLLiteral() local
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| /third_party/node/deps/v8/src/codegen/arm/ |
| H A D | assembler-arm-inl.h | 342 uint64_t mask = reg.ToVfpRegList(); in CanAcquireVfp() local
356 uint64_t mask = reg.ToVfpRegList(); in AcquireVfp() local
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| /third_party/node/deps/v8/src/heap/ |
| H A D | marking.h | 19 inline MarkBit(CellType* cell, CellType mask) : cell_(cell), mask_(mask) {} in MarkBit() argument
137 MarkBit::CellType mask = 1u << IndexInCell(index); in MarkBitFromIndex() local
247 SetBitsInCell( uint32_t cell_index, uint32_t mask) SetBitsInCell() argument
253 SetBitsInCell( uint32_t cell_index, uint32_t mask) SetBitsInCell() argument
259 ClearBitsInCell( uint32_t cell_index, uint32_t mask) ClearBitsInCell() argument
265 ClearBitsInCell( uint32_t cell_index, uint32_t mask) ClearBitsInCell() argument
[all...] |
| /third_party/node/deps/v8/src/profiler/ |
| H A D | profiler-listener.cc | 381 int mask = RelocInfo::ModeMask(RelocInfo::DEOPT_ID) | in AttachDeoptInlinedFrames() local
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| /third_party/mesa3d/src/gallium/drivers/freedreno/a5xx/ |
| H A D | fd5_program.c | 665 unsigned mask = coord_mode ? 0b1101 : 0b1001; in fd5_program_emit() local
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| /third_party/mesa3d/src/gallium/drivers/i915/ |
| H A D | i915_surface.c | 317 unsigned mask = 0; in i915_clear_depth_stencil_blitter() local
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| /third_party/mesa3d/src/gallium/drivers/lima/ir/pp/ |
| H A D | disasm.c | 49 print_mask(uint8_t mask, FILE *fp) in print_mask() argument
[all...] |
| /third_party/mesa3d/src/gallium/auxiliary/gallivm/ |
| H A D | lp_bld_swizzle.c | 486 uint64_t mask = 0; in lp_build_swizzle_aos() local
[all...] |
| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| H A D | si_fence.c | 174 si_cp_wait_mem(struct si_context *ctx, struct radeon_cmdbuf *cs, uint64_t va, uint32_t ref, uint32_t mask, unsigned flags) si_cp_wait_mem() argument
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| /third_party/mesa3d/src/gallium/frontends/nine/ |
| H A D | nine_shader.h | 109 int mask; member
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| /third_party/mesa3d/src/util/ |
| H A D | u_cpu_detect.c | 477 uint32_t mask[UTIL_MAX_CPUS / 32] = {0}; in get_cpu_topology() local
|