| /kernel/linux/linux-5.10/fs/nfs/filelayout/ |
| H A D | filelayout.c | 1070 struct pnfs_layout_hdr *layout = NFS_I(inode)->layout; filelayout_get_ds_info() local [all...] |
| /kernel/linux/linux-6.6/fs/nfs/filelayout/ |
| H A D | filelayout.c | 1077 struct pnfs_layout_hdr *layout = NFS_I(inode)->layout; filelayout_get_ds_info() local [all...] |
| /kernel/linux/linux-6.6/include/linux/ |
| H A D | nfs_fs.h | 239 struct pnfs_layout_hdr *layout; member
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| /kernel/linux/linux-6.6/drivers/gpu/drm/msm/disp/dpu1/ |
| H A D | dpu_plane.c | 649 struct dpu_hw_fmt_layout layout; in dpu_plane_prepare_fb() local 1100 struct dpu_hw_fmt_layout layout; in dpu_plane_sspp_atomic_update() local 1013 dpu_plane_sspp_update_pipe(struct drm_plane *plane, struct dpu_sw_pipe *pipe, struct dpu_sw_pipe_cfg *pipe_cfg, const struct dpu_format *fmt, int frame_rate, struct dpu_hw_fmt_layout *layout) dpu_plane_sspp_update_pipe() argument [all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/meson/ |
| H A D | meson_overlay.c | 763 unsigned int layout = modifier & in meson_overlay_format_mod_supported() local
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| /kernel/linux/linux-6.6/scripts/kconfig/ |
| H A D | qconf.cc | 1352 QVBoxLayout *layout = new QVBoxLayout(widget); in ConfigMainWindow() local
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| /third_party/ffmpeg/libavcodec/ |
| H A D | mlpdec.c | 195 static int mlp_channel_layout_subset(AVChannelLayout *layout, uint64_t mask) in mlp_channel_layout_subset() argument
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| /third_party/ffmpeg/libavformat/ |
| H A D | iff.c | 186 AVChannelLayout layout; member
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| /third_party/ffmpeg/libavutil/ |
| H A D | vulkan.c | 928 VkDescriptorSetLayout *layout; in ff_vk_add_descriptor_set() local [all...] |
| /third_party/icu/icu4j/main/classes/core/src/com/ibm/icu/math/ |
| H A D | BigDecimal.java | 2958 private char[] layout() { layout() method in BigDecimal [all...] |
| /third_party/icu/ohos_icu4j/src/main/java/ohos/global/icu/math/ |
| H A D | BigDecimal.java | 2883 private char[] layout() { layout() method in BigDecimal [all...] |
| /third_party/mesa3d/src/freedreno/vulkan/ |
| H A D | tu_pipeline.h | 81 tu6_shared_constants_enable(const struct tu_pipeline_layout *layout, in tu6_shared_constants_enable() argument
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| H A D | tu_descriptor_set.c | 269 tu_descriptor_set_layout_destroy(struct tu_device *device, struct tu_descriptor_set_layout *layout) tu_descriptor_set_layout_destroy() argument 382 sha1_update_descriptor_set_binding_layout(struct mesa_sha1 *ctx, const struct tu_descriptor_set_binding_layout *layout, const struct tu_descriptor_set_layout *set_layout) sha1_update_descriptor_set_binding_layout() argument 404 sha1_update_descriptor_set_layout(struct mesa_sha1 *ctx, const struct tu_descriptor_set_layout *layout) sha1_update_descriptor_set_layout() argument 424 struct tu_pipeline_layout *layout; tu_CreatePipelineLayout() local 499 tu_descriptor_set_create(struct tu_device *device, struct tu_descriptor_pool *pool, struct tu_descriptor_set_layout *layout, const uint32_t *variable_count, struct tu_descriptor_set **out_set) tu_descriptor_set_create() argument [all...] |
| /third_party/mesa3d/src/amd/vulkan/ |
| H A D | radv_meta_blit.c | 388 VkImageLayout layout = radv_meta_dst_layout_to_layout(dst_layout); in meta_emit_blit() local 404 VkImageLayout layout = radv_meta_blit_ds_to_layout(ds_layout); in meta_emit_blit() local 419 VkImageLayout layout = radv_meta_blit_ds_to_layout(ds_layout); in meta_emit_blit() local
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| H A D | radv_meta_etc_decode.c | 711 radv_meta_decode_etc(struct radv_cmd_buffer *cmd_buffer, struct radv_image *image, VkImageLayout layout, const VkImageSubresourceLayers *subresource, VkOffset3D offset, VkExtent3D extent) radv_meta_decode_etc() argument
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| H A D | radv_debug.c | 198 const struct radv_descriptor_set_layout *layout; in radv_dump_descriptor_set() local
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| /third_party/mesa3d/src/compiler/glsl/ |
| H A D | ir.cpp | 656 depth_layout_string(ir_depth_layout layout) in depth_layout_string() argument
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| /third_party/mesa3d/src/broadcom/vulkan/ |
| H A D | v3dv_meta_clear.c | 438 create_pipeline(struct v3dv_device *device, struct v3dv_render_pass *pass, uint32_t subpass_idx, uint32_t samples, struct nir_shader *vs_nir, struct nir_shader *gs_nir, struct nir_shader *fs_nir, const VkPipelineVertexInputStateCreateInfo *vi_state, const VkPipelineDepthStencilStateCreateInfo *ds_state, const VkPipelineColorBlendStateCreateInfo *cb_state, const VkPipelineLayout layout, VkPipeline *pipeline) create_pipeline() argument
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| H A D | v3dv_descriptor_set.c | 290 sha1_update_descriptor_set_binding_layout(struct mesa_sha1 *ctx, const struct v3dv_descriptor_set_binding_layout *layout) sha1_update_descriptor_set_binding_layout() argument 303 sha1_update_descriptor_set_layout(struct mesa_sha1 *ctx, const struct v3dv_descriptor_set_layout *layout) sha1_update_descriptor_set_layout() argument 331 struct v3dv_pipeline_layout *layout; v3dv_CreatePipelineLayout() local 804 descriptor_set_create(struct v3dv_device *device, struct v3dv_descriptor_pool *pool, struct v3dv_descriptor_set_layout *layout, struct v3dv_descriptor_set **out_set) descriptor_set_create() argument [all...] |
| /third_party/mesa3d/src/amd/compiler/tests/ |
| H A D | helpers.cpp | 534 void PipelineBuilder::add_desc_binding(VkShaderStageFlags stage_flags, uint32_t layout, in add_desc_binding() argument
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| /third_party/mesa3d/src/gallium/drivers/zink/ |
| H A D | zink_program.c | 391 VkPipelineLayout layout; in zink_pipeline_layout_create() local
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| /third_party/mesa3d/src/imagination/vulkan/ |
| H A D | pvr_pipeline.c | 642 pvr_pds_descriptor_program_create_and_upload( struct pvr_device *const device, const VkAllocationCallbacks *const allocator, const struct rogue_compile_time_consts_data *const compile_time_consts_data, const struct rogue_ubo_data *const ubo_data, const struct pvr_explicit_constant_usage *const explicit_const_usage, const struct pvr_pipeline_layout *const layout, enum pvr_stage_allocation stage, struct pvr_stage_allocation_descriptor_state *const descriptor_state) pvr_pds_descriptor_program_create_and_upload() argument [all...] |
| H A D | pvr_descriptor_set.c | 206 struct pvr_descriptor_set_layout *layout; in pvr_descriptor_set_layout_allocate() local 247 pvr_descriptor_set_layout_free(struct pvr_device *device, const VkAllocationCallbacks *allocator, struct pvr_descriptor_set_layout *layout) pvr_descriptor_set_layout_free() argument 302 pvr_setup_in_memory_layout_sizes( struct pvr_descriptor_set_layout *layout, const struct pvr_register_usage reg_usage[PVR_STAGE_ALLOCATION_COUNT]) pvr_setup_in_memory_layout_sizes() argument 335 pvr_dump_in_memory_layout_sizes(const struct pvr_descriptor_set_layout *layout) pvr_dump_in_memory_layout_sizes() argument 436 struct pvr_descriptor_set_layout *layout; pvr_CreateDescriptorSetLayout() local 685 pvr_dump_in_register_layout_sizes(const struct pvr_device *device, const struct pvr_pipeline_layout *layout) pvr_dump_in_register_layout_sizes() argument 845 struct pvr_pipeline_layout *layout; pvr_CreatePipelineLayout() local 1082 pvr_get_descriptor_primary_offset( const struct pvr_device *device, const struct pvr_descriptor_set_layout *layout, const struct pvr_descriptor_set_layout_binding *binding, const uint32_t stage, const uint32_t desc_idx) pvr_get_descriptor_primary_offset() argument 1107 pvr_get_descriptor_secondary_offset( const struct pvr_device *device, const struct pvr_descriptor_set_layout *layout, const struct pvr_descriptor_set_layout_binding *binding, const uint32_t stage, const uint32_t desc_idx) pvr_get_descriptor_secondary_offset() argument 1135 pvr_descriptor_set_create(struct pvr_device *device, struct pvr_descriptor_pool *pool, const struct pvr_descriptor_set_layout *layout, struct pvr_descriptor_set **const descriptor_set_out) pvr_descriptor_set_create() argument 1312 pvr_get_descriptor_binding(const struct pvr_descriptor_set_layout *layout, const uint32_t binding_num) pvr_get_descriptor_binding() argument [all...] |
| /third_party/mesa3d/src/intel/perf/ |
| H A D | intel_perf.c | 1196 const struct intel_perf_query_field_layout *layout = &query->perf->query_layout; in intel_perf_query_result_accumulate_fields() local 1254 const struct intel_perf_query_field_layout *layout = &query->perf->query_layout; in intel_perf_query_result_print_fields() local 1291 add_query_register(struct intel_perf_query_field_layout *layout, in add_query_register() argument 1322 struct intel_perf_query_field_layout *layout = &perf_cfg->query_layout; intel_perf_init_query_fields() local [all...] |
| /third_party/mesa3d/src/intel/vulkan/ |
| H A D | anv_descriptor_set.c | 196 anv_descriptor_size(const struct anv_descriptor_set_binding_layout *layout) in anv_descriptor_size() argument 626 anv_descriptor_set_layout_destroy(struct anv_device *device, struct anv_descriptor_set_layout *layout) anv_descriptor_set_layout_destroy() argument 738 sha1_update_descriptor_set_binding_layout(struct mesa_sha1 *ctx, const struct anv_descriptor_set_binding_layout *layout) sha1_update_descriptor_set_binding_layout() argument 757 sha1_update_descriptor_set_layout(struct mesa_sha1 *ctx, const struct anv_descriptor_set_layout *layout) sha1_update_descriptor_set_layout() argument 783 struct anv_pipeline_layout *layout; anv_CreatePipelineLayout() local 1120 anv_descriptor_set_layout_size(const struct anv_descriptor_set_layout *layout, uint32_t var_desc_count) anv_descriptor_set_layout_size() argument 1134 anv_descriptor_set_create(struct anv_device *device, struct anv_descriptor_pool *pool, struct anv_descriptor_set_layout *layout, uint32_t var_desc_count, struct anv_descriptor_set **out_set) anv_descriptor_set_create() argument [all...] |