| /arkcompiler/ets_runtime/ecmascript/mem/ |
| H A D | free_object_list.cpp | 129 void FreeObjectList<T>::FreeImpl(U* region, uintptr_t start, size_t size, bool isAdd) in FreeImpl() argument
167 void FreeObjectList<T>::Free(uintptr_t start, size_t size, bool isAdd) in Free() argument
176 void FreeObjectList<MemDesc>::Free(uintptr_t start, size_t size, bool isAdd) in Free() argument
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| H A D | allocator-inl.h | 178 void FreeListAllocator<T>::Free(uintptr_t begin, size_t size, bool isAdd) in Free() argument
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| /arkcompiler/runtime_core/static_core/compiler/optimizer/optimizations/ |
| H A D | adjust_arefs.cpp | 184 Inst *AdjustRefs::InsertPointerArithmetic(Inst *input, uint64_t imm, Inst *insertBefore, uint32_t pc, bool isAdd) in InsertPointerArithmetic() argument
234 bool isAdd; in ProcessIndex() local
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| H A D | lowering.cpp | 756 bool isAdd = (inst->GetOpcode() == Opcode::Add); in LowerAddSub() local
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| /test/ostest/wukong/component_event/src/ |
| H A D | tree_manager.cpp | 502 bool TreeManager::UpdateCurrentPage(bool isAdd) in UpdateCurrentPage() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCCodeEmitter.cpp | 606 bool isAdd = true; in EncodeAddrModeOpValues() local
987 bool isAdd = true; in getAddrModeImm12OpValue() local
1044 bool isAdd = Imm >= 0; getT2ScaledImmOpValue() local
[all...] |
| H A D | ARMAsmBackend.cpp | 485 bool isAdd = true; in adjustFixupValue() local
714 bool isAdd = true; in adjustFixupValue() local
734 bool isAdd = true; in adjustFixupValue() local
761 bool isAdd in adjustFixupValue() local
[all...] |
| /arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_be/include/cg/aarch64/ |
| H A D | aarch64_mop_split.h | 329 inline void AddSubWithLslSplit(Insn *insn, bool isAdd, bool is64Bits, bool isAfterRegAlloc, InsnBuilder *insnBuilder, in AddSubWithLslSplit() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
| H A D | MCInstrDesc.h | 277 bool isAdd() const { return Flags & (1ULL << MCID::Add); } in isAdd() function in llvm::MCInstrDesc
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| /arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/mpl2mpl/src/ |
| H A D | constantfold.cpp | 51 std::optional<IntVal> AddSub(const std::optional<IntVal> &v1, const std::optional<IntVal> &v2, bool isAdd) in AddSub() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 600 bool isAdd = ARM_AM::getAM2Op(OffImm) == ARM_AM::add; in isLdstScaledRegNotPlusLsl2() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| H A D | IceTargetLoweringX8664.cpp | 4444 static bool isAdd(const Inst *Instr) { in isAdd() function in Ice::X8664::AddressOptimizer
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| H A D | IceTargetLoweringX8632.cpp | 5023 static bool isAdd(const Inst *Instr) { in isAdd() function in Ice::X8632::AddressOptimizer
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 795 bool isAdd; member
3095 bool isAdd = Imm >= 0; in addPostIdxImm8Operands() local
3106 bool isAdd = Imm >= 0; in addPostIdxImm8s4Operands() local
3644 CreatePostIdxReg(unsigned RegNum, bool isAdd, ARM_AM::ShiftOpc ShiftTy, in CreatePostIdxReg() argument
5441 bool isAdd = true; parsePostIdxReg() local
5523 bool isAdd = true; parseAM3Offset() local
[all...] |