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/third_party/mesa3d/src/intel/compiler/
H A Dbrw_fs_copy_propagation.cpp371 can_take_stride(fs_inst *inst, brw_reg_type dst_type, unsigned arg, unsigned stride, const struct brw_compiler *compiler) can_take_stride() argument
437 instruction_requires_packed_data(fs_inst *inst) instruction_requires_packed_data() argument
452 try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry) try_copy_propagate() argument
743 try_constant_propagate(fs_inst *inst, acp_entry *entry) try_constant_propagate() argument
999 can_propagate_from(fs_inst *inst) can_propagate_from() argument
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H A Dbrw_fs_builder.h71 fs_builder(backend_shader *shader, bblock_t *block, fs_inst *inst) : in fs_builder() argument
770 instruction *inst = emit(SHADER_OPCODE_LOAD_PAYLOAD, dst, src, sources); LOAD_PAYLOAD() local
785 instruction *inst = emit(SHADER_OPCODE_UNDEF, UNDEF() local
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H A Dbrw_fs_combine_constants.cpp49 could_coissue(const struct intel_device_info *devinfo, const fs_inst *inst) in could_coissue() argument
76 must_promote_imm(const struct intel_device_info *devinfo, const fs_inst *inst) in must_promote_imm() argument
118 fs_inst *inst; member
215 get_constant_value(const struct intel_device_info *devinfo, const fs_inst *inst, uint32_t src_idx, void *out, brw_reg_type *out_type) get_constant_value() argument
376 can_promote_src_as_imm(const struct intel_device_info *devinfo, fs_inst *inst, unsigned src_idx) can_promote_src_as_imm() argument
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H A Dbrw_cfg.h210 struct backend_instruction *inst = bblock_start(block); in bblock_first_non_control_flow_inst() local
223 struct backend_instruction *inst = bblock_end(block); in bblock_last_non_control_flow_inst() local
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H A Dbrw_fs_scoreboard.cpp74 inferred_sync_pipe(const struct intel_device_info *devinfo, const fs_inst *inst) in inferred_sync_pipe() argument
106 inferred_exec_pipe(const struct intel_device_info *devinfo, const fs_inst *inst) in inferred_exec_pipe() argument
152 ordered_unit(const struct intel_device_info *devinfo, const fs_inst *inst, unsigned p) ordered_unit() argument
390 assert(from < n); if (is[from] != from) assign(is[from], to); is[from] = to; } } unsigned *is; unsigned n; }; struct dependency { dependency() : ordered(TGL_REGDIST_NULL), jp(), unordered(TGL_SBID_NULL), id(0), exec_all(false) {} dependency(tgl_regdist_mode mode, const ordered_address &jp, bool exec_all) : ordered(mode), jp(jp), unordered(TGL_SBID_NULL), id(0), exec_all(exec_all) {} dependency(tgl_sbid_mode mode, unsigned id, bool exec_all) : ordered(TGL_REGDIST_NULL), jp(), unordered(mode), id(id), exec_all(exec_all) {} tgl_regdist_mode ordered; ordered_address jp; tgl_sbid_mode unordered; unsigned id; bool exec_all; static const dependency done; friend bool operator==(const dependency &dep0, const dependency &dep1) { return dep0.ordered == dep1.ordered && dep0.jp == dep1.jp && dep0.unordered == dep1.unordered && dep0.id == dep1.id && dep0.exec_all == dep1.exec_all; } friend bool operator!=(const dependency &dep0, const dependency &dep1) { return !(dep0 == dep1); } }; const dependency dependency::done = dependency(TGL_REGDIST_DST, ordered_address(), false); bool is_valid(const dependency &dep) { return dep.ordered || dep.unordered; } dependency merge(equivalence_relation &eq, const dependency &dep0, const dependency &dep1) { dependency dep; if (dep0.ordered || dep1.ordered) { dep.ordered = dep0.ordered | dep1.ordered; for (unsigned p = 0; p < IDX(TGL_PIPE_ALL); p++) dep.jp.jp[p] = MAX2(dep0.jp.jp[p], dep1.jp.jp[p]); } if (dep0.unordered || dep1.unordered) { dep.unordered = dep0.unordered | dep1.unordered; dep.id = eq.link(dep0.unordered ? dep0.id : dep1.id, dep1.unordered ? dep1.id : dep0.id); } dep.exec_all = dep0.exec_all || dep1.exec_all; return dep; } dependency shadow(const dependency &dep0, const dependency &dep1) { if (dep0.ordered == TGL_REGDIST_SRC && is_valid(dep1) && !(dep1.unordered & TGL_SBID_DST) && !(dep1.ordered & TGL_REGDIST_DST)) { dependency dep = dep1; dep.ordered |= dep0.ordered; for (unsigned p = 0; p < IDX(TGL_PIPE_ALL); p++) dep.jp.jp[p] = MAX2(dep.jp.jp[p], dep0.jp.jp[p]); return dep; } else { return is_valid(dep1) ? dep1 : dep0; } } dependency transport(dependency dep, int delta[IDX(TGL_PIPE_ALL)]) { if (dep.ordered) { for (unsigned p = 0; p < IDX(TGL_PIPE_ALL); p++) { if (dep.jp.jp[p] > INT_MIN) dep.jp.jp[p] += delta[p]; } } return dep; } dependency dependency_for_read(dependency dep) { dep.ordered &= TGL_REGDIST_DST; return dep; } dependency dependency_for_write(const struct intel_device_info *devinfo, const fs_inst *inst, dependency dep) { if (!is_unordered(inst) && is_single_pipe(dep.jp, inferred_exec_pipe(devinfo, inst))) dep.ordered &= TGL_REGDIST_DST; return dep; } class scoreboard { public: dependency get(const fs_reg &r) const { if (const dependency *p = const_cast<scoreboard *>(this)->dep(r)) return *p; else return dependency(); } void set(const fs_reg &r, const dependency &d) { if (dependency *p = dep(r)) *p = d; } friend scoreboard merge(equivalence_relation &eq, const scoreboard &sb0, const scoreboard &sb1) { scoreboard sb; for (unsigned i = 0; i < ARRAY_SIZE(sb.grf_deps); i++) sb.grf_deps[i] = merge(eq, sb0.grf_deps[i], sb1.grf_deps[i]); sb.addr_dep = merge(eq, sb0.addr_dep, sb1.addr_dep); sb.accum_dep = merge(eq, sb0.accum_dep, sb1.accum_dep); return sb; } friend scoreboard shadow(const scoreboard &sb0, const scoreboard &sb1) { scoreboard sb; for (unsigned i = 0; i < ARRAY_SIZE(sb.grf_deps); i++) sb.grf_deps[i] = shadow(sb0.grf_deps[i], sb1.grf_deps[i]); sb.addr_dep = shadow(sb0.addr_dep, sb1.addr_dep); sb.accum_dep = shadow(sb0.accum_dep, sb1.accum_dep); return sb; } friend scoreboard transport(const scoreboard &sb0, int delta[IDX(TGL_PIPE_ALL)]) { scoreboard sb; for (unsigned i = 0; i < ARRAY_SIZE(sb.grf_deps); i++) sb.grf_deps[i] = transport(sb0.grf_deps[i], delta); sb.addr_dep = transport(sb0.addr_dep, delta); sb.accum_dep = transport(sb0.accum_dep, delta); return sb; } friend bool operator==(const scoreboard &sb0, const scoreboard &sb1) { for (unsigned i = 0; i < ARRAY_SIZE(sb0.grf_deps); i++) { if (sb0.grf_deps[i] != sb1.grf_deps[i]) return false; } if (sb0.addr_dep != sb1.addr_dep) return false; if (sb0.accum_dep != sb1.accum_dep) return false; return true; } friend bool operator!=(const scoreboard &sb0, const scoreboard &sb1) { return !(sb0 == sb1); } private: dependency grf_deps[BRW_MAX_GRF]; dependency addr_dep; dependency accum_dep; dependency * dep(const fs_reg &r) { const unsigned reg = (r.file == VGRF ? r.nr + r.offset / REG_SIZE : reg_offset(r) / REG_SIZE); return (r.file == VGRF || r.file == FIXED_GRF ? &grf_deps[reg] : r.file == MRF ? &grf_deps[GFX7_MRF_HACK_START + reg] : r.file == ARF && reg >= BRW_ARF_ADDRESS && reg < BRW_ARF_ACCUMULATOR ? &addr_dep : r.file == ARF && reg >= BRW_ARF_ACCUMULATOR && reg < BRW_ARF_FLAG ? &accum_dep : NULL); } }; struct dependency_list { dependency_list() : deps(NULL), n(0) {} ~dependency_list() { free(deps); } void push_back(const dependency &dep) { deps = (dependency *)realloc(deps, (n + 1) * sizeof(*deps)); deps[n++] = dep; } unsigned size() const { return n; } const dependency & operator[](unsigned i) const { assert(i < n); return deps[i]; } dependency & operator[](unsigned i) { assert(i < n); return deps[i]; } private: dependency_list(const dependency_list &); dependency_list & operator=(const dependency_list &); dependency *deps; unsigned n; }; void add_dependency(const unsigned *ids, dependency_list &deps, dependency dep) { if (is_valid(dep)) { if (dep.unordered) dep.id = ids[dep.id]; for (unsigned i = 0; i < deps.size(); i++) { if (deps[i].exec_all != dep.exec_all && (!deps[i].exec_all || (dep.unordered & TGL_SBID_SET)) && (!dep.exec_all || (deps[i].unordered & TGL_SBID_SET))) continue; if (dep.ordered && deps[i].ordered) { for (unsigned p = 0; p < IDX(TGL_PIPE_ALL); p++) deps[i].jp.jp[p] = MAX2(deps[i].jp.jp[p], dep.jp.jp[p]); deps[i].ordered |= dep.ordered; deps[i].exec_all |= dep.exec_all; dep.ordered = TGL_REGDIST_NULL; } if (dep.unordered && deps[i].unordered && deps[i].id == dep.id) { deps[i].unordered |= dep.unordered; deps[i].exec_all |= dep.exec_all; dep.unordered = TGL_SBID_NULL; } } if (is_valid(dep)) deps.push_back(dep); } } tgl_swsb ordered_dependency_swsb(const dependency_list &deps, const ordered_address &jp, bool exec_all) { tgl_pipe p = TGL_PIPE_NONE; unsigned min_dist = ~0u; for (unsigned i = 0; i < deps.size(); i++) { if (deps[i].ordered && exec_all >= deps[i].exec_all) { for (unsigned q = 0; q < IDX(TGL_PIPE_ALL); q++) { const unsigned dist = jp.jp[q] - int64_t(deps[i].jp.jp[q]); const unsigned max_dist = (q == IDX(TGL_PIPE_LONG) ? 14 : 10); assert(jp.jp[q] > deps[i].jp.jp[q]); if (dist <= max_dist) { p = (p && IDX(p) != q ? TGL_PIPE_ALL : tgl_pipe(TGL_PIPE_FLOAT + q)); min_dist = MIN3(min_dist, dist, 7); } } } } return { p ? min_dist : 0, p }; } bool find_ordered_dependency(const dependency_list &deps, const ordered_address &jp, bool exec_all) { return ordered_dependency_swsb(deps, jp, exec_all).regdist; } tgl_sbid_mode find_unordered_dependency(const dependency_list &deps, tgl_sbid_mode unordered, bool exec_all) { if (unordered) { for (unsigned i = 0; i < deps.size(); i++) { if ((unordered & deps[i].unordered) && exec_all >= deps[i].exec_all) return deps[i].unordered; } } return TGL_SBID_NULL; } tgl_sbid_mode baked_unordered_dependency_mode(const struct intel_device_info *devinfo, const fs_inst *inst, const dependency_list &deps, const ordered_address &jp) { const bool exec_all = inst->force_writemask_all; const bool has_ordered = find_ordered_dependency(deps, jp, exec_all); const tgl_pipe ordered_pipe = ordered_dependency_swsb(deps, jp, exec_all).pipe; if (find_unordered_dependency(deps, TGL_SBID_SET, exec_all)) return find_unordered_dependency(deps, TGL_SBID_SET, exec_all); else if (has_ordered && is_unordered(inst)) return TGL_SBID_NULL; else if (find_unordered_dependency(deps, TGL_SBID_DST, exec_all) && (!has_ordered || ordered_pipe == inferred_sync_pipe(devinfo, inst))) return find_unordered_dependency(deps, TGL_SBID_DST, exec_all); else if (!has_ordered) return find_unordered_dependency(deps, TGL_SBID_SRC, exec_all); else return TGL_SBID_NULL; } bool baked_ordered_dependency_mode(const struct intel_device_info *devinfo, const fs_inst *inst, const dependency_list &deps, const ordered_address &jp) { const bool exec_all = inst->force_writemask_all; const bool has_ordered = find_ordered_dependency(deps, jp, exec_all); const tgl_pipe ordered_pipe = ordered_dependency_swsb(deps, jp, exec_all).pipe; const tgl_sbid_mode unordered_mode = baked_unordered_dependency_mode(devinfo, inst, deps, jp); if (!has_ordered) return false; else if (!unordered_mode) return true; else return ordered_pipe == inferred_sync_pipe(devinfo, inst) && unordered_mode == (is_unordered(inst) ? TGL_SBID_SET : TGL_SBID_DST); } void update_inst_scoreboard(const fs_visitor *shader, const ordered_address *jps, const fs_inst *inst, unsigned ip, scoreboard &sb) { const bool exec_all = inst->force_writemask_all; const struct intel_device_info *devinfo = shader->devinfo; const tgl_pipe p = inferred_exec_pipe(devinfo, inst); const ordered_address jp = p ? ordered_address(p, jps[ip].jp[IDX(p)]) : ordered_address(); const bool is_ordered = ordered_unit(devinfo, inst, IDX(TGL_PIPE_ALL)); for (unsigned i = 0; i < inst->sources; i++) { const dependency rd_dep = (inst->is_payload(i) || inst->is_math()) ? dependency(TGL_SBID_SRC, ip, exec_all) : is_ordered ? dependency(TGL_REGDIST_SRC, jp, exec_all) : dependency::done; for (unsigned j = 0; j < regs_read(inst, i); j++) { const fs_reg r = byte_offset(inst->src[i], REG_SIZE * j); sb.set(r, shadow(sb.get(r), rd_dep)); } } if (inst->reads_accumulator_implicitly()) sb.set(brw_acc_reg(8), dependency(TGL_REGDIST_SRC, jp, exec_all)); if (is_send(inst) && inst->base_mrf != -1) { const dependency rd_dep = dependency(TGL_SBID_SRC, ip, exec_all); for (unsigned j = 0; j < inst->mlen; j++) sb.set(brw_uvec_mrf(8, inst->base_mrf + j, 0), rd_dep); } const dependency wr_dep = is_unordered(inst) ? dependency(TGL_SBID_DST, ip, exec_all) : is_ordered ? dependency(TGL_REGDIST_DST, jp, exec_all) : dependency(); if (inst->writes_accumulator_implicitly(devinfo)) sb.set(brw_acc_reg(8), wr_dep); if (is_valid(wr_dep) && inst->dst.file != BAD_FILE && !inst->dst.is_null()) assign() argument
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H A Dtest_eu_validate.cpp1254 } inst[] = { in TEST_P() local
1317 } inst[] in TEST_P() local
1441 } inst[] = { TEST_P() local
1503 } inst[] = { TEST_P() local
1559 } inst[] = { TEST_P() local
1630 } inst[] = { TEST_P() local
1711 } inst[] = { TEST_P() local
1776 } inst[] = { TEST_P() local
1854 } inst[] = { TEST_P() local
1911 } inst[] = { TEST_P() local
1964 } inst[] = { TEST_P() local
2014 } inst[] = { TEST_P() local
2157 } inst[] = { TEST_P() local
2346 } inst[] = { TEST_P() local
2480 } inst[] = { TEST_P() local
2634 } inst[] = { TEST_P() local
2716 } inst[] = { TEST_P() local
2846 } inst[] = { TEST_P() local
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H A Dbrw_schedule_instructions.cpp71 backend_instruction *inst; member in schedule_node
763 is_src_duplicate(fs_inst *inst, int src) is_src_duplicate() argument
775 fs_inst *inst = (fs_inst *)be; count_reads_remaining() local
857 fs_inst *inst = (fs_inst *)be; update_register_pressure() local
883 fs_inst *inst = (fs_inst *)be; get_register_pressure_benefit() local
959 schedule_node(backend_instruction *inst, instruction_scheduler *sched) schedule_node() argument
1094 is_scheduling_barrier(const backend_instruction *inst) is_scheduling_barrier() argument
1135 is_compressed(const fs_inst *inst) is_compressed() argument
1163 fs_inst *inst = (fs_inst *)n->inst; calculate_deps() local
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/third_party/mesa3d/src/gallium/drivers/vc4/
H A Dvc4_qpu.c33 set_src_raddr(uint64_t inst, struct qpu_reg src) in set_src_raddr() argument
65 uint64_t inst = 0; qpu_NOP() local
83 uint64_t inst = 0; qpu_a_dst() local
100 uint64_t inst = 0; qpu_m_dst() local
117 uint64_t inst = 0; qpu_a_MOV() local
136 uint64_t inst = 0; qpu_m_MOV() local
155 uint64_t inst = 0; qpu_load_imm_ui() local
184 uint64_t inst = 0; qpu_branch() local
199 uint64_t inst = 0; qpu_a_alu2() local
220 uint64_t inst = 0; qpu_m_alu2() local
240 uint64_t inst = 0; qpu_m_rot() local
268 qpu_num_sf_accesses(uint64_t inst) qpu_num_sf_accesses() argument
405 convert_mov(uint64_t *inst) convert_mov() argument
445 writes_a_file(uint64_t inst) writes_a_file() argument
454 reads_r4(uint64_t inst) reads_r4() argument
636 qpu_set_sig(uint64_t inst, uint32_t sig) qpu_set_sig() argument
643 qpu_set_cond_add(uint64_t inst, uint32_t cond) qpu_set_cond_add() argument
650 qpu_set_cond_mul(uint64_t inst, uint32_t cond) qpu_set_cond_mul() argument
670 qpu_inst_is_tlb(uint64_t inst) qpu_inst_is_tlb() argument
731 qpu_serialize_one_inst(struct vc4_compile *c, uint64_t inst) qpu_serialize_one_inst() argument
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/third_party/mesa3d/src/mesa/state_tracker/
H A Dst_atifs_to_nir.c180 prepare_argument(struct st_translate *t, const struct atifs_instruction *inst, in prepare_argument() argument
224 emit_arith_inst(struct st_translate *t, const struct atifs_instruction *inst, bool alpha) emit_arith_inst() argument
394 compile_instruction(struct st_translate *t, const struct atifs_instruction *inst) compile_instruction() argument
478 struct atifs_instruction *inst = &atifs->Instructions[pass][i]; st_translate_atifs_program() local
576 struct atifs_instruction *inst = &atifs->Instructions[pass][i]; st_init_atifs_prog() local
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/third_party/node/deps/v8/src/regexp/experimental/
H A Dexperimental-interpreter.cc378 RegExpInstruction inst = bytecode_[t.pc]; in RunActiveThread() local
450 RegExpInstruction inst = bytecode_[t.pc]; in FlushBlockedThreads() local
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H A Dexperimental-compiler.cc258 RegExpInstruction& inst = code_[target.unbound_patch_list_begin_]; in Bind() local
/third_party/mesa3d/src/gallium/drivers/i915/
H A Di915_fpc_translate.c311 get_result_flags(const struct i915_full_instruction *inst) in get_result_flags() argument
398 emit_tex(struct i915_fp_compile *p, const struct i915_full_instruction *inst, in emit_tex() argument
425 emit_simple_arith(struct i915_fp_compile *p, const struct i915_full_instruction *inst, uint32_t opcode, uint32_t numArgs, struct i915_fragment_shader *fs) emit_simple_arith() argument
443 emit_simple_arith_swap2(struct i915_fp_compile *p, const struct i915_full_instruction *inst, uint32_t opcode, uint32_t numArgs, struct i915_fragment_shader *fs) emit_simple_arith_swap2() argument
471 i915_translate_instruction(struct i915_fp_compile *p, const struct i915_full_instruction *inst, struct i915_fragment_shader *fs) i915_translate_instruction() argument
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/third_party/mesa3d/src/gallium/auxiliary/draw/
H A Ddraw_pipe_aapoint.c333 aa_transform_inst(struct tgsi_transform_context *ctx, struct tgsi_full_instruction *inst) aa_transform_inst() argument
H A Ddraw_pipe_aaline.c197 struct tgsi_full_instruction inst; in aa_transform_epilog() local
248 aa_transform_inst(struct tgsi_transform_context *ctx, struct tgsi_full_instruction *inst) aa_transform_inst() argument
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/third_party/mesa3d/src/gallium/auxiliary/gallivm/
H A Dlp_bld_tgsi_aos.c222 lp_emit_store_aos( struct lp_build_tgsi_aos_context *bld, const struct tgsi_full_instruction *inst, unsigned index, LLVMValueRef value) lp_emit_store_aos() argument
305 emit_tex(struct lp_build_tgsi_aos_context *bld, const struct tgsi_full_instruction *inst, enum lp_build_tex_modifier modifier) emit_tex() argument
341 emit_sample(struct lp_build_tgsi_aos_context *bld, const struct tgsi_full_instruction *inst, enum lp_build_tex_modifier modifier) emit_sample() argument
429 lp_emit_instruction_aos( struct lp_build_tgsi_aos_context *bld, const struct tgsi_full_instruction *inst, const struct tgsi_opcode_info *info, int *pc) lp_emit_instruction_aos() argument
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/third_party/mesa3d/src/gallium/auxiliary/tgsi/
H A Dtgsi_dump.c685 tgsi_dump_instruction( const struct tgsi_full_instruction *inst, uint instno ) tgsi_dump_instruction() argument
808 tgsi_dump_instruction_str( const struct tgsi_full_instruction *inst, uint instno, char *str, size_t size) tgsi_dump_instruction_str() argument
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H A Dtgsi_transform.h298 struct tgsi_full_instruction inst; in tgsi_transform_op1_inst() local
325 struct tgsi_full_instruction inst; tgsi_transform_op2_inst() local
355 struct tgsi_full_instruction inst; tgsi_transform_op3_inst() local
383 struct tgsi_full_instruction inst; tgsi_transform_op1_swz_inst() local
428 struct tgsi_full_instruction inst; tgsi_transform_op2_swz_inst() local
482 struct tgsi_full_instruction inst; tgsi_transform_op3_swz_inst() local
531 struct tgsi_full_instruction inst; tgsi_transform_kill_inst() local
557 struct tgsi_full_instruction inst; tgsi_transform_tex_inst() local
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/third_party/mesa3d/src/gallium/drivers/etnaviv/
H A Detnaviv_compiler_nir.h333 emit_inst(struct etna_compile *c, struct etna_inst *inst) in emit_inst() argument
/third_party/mesa3d/src/gallium/drivers/r300/compiler/
H A Dr3xx_vertprog.c188 ei_vector1(struct r300_vertex_program_code *vp, unsigned int hw_opcode, struct rc_sub_instruction *vpi, unsigned int * inst) ei_vector1() argument
205 ei_vector2(struct r300_vertex_program_code *vp, unsigned int hw_opcode, struct rc_sub_instruction *vpi, unsigned int * inst) ei_vector2() argument
222 ei_math1(struct r300_vertex_program_code *vp, unsigned int hw_opcode, struct rc_sub_instruction *vpi, unsigned int * inst) ei_math1() argument
239 ei_lit(struct r300_vertex_program_code *vp, struct rc_sub_instruction *vpi, unsigned int * inst) ei_lit() argument
276 ei_mad(struct r300_vertex_program_code *vp, struct rc_sub_instruction *vpi, unsigned int * inst) ei_mad() argument
351 ei_pow(struct r300_vertex_program_code *vp, struct rc_sub_instruction *vpi, unsigned int * inst) ei_pow() argument
387 unsigned int *inst = compiler->code->body.d + compiler->code->length; translate_vertex_program() local
614 struct rc_instruction *inst; allocate_temporary_registers() local
695 transform_nonnative_modifiers( struct radeon_compiler *c, struct rc_instruction *inst, void* unused) transform_nonnative_modifiers() argument
735 transform_source_conflicts( struct radeon_compiler *c, struct rc_instruction* inst, void* unused) transform_source_conflicts() argument
790 struct rc_instruction * inst = rc_insert_new_instruction(&compiler->Base, compiler->Base.Program.Instructions.Prev); rc_vs_add_artificial_outputs() local
819 struct rc_instruction *inst, *add; transform_negative_addressing() local
851 struct rc_instruction *inst, *lastARL = NULL; rc_emulate_negative_addressing() local
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H A Dradeon_variable.c139 struct rc_instruction * inst; in rc_variable_compute_live_intervals() local
293 get_variable_pair_helper( struct rc_list ** variable_list, struct radeon_compiler * c, struct rc_instruction * inst, struct rc_pair_sub_instruction * sub_inst) get_variable_pair_helper() argument
363 struct rc_instruction * inst; rc_get_variables() local
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/third_party/mesa3d/src/gallium/drivers/r300/compiler/tests/
H A Drc_test_helpers.c135 init_rc_normal_src( struct rc_instruction * inst, unsigned int src_index, const char * src_str) init_rc_normal_src() argument
265 init_rc_normal_dst( struct rc_instruction * inst, const char * dst_str) init_rc_normal_dst() argument
370 parse_rc_normal_instruction( struct rc_instruction * inst, const char * inst_str) parse_rc_normal_instruction() argument
449 init_rc_normal_instruction( struct rc_instruction * inst, const char * inst_str) init_rc_normal_instruction() argument
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/third_party/pcre2/pcre2/src/sljit/
H A DsljitNativeX86_32.c35 sljit_u8 *inst; in emit_do_imm() local
52 sljit_u8 *inst; in emit_x86_instruction() local
269 sljit_u8 *inst; sljit_emit_enter() local
536 sljit_u8 *inst; emit_stack_frame_release() local
581 sljit_u8 *inst; sljit_emit_return_void() local
664 sljit_u8 *inst; call_with_args() local
714 sljit_u8 *inst; post_call_with_args() local
745 sljit_u8* inst; tail_call_with_args() local
952 sljit_u8 *inst; emit_tail_call_end() local
1120 sljit_u8* inst; emit_fmov_before_return() local
1147 sljit_u8 *inst; sljit_emit_fast_enter() local
1174 sljit_u8 *inst; emit_fast_return() local
1208 sljit_u8* inst; sljit_emit_mem() local
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H A DsljitNativeX86_64.c35 sljit_u8 *inst; in emit_load_imm64() local
48 sljit_u8 *inst; in emit_do_imm32() local
67 sljit_u8 *inst; emit_x86_instruction() local
386 sljit_u8 *inst; sljit_emit_enter() local
586 sljit_u8 *inst; emit_stack_frame_release() local
659 sljit_u8 *inst; sljit_emit_return_void() local
868 sljit_u8 *inst; sljit_emit_fast_enter() local
901 sljit_u8 *inst; emit_fast_return() local
945 sljit_u8* inst; sljit_emit_mem() local
1025 sljit_u8* inst; emit_mov_int() local
[all...]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MC/
H A DMCWin64EH.cpp61 EmitUnwindCode(MCStreamer &streamer, const MCSymbol *begin, WinEH::Instruction &inst) EmitUnwindCode() argument
197 WinEH::Instruction inst = info->Instructions.back(); EmitUnwindInfo() local
332 ARM64EmitUnwindCode(MCStreamer &streamer, const MCSymbol *begin, WinEH::Instruction &inst) ARM64EmitUnwindCode() argument
619 WinEH::Instruction inst = info->Instructions.back(); ARM64EmitUnwindInfo() local
628 WinEH::Instruction inst = EpilogInstrs[i]; ARM64EmitUnwindInfo() local
[all...]
/third_party/skia/third_party/externals/spirv-tools/source/val/
H A Dvalidate_composites.cpp35 GetExtractInsertValueType(ValidationState_t& _, const Instruction* inst, uint32_t* member_type) GetExtractInsertValueType() argument
140 ValidateVectorExtractDynamic(ValidationState_t& _, const Instruction* inst) ValidateVectorExtractDynamic() argument
175 ValidateVectorInsertDyanmic(ValidationState_t& _, const Instruction* inst) ValidateVectorInsertDyanmic() argument
211 ValidateCompositeConstruct(ValidationState_t& _, const Instruction* inst) ValidateCompositeConstruct() argument
373 ValidateCompositeExtract(ValidationState_t& _, const Instruction* inst) ValidateCompositeExtract() argument
398 ValidateCompositeInsert(ValidationState_t& _, const Instruction* inst) ValidateCompositeInsert() argument
433 ValidateCopyObject(ValidationState_t& _, const Instruction* inst) ValidateCopyObject() argument
447 ValidateTranspose(ValidationState_t& _, const Instruction* inst) ValidateTranspose() argument
491 ValidateVectorShuffle(ValidationState_t& _, const Instruction* inst) ValidateVectorShuffle() argument
560 ValidateCopyLogical(ValidationState_t& _, const Instruction* inst) ValidateCopyLogical() argument
587 CompositesPass(ValidationState_t& _, const Instruction* inst) CompositesPass() argument
[all...]

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