| /third_party/mesa3d/src/gallium/drivers/r300/compiler/ |
| H A D | radeon_dataflow_swizzles.c | 101 float imms[4] = {0.0f, 0.0f, 0.0f, 0.0f}; in try_rewrite_constant() local
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| /third_party/mesa3d/src/asahi/compiler/ |
| H A D | agx_opcodes.py | 164 imms = [IMM]) variable
234 imms = [NEST, FCOND if is_float else ICOND, INVERT_COND] global() variable
[all...] |
| /third_party/mesa3d/src/nouveau/codegen/ |
| H A D | nv50_ir_build_util.h | 198 ImmediateValue *imms[NV50_IR_BUILD_IMM_HT_SIZE]; member in nv50_ir::BuildUtil
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| /third_party/mesa3d/src/gallium/auxiliary/translate/ |
| H A D | translate_sse.c | 489 unsigned imms[2] = { 0, 0x3f800000 }; in translate_attr_convert() local
770 unsigned imms[2] = { 0, 1 }; in translate_attr_convert() local
[all...] |
| /third_party/mesa3d/src/gallium/frontends/d3d10umd/ |
| H A D | ShaderTGSI.c | 213 struct ureg_src imms; member
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64AddressingModes.h | 297 unsigned imms = val & 0x3f; in decodeLogicalImmediate() local
325 unsigned imms = val & 0x3f; isValidDecodeLogicalImmediate() local
[all...] |
| H A D | AArch64InstPrinter.cpp | 122 int64_t imms = Op3.getImm(); in printInst() local
[all...] |
| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | assembler-arm64-inl.h | 915 Instr Assembler::ImmS(unsigned imms, unsigned reg_size) { in ImmS() argument
930 Instr Assembler::ImmSetBits(unsigned imms, unsigned reg_size) { in ImmSetBits() argument
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| H A D | assembler-arm64.cc | 982 bfm(const Register& rd, const Register& rn, int immr, int imms) bfm() argument
990 sbfm(const Register& rd, const Register& rn, int immr, int imms) sbfm() argument
998 ubfm(const Register& rd, const Register& rn, int immr, int imms) ubfm() argument
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| /third_party/node/deps/v8/src/wasm/baseline/s390/ |
| H A D | liftoff-assembler-s390.h | 2820 emit_s128_const(LiftoffRegister dst, const uint8_t imms[16]) emit_s128_const() argument
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| /third_party/node/deps/v8/src/compiler/backend/x64/ |
| H A D | code-generator-x64.cc | 1102 void SetupSimdImmediateInRegister(TurboAssembler* assembler, uint32_t* imms, in SetupSimdImmediateInRegister() argument
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| H A D | instruction-selector-x64.cc | 3625 uint32_t imms[kMaxImms]; in VisitI8x16Shuffle() local
3800 auto imms = m.ResolvedValue().immediate(); VisitI8x16Swizzle() local
[all...] |
| /third_party/mesa3d/src/gallium/auxiliary/gallivm/ |
| H A D | lp_bld_tgsi_soa.c | 2994 LLVMValueRef imms[4]; in lp_emit_immediate_soa() local
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| /third_party/node/deps/v8/src/wasm/baseline/ppc/ |
| H A D | liftoff-assembler-ppc.h | 2701 emit_s128_const(LiftoffRegister dst, const uint8_t imms[16]) emit_s128_const() argument
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| /third_party/node/deps/v8/src/compiler/backend/arm64/ |
| H A D | instruction-selector-arm64.cc | 3950 auto imms = m.ResolvedValue().immediate(); in isSimdZero() local
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| /third_party/node/deps/v8/src/compiler/backend/ia32/ |
| H A D | instruction-selector-ia32.cc | 2879 uint32_t imms[kMaxImms]; in VisitI8x16Shuffle() local
3036 auto imms = m.ResolvedValue().immediate(); VisitI8x16Swizzle() local
[all...] |
| /third_party/node/deps/v8/src/wasm/baseline/ia32/ |
| H A D | liftoff-assembler-ia32.h | 2865 uint32_t imms[4]; in emit_i8x16_shuffle() local
3243 emit_s128_const(LiftoffRegister dst, const uint8_t imms[16]) emit_s128_const() argument
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| /third_party/node/deps/v8/src/wasm/baseline/arm64/ |
| H A D | liftoff-assembler-arm64.h | 2543 int64_t imms[2] = {0, 0}; in emit_i8x16_shuffle() local
[all...] |
| /third_party/mesa3d/src/gallium/auxiliary/tgsi/ |
| H A D | tgsi_exec.c | 1152 float4 *imms = REALLOC(mach->Imms, mach->ImmsReserved, newReserved * sizeof(float4)); in tgsi_exec_machine_bind_shader() local
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| /third_party/vixl/src/aarch64/ |
| H A D | assembler-aarch64.cc | 680 bfm(const Register& rd, const Register& rn, unsigned immr, unsigned imms) bfm() argument
691 sbfm(const Register& rd, const Register& rn, unsigned immr, unsigned imms) sbfm() argument
702 ubfm(const Register& rd, const Register& rn, unsigned immr, unsigned imms) ubfm() argument
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| /third_party/node/deps/v8/src/wasm/baseline/mips/ |
| H A D | liftoff-assembler-mips.h | 2047 emit_s128_const(LiftoffRegister dst, const uint8_t imms[16]) emit_s128_const() argument
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| /third_party/node/deps/v8/src/wasm/baseline/loong64/ |
| H A D | liftoff-assembler-loong64.h | 2032 emit_s128_const(LiftoffRegister dst, const uint8_t imms[16]) emit_s128_const() argument
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| /third_party/node/deps/v8/src/codegen/riscv64/ |
| H A D | macro-assembler-riscv64.cc | 3977 void TurboAssembler::WasmRvvS128const(VRegister dst, const uint8_t imms[16]) { in WasmRvvS128const() argument
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| /third_party/node/deps/v8/src/execution/arm/ |
| H A D | simulator-arm.cc | 4105 uint8_t imms[kSimd128Size]; in VmovImmediate() local
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| /third_party/node/deps/v8/src/wasm/baseline/x64/ |
| H A D | liftoff-assembler-x64.h | 2474 uint32_t imms[4]; in emit_i8x16_shuffle() local
2839 emit_s128_const(LiftoffRegister dst, const uint8_t imms[16]) emit_s128_const() argument
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