| /third_party/node/deps/v8/src/codegen/ia32/ |
| H A D | assembler-ia32.cc | 903 void Assembler::cmpb(Operand op, Immediate imm8) { in cmpb() argument
1137 void Assembler::rcl(Register dst, uint8_t imm8) { in rcl() argument
1150 void Assembler::rcr(Register dst, uint8_t imm8) { in rcr() argument
1163 rol(Operand dst, uint8_t imm8) rol() argument
1182 ror(Operand dst, uint8_t imm8) ror() argument
1201 sar(Operand dst, uint8_t imm8) sar() argument
1242 shl(Operand dst, uint8_t imm8) shl() argument
1261 shr(Operand dst, uint8_t imm8) shr() argument
1366 test_b(Register reg, Immediate imm8) test_b() argument
1384 test_b(Operand op, Immediate imm8) test_b() argument
2385 shufps(XMMRegister dst, XMMRegister src, byte imm8) shufps() argument
2394 shufpd(XMMRegister dst, XMMRegister src, byte imm8) shufpd() argument
2552 extractps(Operand dst, XMMRegister src, byte imm8) extractps() argument
2564 extractps(Register dst, XMMRegister src, byte imm8) extractps() argument
2877 vshufpd(XMMRegister dst, XMMRegister src1, Operand src2, byte imm8) vshufpd() argument
2920 vshufps(XMMRegister dst, XMMRegister src1, Operand src2, byte imm8) vshufps() argument
2927 vpsllw(XMMRegister dst, XMMRegister src, uint8_t imm8) vpsllw() argument
2933 vpslld(XMMRegister dst, XMMRegister src, uint8_t imm8) vpslld() argument
2939 vpsllq(XMMRegister dst, XMMRegister src, uint8_t imm8) vpsllq() argument
2945 vpsrlw(XMMRegister dst, XMMRegister src, uint8_t imm8) vpsrlw() argument
2951 vpsrld(XMMRegister dst, XMMRegister src, uint8_t imm8) vpsrld() argument
2957 vpsrlq(XMMRegister dst, XMMRegister src, uint8_t imm8) vpsrlq() argument
2963 vpsraw(XMMRegister dst, XMMRegister src, uint8_t imm8) vpsraw() argument
2969 vpsrad(XMMRegister dst, XMMRegister src, uint8_t imm8) vpsrad() argument
3102 vextractps(Operand dst, XMMRegister src, byte imm8) vextractps() argument
3155 rorx(Register dst, Operand src, byte imm8) rorx() argument
3327 emit_arith_b(int op1, int op2, Register dst, int imm8) emit_arith_b() argument
[all...] |
| /third_party/node/deps/v8/src/codegen/x64/ |
| H A D | assembler-x64.cc | 883 void Assembler::btsq(Register dst, Immediate imm8) { in btsq() argument
892 void Assembler::btrq(Register dst, Immediate imm8) { in btrq() argument
1132 void Assembler::cmpb_al(Immediate imm8) { in cmpb_al() argument
2843 void Assembler::pinsrw(XMMRegister dst, Register src, uint8_t imm8) { in pinsrw() argument
2853 pinsrw(XMMRegister dst, Operand src, uint8_t imm8) pinsrw() argument
2863 pextrq(Register dst, XMMRegister src, int8_t imm8) pextrq() argument
2875 pinsrq(XMMRegister dst, Register src, uint8_t imm8) pinsrq() argument
2887 pinsrq(XMMRegister dst, Operand src, uint8_t imm8) pinsrq() argument
2899 pinsrd(XMMRegister dst, Register src, uint8_t imm8) pinsrd() argument
2903 pinsrd(XMMRegister dst, Operand src, uint8_t imm8) pinsrd() argument
2908 pinsrb(XMMRegister dst, Register src, uint8_t imm8) pinsrb() argument
2912 pinsrb(XMMRegister dst, Operand src, uint8_t imm8) pinsrb() argument
2917 insertps(XMMRegister dst, XMMRegister src, byte imm8) insertps() argument
2923 insertps(XMMRegister dst, Operand src, byte imm8) insertps() argument
2985 shufps(XMMRegister dst, XMMRegister src, byte imm8) shufps() argument
3790 vps(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2, byte imm8) vps() argument
3800 vps(byte op, YMMRegister dst, YMMRegister src1, YMMRegister src2, byte imm8) vps() argument
4062 rorxq(Register dst, Register src, byte imm8) rorxq() argument
4073 rorxq(Register dst, Operand src, byte imm8) rorxq() argument
4084 rorxl(Register dst, Register src, byte imm8) rorxl() argument
4095 rorxl(Register dst, Operand src, byte imm8) rorxl() argument
4205 sse4_instr(XMMRegister dst, Register src, byte prefix, byte escape1, byte escape2, byte opcode, int8_t imm8) sse4_instr() argument
4244 sse4_instr(Register dst, XMMRegister src, byte prefix, byte escape1, byte escape2, byte opcode, int8_t imm8) sse4_instr() argument
4259 sse4_instr(Operand dst, XMMRegister src, byte prefix, byte escape1, byte escape2, byte opcode, int8_t imm8) sse4_instr() argument
[all...] |
| H A D | macro-assembler-x64.cc | 892 void TurboAssembler::Pextrq(Register dst, XMMRegister src, int8_t imm8) { in CallRecordWriteStub() argument
2094 void TurboAssembler::PinsrdPreSse41(XMMRegister dst, Register src, uint8_t imm8, in CallRecordWriteStub() argument
2068 PextrdPreSse41(Register dst, XMMRegister src, uint8_t imm8) CallRecordWriteStub() argument
2081 PinsrdPreSse41Helper(TurboAssembler* tasm, XMMRegister dst, Op src, uint8_t imm8, uint32_t* load_pc_offset) CallRecordWriteStub() argument
2099 PinsrdPreSse41(XMMRegister dst, Operand src, uint8_t imm8, uint32_t* load_pc_offset) CallRecordWriteStub() argument
2104 Pinsrq(XMMRegister dst, XMMRegister src1, Register src2, uint8_t imm8, uint32_t* load_pc_offset) CallRecordWriteStub() argument
2110 Pinsrq(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t imm8, uint32_t* load_pc_offset) CallRecordWriteStub() argument
[all...] |
| /third_party/node/deps/v8/src/execution/ppc/ |
| H A D | simulator-ppc.cc | 4270 int8_t imm8 = instr->Bits(18, 11); in ExecuteGeneric() local
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 2310 unsigned imm8 = fieldFromInstruction(Insn, 0, 8); in DecodeHINTInstruction() local
|
| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.cc | 3194 void Assembler::orr(const VRegister& vd, const int imm8, const int left_shift) { in orr() argument
3208 void Assembler::bic(const VRegister& vd, const int imm8, const int left_shift) { in bic() argument
3217 int imm8 = 0; in movi() local
3249 void Assembler::mvni(const VRegister& vd, const int imm8, Shift shift, in mvni() argument
3820 NEONModifiedImmShiftLsl(const VRegister& vd, const int imm8, const int left_shift, NEONModifiedImmediateOp op) NEONModifiedImmShiftLsl() argument
3851 NEONModifiedImmShiftMsl(const VRegister& vd, const int imm8, const int shift_amount, NEONModifiedImmediateOp op) NEONModifiedImmShiftMsl() argument
[all...] |
| /third_party/node/deps/v8/src/codegen/mips64/ |
| H A D | assembler-mips64.cc | 1189 void Assembler::GenInstrMsaI8(SecondaryField operation, uint32_t imm8, in GenInstrMsaI8() argument
|
| /third_party/node/deps/v8/src/codegen/mips/ |
| H A D | assembler-mips.cc | 1260 void Assembler::GenInstrMsaI8(SecondaryField operation, uint32_t imm8, in GenInstrMsaI8() argument
|
| /third_party/node/deps/v8/src/codegen/arm/ |
| H A D | assembler-arm.cc | 1059 uint32_t imm8 = imm32 >> (half_trailing_zeros * 2); in FitsShifter() local
|
| /third_party/node/deps/v8/src/codegen/riscv64/ |
| H A D | assembler-riscv64.cc | 528 int32_t imm8 = ((imm & 0x20) >> 5) | ((imm & 0x6)) | ((imm & 0xc0) >> 3) | in SetCBranchOffset() local
|
| /third_party/vixl/src/aarch32/ |
| H A D | disasm-aarch32.cc | 22673 unsigned imm8 = (instr & 0xff); DecodeT32() local
22693 unsigned imm8 = (instr & 0xff); DecodeT32() local
22827 unsigned imm8 = (instr & 0xff); DecodeT32() local
22843 unsigned imm8 = (instr & 0xff); DecodeT32() local
22863 unsigned imm8 = (instr & 0xff); DecodeT32() local
22998 unsigned imm8 = (instr & 0xff); DecodeT32() local
23013 unsigned imm8 = (instr & 0xff); DecodeT32() local
23032 unsigned imm8 = (instr & 0xff); DecodeT32() local
23196 unsigned imm8 = (instr & 0xff); DecodeT32() local
23215 unsigned imm8 = (instr & 0xff); DecodeT32() local
64825 unsigned imm8 = (instr & 0xff); DecodeA32() local
64850 unsigned imm8 = (instr & 0xff); DecodeA32() local
65013 unsigned imm8 = (instr & 0xff); DecodeA32() local
65030 unsigned imm8 = (instr & 0xff); DecodeA32() local
65055 unsigned imm8 = (instr & 0xff); DecodeA32() local
65235 unsigned imm8 = (instr & 0xff); DecodeA32() local
65251 unsigned imm8 = (instr & 0xff); DecodeA32() local
65275 unsigned imm8 = (instr & 0xff); DecodeA32() local
65462 unsigned imm8 = (instr & 0xff); DecodeA32() local
65486 unsigned imm8 = (instr & 0xff); DecodeA32() local
[all...] |
| /third_party/vixl/src/aarch64/ |
| H A D | assembler-sve-aarch64.cc | 32 void Assembler::ResolveSVEImm8Shift(int* imm8, int* shift) { in ResolveSVEImm8Shift() argument
3558 cpy(const ZRegister& zd, const PRegister& pg, int imm8, int shift) cpy() argument
3591 SVEIntAddSubtractImmUnpredicatedHelper( SVEIntAddSubtractImm_UnpredicatedOp op, const ZRegister& zd, int imm8, int shift) SVEIntAddSubtractImmUnpredicatedHelper() argument
3614 add(const ZRegister& zd, const ZRegister& zn, int imm8, int shift) add() argument
3630 dup(const ZRegister& zd, int imm8, int shift) dup() argument
3656 mul(const ZRegister& zd, const ZRegister& zn, int imm8) mul() argument
3669 smax(const ZRegister& zd, const ZRegister& zn, int imm8) smax() argument
3682 smin(const ZRegister& zd, const ZRegister& zn, int imm8) smin() argument
3695 sqadd(const ZRegister& zd, const ZRegister& zn, int imm8, int shift) sqadd() argument
3711 sqsub(const ZRegister& zd, const ZRegister& zn, int imm8, int shift) sqsub() argument
3727 sub(const ZRegister& zd, const ZRegister& zn, int imm8, int shift) sub() argument
3743 subr(const ZRegister& zd, const ZRegister& zn, int imm8, int shift) subr() argument
3759 umax(const ZRegister& zd, const ZRegister& zn, int imm8) umax() argument
3772 umin(const ZRegister& zd, const ZRegister& zn, int imm8) umin() argument
3785 uqadd(const ZRegister& zd, const ZRegister& zn, int imm8, int shift) uqadd() argument
3801 uqsub(const ZRegister& zd, const ZRegister& zn, int imm8, int shift) uqsub() argument
6535 mov(const ZRegister& zd, const PRegister& pg, int imm8, int shift) mov() argument
6589 mov(const ZRegister& zd, int imm8, int shift) mov() argument
[all...] |
| H A D | disasm-aarch64.cc | 6633 int imm8 = 0; in Disassembler() local
6853 uint64_t imm8 = instr->GetImmNEONabcdefgh(); in Disassembler() local
6857 uint64_t imm8 = instr->GetImmNEONabcdefgh(); in Disassembler() local
[all...] |
| H A D | macro-assembler-aarch64.h | 3261 void Bic(const VRegister& vd, const int imm8, const int left_shift = 0) { in Bic() argument
3491 void Orr(const VRegister& vd, const int imm8, const int left_shift = 0) { in Orr() argument
3483 Mvni(const VRegister& vd, const int imm8, Shift shift = LSL, const int shift_amount = 0) Mvni() argument
|
| H A D | simulator-aarch64.cc | 8644 uint64_t imm8 = instr->GetImmNEONabcdefgh(); in Simulator() local
11765 int imm8 = instr->ExtractBits(12, 5); in Simulator() local
13514 uint64_t imm8 in Simulator() local
[all...] |