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Searched defs:fbits (Results 1 - 19 of 19) sorted by relevance

/third_party/skia/third_party/skcms/
H A Dskcms.cc86 float fbits = (1.0f * (1<<23)) * (x + 121.274057500f in exp2f_() local
/kernel/linux/linux-5.10/sound/usb/
H A Dpcm.c1142 u64 fbits; in hw_rule_format() local
/kernel/linux/linux-6.6/sound/usb/
H A Dpcm.c901 static int apply_hw_params_format_bits(struct snd_mask *fmt, u64 fbits) in apply_hw_params_format_bits() argument
927 u64 fbits; in hw_rule_format() local
/third_party/ffmpeg/libavcodec/
H A Dopus_silk.c164 int fbits; // fractional bits used for the gain in silk_is_lpc_stable() local
H A Dmlpenc.c68 uint8_t fbits[MAX_CHANNELS]; ///< fraction bits member
/kernel/linux/linux-5.10/drivers/scsi/lpfc/
H A Dlpfc_ct.c1086 uint8_t fbits; in lpfc_cmpl_ct_cmd_gff_id() local
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H A Dlpfc_hw.h175 uint8_t fbits[128]; member
187 uint8_t fbits; member
/kernel/linux/linux-6.6/drivers/scsi/lpfc/
H A Dlpfc_ct.c1363 uint8_t fbits; in lpfc_cmpl_ct_cmd_gff_id() local
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H A Dlpfc_hw.h175 uint8_t fbits[128]; member
187 uint8_t fbits; member
/third_party/node/deps/v8/src/codegen/arm64/
H A Dmacro-assembler-arm64-inl.h911 Scvtf(const VRegister& fd, const Register& rn, unsigned fbits) Scvtf() argument
991 Ucvtf(const VRegister& fd, const Register& rn, unsigned fbits) Ucvtf() argument
H A Dassembler-arm64.cc2816 void Assembler::scvtf(const VRegister& vd, const VRegister& vn, int fbits) { in scvtf() argument
2826 void Assembler::ucvtf(const VRegister& vd, const VRegister& vn, int fbits) { in ucvtf() argument
2836 void Assembler::scvtf(const VRegister& vd, const Register& rn, int fbits) { in scvtf() argument
2846 ucvtf(const VRegister& fd, const Register& rn, int fbits) ucvtf() argument
2967 fcvtzs(const Register& rd, const VRegister& vn, int fbits) fcvtzs() argument
2978 fcvtzs(const VRegister& vd, const VRegister& vn, int fbits) fcvtzs() argument
2988 fcvtzu(const Register& rd, const VRegister& vn, int fbits) fcvtzu() argument
2999 fcvtzu(const VRegister& vd, const VRegister& vn, int fbits) fcvtzu() argument
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/third_party/vixl/src/aarch64/
H A Dlogic-aarch64.cc87 double Simulator::FixedToDouble(int64_t src, int fbits, FPRounding round) { in FixedToDouble() argument
98 double Simulator::UFixedToDouble(uint64_t src, int fbits, FPRounding round) { in UFixedToDouble() argument
114 float Simulator::FixedToFloat(int64_t src, int fbits, FPRounding round) { in FixedToFloat() argument
125 UFixedToFloat(uint64_t src, int fbits, FPRounding round) UFixedToFloat() argument
141 FixedToFloat16(int64_t src, int fbits, FPRounding round) FixedToFloat16() argument
152 UFixedToFloat16(uint64_t src, int fbits, FPRounding round) UFixedToFloat16() argument
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H A Dsimulator-aarch64.cc6077 int fbits = 64 - instr->GetFPScale(); in Simulator() local
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/third_party/python/Objects/
H A Dfloatobject.c2181 unsigned int fbits; in PyFloat_Pack4() local
/third_party/node/deps/v8/src/execution/arm64/
H A Dsimulator-logic-arm64.cc41 double Simulator::FixedToDouble(int64_t src, int fbits, FPRounding round) { in FixedToDouble() argument
51 double Simulator::UFixedToDouble(uint64_t src, int fbits, FPRounding round) { in UFixedToDouble() argument
66 float Simulator::FixedToFloat(int64_t src, int fbits, FPRounding round) { in FixedToFloat() argument
76 UFixedToFloat(uint64_t src, int fbits, FPRounding round) UFixedToFloat() argument
3758 fcvts(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, FPRounding rounding_mode, int fbits) fcvts() argument
3777 fcvtu(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, FPRounding rounding_mode, int fbits) fcvtu() argument
4195 scvtf(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int fbits, FPRounding round) scvtf() argument
4211 ucvtf(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int fbits, FPRounding round) ucvtf() argument
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/third_party/vixl/src/aarch32/
H A Dassembler-aarch32.cc16310 vcvt(Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm, int32_t fbits) vcvt() argument
16414 vcvt(Condition cond, DataType dt1, DataType dt2, QRegister rd, QRegister rm, int32_t fbits) vcvt() argument
16450 vcvt(Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm, int32_t fbits) vcvt() argument
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H A Dassembler-aarch32.h4246 vcvt( DataType dt1, DataType dt2, DRegister rd, DRegister rm, int32_t fbits) vcvt() argument
4257 vcvt( DataType dt1, DataType dt2, QRegister rd, QRegister rm, int32_t fbits) vcvt() argument
4268 vcvt( DataType dt1, DataType dt2, SRegister rd, SRegister rm, int32_t fbits) vcvt() argument
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H A Ddisasm-aarch32.cc4423 vcvt(Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm, int32_t fbits) vcvt() argument
4434 vcvt(Condition cond, DataType dt1, DataType dt2, QRegister rd, QRegister rm, int32_t fbits) vcvt() argument
4445 vcvt(Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm, int32_t fbits) vcvt() argument
23878 uint32_t fbits = offset - (((instr >> 5) & 0x1) | DecodeT32() local
23886 fbits); DecodeT32() local
23956 uint32_t fbits = offset - (((instr >> 5) & 0x1) | DecodeT32() local
23964 fbits); DecodeT32() local
24224 uint32_t fbits = offset - (((instr >> 5) & 0x1) | DecodeT32() local
24232 fbits); DecodeT32() local
24302 uint32_t fbits = offset - (((instr >> 5) & 0x1) | DecodeT32() local
24310 fbits); DecodeT32() local
36096 uint32_t fbits = DecodeT32() local
36104 fbits); DecodeT32() local
38262 uint32_t fbits = DecodeT32() local
38270 fbits); DecodeT32() local
47736 uint32_t fbits = 64 - ((instr >> 16) & 0x3f); DecodeA32() local
49451 uint32_t fbits = 64 - ((instr >> 16) & 0x3f); DecodeA32() local
66523 uint32_t fbits = offset - (((instr >> 5) & 0x1) | DecodeA32() local
66626 uint32_t fbits = offset - (((instr >> 5) & 0x1) | DecodeA32() local
66971 uint32_t fbits = offset - (((instr >> 5) & 0x1) | DecodeA32() local
67074 uint32_t fbits = offset - (((instr >> 5) & 0x1) | DecodeA32() local
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H A Dmacro-assembler-aarch32.h7686 Vcvt(Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm, int32_t fbits) MacroAssembler() argument
7704 Vcvt( DataType dt1, DataType dt2, DRegister rd, DRegister rm, int32_t fbits) MacroAssembler() argument
7709 Vcvt(Condition cond, DataType dt1, DataType dt2, QRegister rd, QRegister rm, int32_t fbits) MacroAssembler() argument
7727 Vcvt( DataType dt1, DataType dt2, QRegister rd, QRegister rm, int32_t fbits) MacroAssembler() argument
7732 Vcvt(Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm, int32_t fbits) MacroAssembler() argument
7750 Vcvt( DataType dt1, DataType dt2, SRegister rd, SRegister rm, int32_t fbits) MacroAssembler() argument
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