| /third_party/node/deps/v8/src/wasm/baseline/ppc/ |
| H A D | liftoff-assembler-ppc.h | 269 void LiftoffAssembler::LoadInstanceFromFrame(Register dst) { in LoadInstanceFromFrame() argument 273 void LiftoffAssembler::LoadFromInstance(Register dst, Register instance, in LoadFromInstance() argument 291 void LiftoffAssembler::LoadTaggedPointerFromInstance(Register dst, in LoadTaggedPointerFromInstance() argument 303 void LiftoffAssembler::LoadTaggedPointer(Register dst, Register src_addr, in LoadTaggedPointer() argument 310 LoadFullPointer(Register dst, Register src_addr, int32_t offset_imm) LoadFullPointer() argument 349 Load(LiftoffRegister dst, Register src_addr, Register offset_reg, uintptr_t offset_imm, LoadType type, LiftoffRegList pinned, uint32_t* protected_load_pc, bool is_load_mem, bool i64_offset) Load() argument 507 AtomicLoad(LiftoffRegister dst, Register src_addr, Register offset_reg, uintptr_t offset_imm, LoadType type, LiftoffRegList pinned) AtomicLoad() argument 661 MemOperand dst = MemOperand(offset, dst_addr); AtomicExchange() local 727 MemOperand dst = MemOperand(offset, dst_addr); AtomicCompareExchange() local 797 LoadCallerFrameSlot(LiftoffRegister dst, uint32_t caller_slot_idx, ValueKind kind) LoadCallerFrameSlot() argument 873 LoadReturnStackSlot(LiftoffRegister dst, int offset, ValueKind kind) LoadReturnStackSlot() argument 941 Move(Register dst, Register src, ValueKind kind) Move() argument 945 Move(DoubleRegister dst, DoubleRegister src, ValueKind kind) Move() argument 1248 emit_f32_nearest_int(DoubleRegister dst, DoubleRegister src) emit_f32_nearest_int() argument 1253 emit_f64_nearest_int(DoubleRegister dst, DoubleRegister src) emit_f64_nearest_int() argument 1258 IncrementSmi(LiftoffRegister dst, int offset) IncrementSmi() argument 1275 emit_i32_divs(Register dst, Register lhs, Register rhs, Label* trap_div_by_zero, Label* trap_div_unrepresentable) emit_i32_divs() argument 1294 emit_i32_divu(Register dst, Register lhs, Register rhs, Label* trap_div_by_zero) emit_i32_divu() argument 1301 emit_i32_rems(Register dst, Register lhs, Register rhs, Label* trap_div_by_zero) emit_i32_rems() argument 1325 emit_i32_remu(Register dst, Register lhs, Register rhs, Label* trap_div_by_zero) emit_i32_remu() argument 1332 emit_i64_divs(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs, Label* trap_div_by_zero, Label* trap_div_unrepresentable) emit_i64_divs() argument 1353 emit_i64_divu(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs, Label* trap_div_by_zero) emit_i64_divu() argument 1363 emit_i64_rems(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs, Label* trap_div_by_zero) emit_i64_rems() argument 1392 emit_i64_remu(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs, Label* trap_div_by_zero) emit_i64_remu() argument 1401 emit_type_conversion(WasmOpcode opcode, LiftoffRegister dst, LiftoffRegister src, Label* trap) emit_type_conversion() argument 1659 emit_i32_eqz(Register dst, Register src) emit_i32_eqz() argument 1668 emit_i32_set_cond(LiftoffCondition liftoff_cond, Register dst, Register lhs, Register rhs) emit_i32_set_cond() argument 1684 emit_i64_eqz(Register dst, LiftoffRegister src) emit_i64_eqz() argument 1693 emit_i64_set_cond(LiftoffCondition liftoff_cond, Register dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i64_set_cond() argument 1709 emit_f32_set_cond(LiftoffCondition liftoff_cond, Register dst, DoubleRegister lhs, DoubleRegister rhs) emit_f32_set_cond() argument 1728 emit_f64_set_cond(LiftoffCondition liftoff_cond, Register dst, DoubleRegister lhs, DoubleRegister rhs) emit_f64_set_cond() argument 1734 emit_select(LiftoffRegister dst, Register condition, LiftoffRegister true_value, LiftoffRegister false_value, ValueKind kind) emit_select() argument 1741 LoadTransform(LiftoffRegister dst, Register src_addr, Register offset_reg, uintptr_t offset_imm, LoadType type, LoadTransformationKind transform, uint32_t* protected_load_pc) LoadTransform() argument 1756 LoadLane(LiftoffRegister dst, LiftoffRegister src, Register addr, Register offset_reg, uintptr_t offset_imm, LoadType type, uint8_t laneidx, uint32_t* protected_load_pc) LoadLane() argument 1763 StoreLane(Register dst, Register offset, uintptr_t offset_imm, LiftoffRegister src, StoreType type, uint8_t lane, uint32_t* protected_store_pc) StoreLane() argument 1770 emit_i8x16_swizzle(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i8x16_swizzle() argument 1776 emit_f64x2_splat(LiftoffRegister dst, LiftoffRegister src) emit_f64x2_splat() argument 1781 emit_f64x2_extract_lane(LiftoffRegister dst, LiftoffRegister lhs, uint8_t imm_lane_idx) emit_f64x2_extract_lane() argument 1787 emit_f64x2_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_f64x2_replace_lane() argument 1794 emit_f64x2_abs(LiftoffRegister dst, LiftoffRegister src) emit_f64x2_abs() argument 1799 emit_f64x2_neg(LiftoffRegister dst, LiftoffRegister src) emit_f64x2_neg() argument 1804 emit_f64x2_sqrt(LiftoffRegister dst, LiftoffRegister src) emit_f64x2_sqrt() argument 1809 emit_f64x2_ceil(LiftoffRegister dst, LiftoffRegister src) emit_f64x2_ceil() argument 1815 emit_f64x2_floor(LiftoffRegister dst, LiftoffRegister src) emit_f64x2_floor() argument 1821 emit_f64x2_trunc(LiftoffRegister dst, LiftoffRegister src) emit_f64x2_trunc() argument 1827 emit_f64x2_nearest_int(LiftoffRegister dst, LiftoffRegister src) emit_f64x2_nearest_int() argument 1833 emit_f64x2_add(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_f64x2_add() argument 1838 emit_f64x2_sub(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_f64x2_sub() argument 1843 emit_f64x2_mul(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_f64x2_mul() argument 1848 emit_f64x2_div(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_f64x2_div() argument 1853 emit_f64x2_min(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_f64x2_min() argument 1858 emit_f64x2_max(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_f64x2_max() argument 1863 emit_f64x2_pmin(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_f64x2_pmin() argument 1868 emit_f64x2_pmax(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_f64x2_pmax() argument 1873 emit_f64x2_convert_low_i32x4_s(LiftoffRegister dst, LiftoffRegister src) emit_f64x2_convert_low_i32x4_s() argument 1878 emit_f64x2_convert_low_i32x4_u(LiftoffRegister dst, LiftoffRegister src) emit_f64x2_convert_low_i32x4_u() argument 1883 emit_f64x2_promote_low_f32x4(LiftoffRegister dst, LiftoffRegister src) emit_f64x2_promote_low_f32x4() argument 1888 emit_f32x4_splat(LiftoffRegister dst, LiftoffRegister src) emit_f32x4_splat() argument 1893 emit_f32x4_extract_lane(LiftoffRegister dst, LiftoffRegister lhs, uint8_t imm_lane_idx) emit_f32x4_extract_lane() argument 1899 emit_f32x4_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_f32x4_replace_lane() argument 1906 emit_f32x4_abs(LiftoffRegister dst, LiftoffRegister src) emit_f32x4_abs() argument 1911 emit_f32x4_neg(LiftoffRegister dst, LiftoffRegister src) emit_f32x4_neg() argument 1916 emit_f32x4_sqrt(LiftoffRegister dst, LiftoffRegister src) emit_f32x4_sqrt() argument 1921 emit_f32x4_ceil(LiftoffRegister dst, LiftoffRegister src) emit_f32x4_ceil() argument 1927 emit_f32x4_floor(LiftoffRegister dst, LiftoffRegister src) emit_f32x4_floor() argument 1933 emit_f32x4_trunc(LiftoffRegister dst, LiftoffRegister src) emit_f32x4_trunc() argument 1939 emit_f32x4_nearest_int(LiftoffRegister dst, LiftoffRegister src) emit_f32x4_nearest_int() argument 1945 emit_f32x4_add(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_f32x4_add() argument 1950 emit_f32x4_sub(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_f32x4_sub() argument 1955 emit_f32x4_mul(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_f32x4_mul() argument 1960 emit_f32x4_div(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_f32x4_div() argument 1965 emit_f32x4_min(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_f32x4_min() argument 1970 emit_f32x4_max(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_f32x4_max() argument 1975 emit_f32x4_pmin(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_f32x4_pmin() argument 1980 emit_f32x4_pmax(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_f32x4_pmax() argument 1985 emit_i64x2_splat(LiftoffRegister dst, LiftoffRegister src) emit_i64x2_splat() argument 1990 emit_i64x2_extract_lane(LiftoffRegister dst, LiftoffRegister lhs, uint8_t imm_lane_idx) emit_i64x2_extract_lane() argument 1996 emit_i64x2_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i64x2_replace_lane() argument 2003 emit_i64x2_neg(LiftoffRegister dst, LiftoffRegister src) emit_i64x2_neg() argument 2008 emit_i64x2_alltrue(LiftoffRegister dst, LiftoffRegister src) emit_i64x2_alltrue() argument 2013 emit_i64x2_shl(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i64x2_shl() argument 2018 emit_i64x2_shli(LiftoffRegister dst, LiftoffRegister lhs, int32_t rhs) emit_i64x2_shli() argument 2023 emit_i64x2_shr_s(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i64x2_shr_s() argument 2029 emit_i64x2_shri_s(LiftoffRegister dst, LiftoffRegister lhs, int32_t rhs) emit_i64x2_shri_s() argument 2034 emit_i64x2_shr_u(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i64x2_shr_u() argument 2040 emit_i64x2_shri_u(LiftoffRegister dst, LiftoffRegister lhs, int32_t rhs) emit_i64x2_shri_u() argument 2045 emit_i64x2_add(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i64x2_add() argument 2050 emit_i64x2_sub(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i64x2_sub() argument 2055 emit_i64x2_mul(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i64x2_mul() argument 2060 emit_i64x2_extmul_low_i32x4_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i64x2_extmul_low_i32x4_s() argument 2066 emit_i64x2_extmul_low_i32x4_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i64x2_extmul_low_i32x4_u() argument 2072 emit_i64x2_extmul_high_i32x4_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i64x2_extmul_high_i32x4_s() argument 2078 emit_i64x2_bitmask(LiftoffRegister dst, LiftoffRegister src) emit_i64x2_bitmask() argument 2083 emit_i64x2_sconvert_i32x4_low(LiftoffRegister dst, LiftoffRegister src) emit_i64x2_sconvert_i32x4_low() argument 2088 emit_i64x2_sconvert_i32x4_high(LiftoffRegister dst, LiftoffRegister src) emit_i64x2_sconvert_i32x4_high() argument 2093 emit_i64x2_uconvert_i32x4_low(LiftoffRegister dst, LiftoffRegister src) emit_i64x2_uconvert_i32x4_low() argument 2098 emit_i64x2_uconvert_i32x4_high(LiftoffRegister dst, LiftoffRegister src) emit_i64x2_uconvert_i32x4_high() argument 2103 emit_i64x2_extmul_high_i32x4_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i64x2_extmul_high_i32x4_u() argument 2109 emit_i32x4_splat(LiftoffRegister dst, LiftoffRegister src) emit_i32x4_splat() argument 2114 emit_i32x4_extract_lane(LiftoffRegister dst, LiftoffRegister lhs, uint8_t imm_lane_idx) emit_i32x4_extract_lane() argument 2120 emit_i32x4_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i32x4_replace_lane() argument 2127 emit_i32x4_neg(LiftoffRegister dst, LiftoffRegister src) emit_i32x4_neg() argument 2132 emit_i32x4_alltrue(LiftoffRegister dst, LiftoffRegister src) emit_i32x4_alltrue() argument 2137 emit_i32x4_bitmask(LiftoffRegister dst, LiftoffRegister src) emit_i32x4_bitmask() argument 2142 emit_i32x4_shl(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i32x4_shl() argument 2147 emit_i32x4_shli(LiftoffRegister dst, LiftoffRegister lhs, int32_t rhs) emit_i32x4_shli() argument 2152 emit_i32x4_shr_s(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i32x4_shr_s() argument 2158 emit_i32x4_shri_s(LiftoffRegister dst, LiftoffRegister lhs, int32_t rhs) emit_i32x4_shri_s() argument 2163 emit_i32x4_shr_u(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i32x4_shr_u() argument 2169 emit_i32x4_shri_u(LiftoffRegister dst, LiftoffRegister lhs, int32_t rhs) emit_i32x4_shri_u() argument 2174 emit_i32x4_add(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i32x4_add() argument 2179 emit_i32x4_sub(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i32x4_sub() argument 2184 emit_i32x4_mul(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i32x4_mul() argument 2189 emit_i32x4_min_s(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i32x4_min_s() argument 2195 emit_i32x4_min_u(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i32x4_min_u() argument 2201 emit_i32x4_max_s(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i32x4_max_s() argument 2207 emit_i32x4_max_u(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i32x4_max_u() argument 2213 emit_i32x4_dot_i16x8_s(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i32x4_dot_i16x8_s() argument 2219 emit_i32x4_extadd_pairwise_i16x8_s(LiftoffRegister dst, LiftoffRegister src) emit_i32x4_extadd_pairwise_i16x8_s() argument 2224 emit_i32x4_extadd_pairwise_i16x8_u(LiftoffRegister dst, LiftoffRegister src) emit_i32x4_extadd_pairwise_i16x8_u() argument 2229 emit_i32x4_extmul_low_i16x8_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i32x4_extmul_low_i16x8_s() argument 2235 emit_i32x4_extmul_low_i16x8_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i32x4_extmul_low_i16x8_u() argument 2241 emit_i32x4_extmul_high_i16x8_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i32x4_extmul_high_i16x8_s() argument 2247 emit_i32x4_extmul_high_i16x8_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i32x4_extmul_high_i16x8_u() argument 2253 emit_i16x8_splat(LiftoffRegister dst, LiftoffRegister src) emit_i16x8_splat() argument 2258 emit_i16x8_neg(LiftoffRegister dst, LiftoffRegister src) emit_i16x8_neg() argument 2263 emit_i16x8_alltrue(LiftoffRegister dst, LiftoffRegister src) emit_i16x8_alltrue() argument 2268 emit_i16x8_bitmask(LiftoffRegister dst, LiftoffRegister src) emit_i16x8_bitmask() argument 2273 emit_i16x8_shl(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i16x8_shl() argument 2278 emit_i16x8_shli(LiftoffRegister dst, LiftoffRegister lhs, int32_t rhs) emit_i16x8_shli() argument 2283 emit_i16x8_shr_s(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i16x8_shr_s() argument 2289 emit_i16x8_shri_s(LiftoffRegister dst, LiftoffRegister lhs, int32_t rhs) emit_i16x8_shri_s() argument 2294 emit_i16x8_shr_u(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i16x8_shr_u() argument 2300 emit_i16x8_shri_u(LiftoffRegister dst, LiftoffRegister lhs, int32_t rhs) emit_i16x8_shri_u() argument 2305 emit_i16x8_add(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i16x8_add() argument 2310 emit_i16x8_add_sat_s(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i16x8_add_sat_s() argument 2316 emit_i16x8_sub(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i16x8_sub() argument 2321 emit_i16x8_sub_sat_s(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i16x8_sub_sat_s() argument 2327 emit_i16x8_sub_sat_u(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i16x8_sub_sat_u() argument 2333 emit_i16x8_mul(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i16x8_mul() argument 2338 emit_i16x8_add_sat_u(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i16x8_add_sat_u() argument 2344 emit_i16x8_min_s(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i16x8_min_s() argument 2350 emit_i16x8_min_u(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i16x8_min_u() argument 2356 emit_i16x8_max_s(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i16x8_max_s() argument 2362 emit_i16x8_max_u(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i16x8_max_u() argument 2368 emit_i16x8_extract_lane_u(LiftoffRegister dst, LiftoffRegister lhs, uint8_t imm_lane_idx) emit_i16x8_extract_lane_u() argument 2374 emit_i16x8_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i16x8_replace_lane() argument 2381 emit_i16x8_extadd_pairwise_i8x16_s(LiftoffRegister dst, LiftoffRegister src) emit_i16x8_extadd_pairwise_i8x16_s() argument 2386 emit_i16x8_extadd_pairwise_i8x16_u(LiftoffRegister dst, LiftoffRegister src) emit_i16x8_extadd_pairwise_i8x16_u() argument 2391 emit_i16x8_extract_lane_s(LiftoffRegister dst, LiftoffRegister lhs, uint8_t imm_lane_idx) emit_i16x8_extract_lane_s() argument 2397 emit_i16x8_extmul_low_i8x16_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i16x8_extmul_low_i8x16_s() argument 2403 emit_i16x8_extmul_low_i8x16_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i16x8_extmul_low_i8x16_u() argument 2409 emit_i16x8_extmul_high_i8x16_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i16x8_extmul_high_i8x16_s() argument 2415 emit_i16x8_q15mulr_sat_s(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i16x8_q15mulr_sat_s() argument 2421 emit_i16x8_extmul_high_i8x16_u(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2) emit_i16x8_extmul_high_i8x16_u() argument 2427 emit_i8x16_shuffle(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs, const uint8_t shuffle[16], bool is_swizzle) emit_i8x16_shuffle() argument 2435 emit_i8x16_popcnt(LiftoffRegister dst, LiftoffRegister src) emit_i8x16_popcnt() argument 2440 emit_i8x16_splat(LiftoffRegister dst, LiftoffRegister src) emit_i8x16_splat() argument 2445 emit_i8x16_extract_lane_u(LiftoffRegister dst, LiftoffRegister lhs, uint8_t imm_lane_idx) emit_i8x16_extract_lane_u() argument 2451 emit_i8x16_replace_lane(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, uint8_t imm_lane_idx) emit_i8x16_replace_lane() argument 2458 emit_i8x16_neg(LiftoffRegister dst, LiftoffRegister src) emit_i8x16_neg() argument 2463 emit_v128_anytrue(LiftoffRegister dst, LiftoffRegister src) emit_v128_anytrue() argument 2468 emit_i8x16_alltrue(LiftoffRegister dst, LiftoffRegister src) emit_i8x16_alltrue() argument 2473 emit_i8x16_bitmask(LiftoffRegister dst, LiftoffRegister src) emit_i8x16_bitmask() argument 2478 emit_i8x16_shl(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i8x16_shl() argument 2483 emit_i8x16_shli(LiftoffRegister dst, LiftoffRegister lhs, int32_t rhs) emit_i8x16_shli() argument 2488 emit_i8x16_shr_s(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i8x16_shr_s() argument 2494 emit_i8x16_shri_s(LiftoffRegister dst, LiftoffRegister lhs, int32_t rhs) emit_i8x16_shri_s() argument 2499 emit_i8x16_shr_u(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i8x16_shr_u() argument 2505 emit_i8x16_shri_u(LiftoffRegister dst, LiftoffRegister lhs, int32_t rhs) emit_i8x16_shri_u() argument 2510 emit_i8x16_extract_lane_s(LiftoffRegister dst, LiftoffRegister lhs, uint8_t imm_lane_idx) emit_i8x16_extract_lane_s() argument 2516 emit_i8x16_add(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i8x16_add() argument 2521 emit_i8x16_add_sat_s(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i8x16_add_sat_s() argument 2527 emit_i8x16_min_s(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i8x16_min_s() argument 2533 emit_i8x16_min_u(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i8x16_min_u() argument 2539 emit_i8x16_max_s(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i8x16_max_s() argument 2545 emit_i8x16_max_u(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i8x16_max_u() argument 2551 emit_i8x16_eq(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i8x16_eq() argument 2556 emit_i8x16_ne(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i8x16_ne() argument 2561 emit_i8x16_gt_s(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i8x16_gt_s() argument 2566 emit_i8x16_gt_u(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i8x16_gt_u() argument 2571 emit_i8x16_ge_s(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i8x16_ge_s() argument 2576 emit_i8x16_ge_u(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i8x16_ge_u() argument 2581 emit_i16x8_eq(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i16x8_eq() argument 2586 emit_i16x8_ne(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i16x8_ne() argument 2591 emit_i16x8_gt_s(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i16x8_gt_s() argument 2596 emit_i16x8_gt_u(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i16x8_gt_u() argument 2601 emit_i16x8_ge_s(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i16x8_ge_s() argument 2606 emit_i16x8_ge_u(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i16x8_ge_u() argument 2611 emit_i32x4_eq(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i32x4_eq() argument 2616 emit_i32x4_ne(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i32x4_ne() argument 2621 emit_i32x4_gt_s(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i32x4_gt_s() argument 2626 emit_i32x4_gt_u(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i32x4_gt_u() argument 2631 emit_i32x4_ge_s(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i32x4_ge_s() argument 2636 emit_i32x4_ge_u(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i32x4_ge_u() argument 2641 emit_i64x2_eq(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i64x2_eq() argument 2646 emit_i64x2_ne(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i64x2_ne() argument 2651 emit_i64x2_gt_s(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i64x2_gt_s() argument 2656 emit_i64x2_ge_s(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i64x2_ge_s() argument 2661 emit_f32x4_eq(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_f32x4_eq() argument 2666 emit_f32x4_ne(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_f32x4_ne() argument 2671 emit_f32x4_lt(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_f32x4_lt() argument 2676 emit_f32x4_le(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_f32x4_le() argument 2681 emit_f64x2_eq(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_f64x2_eq() argument 2686 emit_f64x2_ne(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_f64x2_ne() argument 2691 emit_f64x2_lt(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_f64x2_lt() argument 2696 emit_f64x2_le(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_f64x2_le() argument 2701 emit_s128_const(LiftoffRegister dst, const uint8_t imms[16]) emit_s128_const() argument 2706 emit_s128_not(LiftoffRegister dst, LiftoffRegister src) emit_s128_not() argument 2710 emit_s128_and(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_s128_and() argument 2715 emit_s128_or(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_s128_or() argument 2720 emit_s128_xor(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_s128_xor() argument 2725 emit_s128_select(LiftoffRegister dst, LiftoffRegister src1, LiftoffRegister src2, LiftoffRegister mask) emit_s128_select() argument 2732 emit_i32x4_sconvert_f32x4(LiftoffRegister dst, LiftoffRegister src) emit_i32x4_sconvert_f32x4() argument 2737 emit_i32x4_uconvert_f32x4(LiftoffRegister dst, LiftoffRegister src) emit_i32x4_uconvert_f32x4() argument 2742 emit_f32x4_sconvert_i32x4(LiftoffRegister dst, LiftoffRegister src) emit_f32x4_sconvert_i32x4() argument 2747 emit_f32x4_uconvert_i32x4(LiftoffRegister dst, LiftoffRegister src) emit_f32x4_uconvert_i32x4() argument 2752 emit_f32x4_demote_f64x2_zero(LiftoffRegister dst, LiftoffRegister src) emit_f32x4_demote_f64x2_zero() argument 2757 emit_i8x16_sconvert_i16x8(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i8x16_sconvert_i16x8() argument 2763 emit_i8x16_uconvert_i16x8(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i8x16_uconvert_i16x8() argument 2769 emit_i16x8_sconvert_i32x4(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i16x8_sconvert_i32x4() argument 2775 emit_i16x8_uconvert_i32x4(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i16x8_uconvert_i32x4() argument 2781 emit_i16x8_sconvert_i8x16_low(LiftoffRegister dst, LiftoffRegister src) emit_i16x8_sconvert_i8x16_low() argument 2786 emit_i16x8_sconvert_i8x16_high(LiftoffRegister dst, LiftoffRegister src) emit_i16x8_sconvert_i8x16_high() argument 2791 emit_i16x8_uconvert_i8x16_low(LiftoffRegister dst, LiftoffRegister src) emit_i16x8_uconvert_i8x16_low() argument 2796 emit_i16x8_uconvert_i8x16_high(LiftoffRegister dst, LiftoffRegister src) emit_i16x8_uconvert_i8x16_high() argument 2801 emit_i32x4_sconvert_i16x8_low(LiftoffRegister dst, LiftoffRegister src) emit_i32x4_sconvert_i16x8_low() argument 2806 emit_i32x4_sconvert_i16x8_high(LiftoffRegister dst, LiftoffRegister src) emit_i32x4_sconvert_i16x8_high() argument 2811 emit_i32x4_uconvert_i16x8_low(LiftoffRegister dst, LiftoffRegister src) emit_i32x4_uconvert_i16x8_low() argument 2816 emit_i32x4_uconvert_i16x8_high(LiftoffRegister dst, LiftoffRegister src) emit_i32x4_uconvert_i16x8_high() argument 2821 emit_i32x4_trunc_sat_f64x2_s_zero(LiftoffRegister dst, LiftoffRegister src) emit_i32x4_trunc_sat_f64x2_s_zero() argument 2826 emit_i32x4_trunc_sat_f64x2_u_zero(LiftoffRegister dst, LiftoffRegister src) emit_i32x4_trunc_sat_f64x2_u_zero() argument 2831 emit_s128_and_not(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_s128_and_not() argument 2837 emit_i8x16_rounding_average_u(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i8x16_rounding_average_u() argument 2843 emit_i16x8_rounding_average_u(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i16x8_rounding_average_u() argument 2849 emit_i8x16_abs(LiftoffRegister dst, LiftoffRegister src) emit_i8x16_abs() argument 2854 emit_i16x8_abs(LiftoffRegister dst, LiftoffRegister src) emit_i16x8_abs() argument 2859 emit_i32x4_abs(LiftoffRegister dst, LiftoffRegister src) emit_i32x4_abs() argument 2864 emit_i64x2_abs(LiftoffRegister dst, LiftoffRegister src) emit_i64x2_abs() argument 2869 emit_i8x16_sub(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i8x16_sub() argument 2874 emit_i8x16_sub_sat_s(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i8x16_sub_sat_s() argument 2880 emit_i8x16_sub_sat_u(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i8x16_sub_sat_u() argument 2886 emit_i8x16_add_sat_u(LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) emit_i8x16_add_sat_u() argument 3061 emit_set_if_nan(Register dst, DoubleRegister src, ValueKind kind) emit_set_if_nan() argument 3066 emit_s128_set_if_nan(Register dst, LiftoffRegister src, Register tmp_gp, LiftoffRegister tmp_s128, ValueKind lane_kind) emit_s128_set_if_nan() argument [all...] |
| /third_party/node/deps/v8/src/wasm/ |
| H A D | function-body-decoder-impl.h | 4364 Value dst = Peek(4, 0, ValueType::Ref(dst_imm.index, kNullable)); in DecodeGCOpcode() local 5011 Value dst = Peek(2, 0, mem_type); in DecodeNumericOpcode() local 5031 Value dst in DecodeNumericOpcode() local 5042 Value dst = Peek(2, 0, mem_type); DecodeNumericOpcode() local [all...] |
| /third_party/mesa3d/src/gallium/drivers/llvmpipe/ |
| H A D | lp_state_fs.c | 1385 generate_fs_twiddle(struct gallivm_state *gallivm, struct lp_type type, unsigned num_fs, unsigned dst_channels, LLVMValueRef fs_src[][4], LLVMValueRef* dst, bool pad_inline) generate_fs_twiddle() argument 1524 fs_twiddle_transpose(struct gallivm_state *gallivm, struct lp_type type, LLVMValueRef *src, unsigned src_count, LLVMValueRef *dst) fs_twiddle_transpose() argument 1605 load_unswizzled_block(struct gallivm_state *gallivm, LLVMValueRef base_ptr, LLVMValueRef stride, unsigned block_width, unsigned block_height, LLVMValueRef* dst, struct lp_type dst_type, unsigned dst_count, unsigned dst_alignment) load_unswizzled_block() argument 1912 LLVMValueRef *dst = src; convert_to_blend_type() local 2080 LLVMValueRef* dst = src; convert_from_blend_type() local 2389 LLVMValueRef dst[4 * 4]; generate_unswizzled_blend() local [all...] |
| /third_party/icu/icu4c/source/test/cintltst/ |
| H A D | nucnvtst.c | 3474 unescape(UChar* dst, int32_t dstLen,const char* src,int32_t srcLen,UErrorCode *status){ in unescape() argument
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| /third_party/ltp/tools/sparse/sparse-src/ |
| H A D | parse.c | 1434 static void apply_ctype(struct position pos, struct ctype *dst, struct ctype *src) in apply_ctype() argument
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| /third_party/node/deps/v8/src/compiler/backend/mips64/ |
| H A D | instruction-selector-mips64.cc | 3060 InstructionOperand dst = g.DefineAsRegister(node); in VisitS128Const() local
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| /third_party/node/deps/v8/src/compiler/backend/x64/ |
| H A D | instruction-selector-x64.cc | 3204 InstructionOperand dst = g.DefineAsRegister(node); in VisitS128Const() local 3281 InstructionOperand dst = in VisitF64x2ReplaceLane() local 3383 InstructionOperand dst = VisitS128Select() local 3433 InstructionOperand dst = VisitI64x2ShrS() local 3759 InstructionOperand dst = VisitI8x16Shuffle() local 3865 InstructionOperand dst = selector->IsSupported(AVX) VisitMinOrMax() local 3914 InstructionOperand dst = CpuFeatures::IsSupported(AVX) VisitI32x4ExtAddPairwiseI16x8S() local 3922 InstructionOperand dst = CpuFeatures::IsSupported(AVX) VisitI32x4ExtAddPairwiseI16x8U() local 3937 InstructionOperand dst = CpuFeatures::IsSupported(AVX) VisitI16x8ExtAddPairwiseI8x16U() local 3952 InstructionOperand dst = VisitF64x2ConvertLowI32x4U() local 3971 InstructionOperand dst = CpuFeatures::IsSupported(AVX) VisitI32x4TruncSatF64x2UZero() local [all...] |
| /third_party/node/deps/v8/src/compiler/backend/ppc/ |
| H A D | instruction-selector-ppc.cc | 2567 InstructionOperand dst = g.DefineAsRegister(node); in VisitS128Const() local
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| /third_party/node/deps/v8/src/compiler/backend/arm64/ |
| H A D | instruction-selector-arm64.cc | 3601 InstructionOperand dst = g.DefineAsRegister(node); in VisitS128Const() local
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| /third_party/node/deps/v8/src/compiler/backend/ia32/ |
| H A D | instruction-selector-ia32.cc | 386 InstructionOperand dst = selector->IsSupported(AVX) in VisitRRRSimd() local 2419 InstructionOperand dst = g.DefineAsRegister(node); in VisitS128Const() local 2499 InstructionOperand dst = in VisitI64x2ShrS() local 2540 InstructionOperand dst = VisitI32x4SConvertF32x4() local 2562 InstructionOperand dst = VisitS128Select() local 2571 InstructionOperand dst = VisitS128AndNot() local 2636 InstructionOperand dst = VisitF64x2ReplaceLane() local 3003 InstructionOperand dst = VisitI8x16Shuffle() local 3059 InstructionOperand dst = selector->IsSupported(AVX) VisitMinOrMax() local 3111 InstructionOperand dst = (selector->IsSupported(AVX)) VisitExtAddPairwise() local 3141 InstructionOperand dst = CpuFeatures::IsSupported(AVX) VisitI8x16Popcnt() local 3152 InstructionOperand dst = VisitF64x2ConvertLowI32x4U() local 3174 InstructionOperand dst = VisitI32x4TruncSatF64x2UZero() local [all...] |
| /third_party/node/deps/v8/src/compiler/backend/loong64/ |
| H A D | instruction-selector-loong64.cc | 2804 InstructionOperand dst = g.DefineAsRegister(node); in VisitS128Const() local
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| /third_party/node/deps/v8/src/compiler/backend/riscv64/ |
| H A D | instruction-selector-riscv64.cc | 3032 InstructionOperand dst = g.DefineAsRegister(node); in VisitS128Const() local 3128 InstructionOperand dst = g.DefineAsRegister(node); in VisitI32x4DotI16x8S() local
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| /third_party/node/deps/v8/src/codegen/mips64/ |
| H A D | macro-assembler-mips64.cc | 1524 void TurboAssembler::li(Register dst, Handle<HeapObject> value, LiFlags mode) { in CallRecordWriteStub() argument 135 RecordWriteField(Register object, int offset, Register value, Register dst, RAStatus ra_status, SaveFPRegsMode save_fp, RememberedSetAction remembered_set_action, SmiCheck smi_check) RecordWriteField() argument 1535 li(Register dst, ExternalReference value, LiFlags mode) CallRecordWriteStub() argument 1546 li(Register dst, const StringConstantBase* string, LiFlags mode) CallRecordWriteStub() argument 4671 LoadAddress(Register dst, Label* target) CallRecordWriteStub() argument 4750 FPUCanonicalizeNaN(const DoubleRegister dst, const DoubleRegister src) CallRecordWriteStub() argument 4755 MovFromFloatResult(const DoubleRegister dst) CallRecordWriteStub() argument 4767 MovFromFloatParameter(const DoubleRegister dst) CallRecordWriteStub() argument 5077 DaddOverflow(Register dst, Register left, const Operand& right, Register overflow) CallRecordWriteStub() argument 5108 DsubOverflow(Register dst, Register left, const Operand& right, Register overflow) CallRecordWriteStub() argument 5139 MulOverflow(Register dst, Register left, const Operand& right, Register overflow) CallRecordWriteStub() argument 5328 LoadNativeContextSlot(Register dst, int index) CallRecordWriteStub() argument 5537 SmiUntag(Register dst, const MemOperand& src) CallRecordWriteStub() argument 5694 Float32Max(FPURegister dst, FPURegister src1, FPURegister src2, Label* out_of_line) CallRecordWriteStub() argument 5740 Float32MaxOutOfLine(FPURegister dst, FPURegister src1, FPURegister src2) CallRecordWriteStub() argument 5745 Float32Min(FPURegister dst, FPURegister src1, FPURegister src2, Label* out_of_line) CallRecordWriteStub() argument 5791 Float32MinOutOfLine(FPURegister dst, FPURegister src1, FPURegister src2) CallRecordWriteStub() argument 5796 Float64Max(FPURegister dst, FPURegister src1, FPURegister src2, Label* out_of_line) CallRecordWriteStub() argument 5841 Float64MaxOutOfLine(FPURegister dst, FPURegister src1, FPURegister src2) CallRecordWriteStub() argument 5846 Float64Min(FPURegister dst, FPURegister src1, FPURegister src2, Label* out_of_line) CallRecordWriteStub() argument 5891 Float64MinOutOfLine(FPURegister dst, FPURegister src1, FPURegister src2) CallRecordWriteStub() argument 6088 ComputeCodeStartAddress(Register dst) CallRecordWriteStub() argument [all...] |
| /third_party/node/deps/v8/src/builtins/ia32/ |
| H A D | builtins-ia32.cc | 3602 Register dst = edi; in MemMoveEmitMainLoop() local 3690 Register dst = edi; Generate_MemMove() local [all...] |
| /third_party/node/deps/v8/src/codegen/arm/ |
| H A D | macro-assembler-arm.cc | 446 void TurboAssembler::Move(Register dst, Smi smi) { mov(dst, Operand(smi)); } in Move() argument 448 void TurboAssembler::Move(Register dst, Handle<HeapObject> value) { in Move() argument 459 void TurboAssembler::Move(Register dst, ExternalReference reference) { in Move() argument 470 void TurboAssembler::Move(Register dst, Register src, Condition cond) { in Move() argument 476 Move(SwVfpRegister dst, SwVfpRegister src, Condition cond) Move() argument 483 Move(DwVfpRegister dst, DwVfpRegister src, Condition cond) Move() argument 490 Move(QwNeonRegister dst, QwNeonRegister src) Move() argument 542 Mls(Register dst, Register src1, Register src2, Register srcA, Condition cond) Mls() argument 556 And(Register dst, Register src1, const Operand& src2, Condition cond) And() argument 575 Ubfx(Register dst, Register src1, int lsb, int width, Condition cond) Ubfx() argument 590 Sbfx(Register dst, Register src1, int lsb, int width, Condition cond) Sbfx() argument 610 Bfc(Register dst, Register src, int lsb, int width, Condition cond) Bfc() argument 860 VFPCanonicalizeNaN(const DwVfpRegister dst, const DwVfpRegister src, const Condition cond) CallRecordWriteStub() argument 933 VmovHigh(Register dst, DwVfpRegister src) CallRecordWriteStub() argument 942 VmovHigh(DwVfpRegister dst, Register src) CallRecordWriteStub() argument 951 VmovLow(Register dst, DwVfpRegister src) CallRecordWriteStub() argument 960 VmovLow(DwVfpRegister dst, Register src) CallRecordWriteStub() argument 969 VmovExtended(Register dst, int src_code) CallRecordWriteStub() argument 1073 VmovExtended(const MemOperand& dst, int src_code) CallRecordWriteStub() argument 1075 vstr(SwVfpRegister::from_code(src_code), dst); CallRecordWriteStub() local 1082 vstr(SwVfpRegister::from_code(src_s_code), dst); CallRecordWriteStub() local 1086 ExtractLane(Register dst, QwNeonRegister src, NeonDataType dt, int lane) CallRecordWriteStub() argument 1098 ExtractLane(Register dst, DwVfpRegister src, NeonDataType dt, int lane) CallRecordWriteStub() argument 1107 ExtractLane(SwVfpRegister dst, QwNeonRegister src, int lane) CallRecordWriteStub() argument 1113 ExtractLane(DwVfpRegister dst, QwNeonRegister src, int lane) CallRecordWriteStub() argument 1119 ReplaceLane(QwNeonRegister dst, QwNeonRegister src, Register src_lane, NeonDataType dt, int lane) CallRecordWriteStub() argument 1132 ReplaceLane(QwNeonRegister dst, QwNeonRegister src, SwVfpRegister src_lane, int lane) CallRecordWriteStub() argument 1139 ReplaceLane(QwNeonRegister dst, QwNeonRegister src, DwVfpRegister src_lane, int lane) CallRecordWriteStub() argument 1156 StoreLane(NeonSize sz, NeonListOperand src_list, uint8_t lane, NeonMemOperand dst) CallRecordWriteStub() argument 1544 MovFromFloatResult(const DwVfpRegister dst) CallRecordWriteStub() argument 1553 MovFromFloatParameter(DwVfpRegister dst) CallRecordWriteStub() argument 2078 LoadGlobalProxy(Register dst) CallRecordWriteStub() argument 2083 LoadNativeContextSlot(Register dst, int index) CallRecordWriteStub() argument 2101 SmiTag(Register dst, Register src, SBit s) CallRecordWriteStub() argument 2630 ComputeCodeStartAddress(Register dst) CallRecordWriteStub() argument 2661 I64x2BitMask(Register dst, QwNeonRegister src) CallRecordWriteStub() argument 2672 I64x2Eq(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) CallRecordWriteStub() argument 2681 I64x2Ne(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) CallRecordWriteStub() argument 2691 I64x2GtS(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) CallRecordWriteStub() argument 2698 I64x2GeS(QwNeonRegister dst, QwNeonRegister src1, QwNeonRegister src2) CallRecordWriteStub() argument 2706 I64x2AllTrue(Register dst, QwNeonRegister src) CallRecordWriteStub() argument 2730 I64x2Abs(QwNeonRegister dst, QwNeonRegister src) CallRecordWriteStub() argument 2744 F64x2ConvertLowHelper(Assembler* assm, QwNeonRegister dst, QwNeonRegister src, AssemblerFunc convert_fn) CallRecordWriteStub() argument 2759 F64x2ConvertLowI32x4S(QwNeonRegister dst, QwNeonRegister src) CallRecordWriteStub() argument 2764 F64x2ConvertLowI32x4U(QwNeonRegister dst, QwNeonRegister src) CallRecordWriteStub() argument 2769 F64x2PromoteLowF32x4(QwNeonRegister dst, QwNeonRegister src) CallRecordWriteStub() argument [all...] |
| /third_party/node/deps/v8/src/codegen/arm64/ |
| H A D | macro-assembler-arm64.cc | 347 Register dst = (rd.IsSP()) ? temps.AcquireSameSizeAs(rd) : rd; in Mov() local 693 bool TurboAssembler::TryOneInstrMoveImmediate(const Register& dst, in TryOneInstrMoveImmediate() argument 715 MoveImmediateForShiftedOp(const Register& dst, int64_t imm, PreShiftImmMode mode) MoveImmediateForShiftedOp() argument 1341 CopySlots(int dst, Register src, Register slot_count) CopySlots() argument 1350 CopySlots(Register dst, Register src, Register slot_count) CopySlots() argument 1358 CopyDoubleWords(Register dst, Register src, Register count, CopyDoubleWordsMode mode) CopyDoubleWords() argument 1429 SlotAddress(Register dst, int slot_offset) SlotAddress() argument 1433 SlotAddress(Register dst, Register slot_offset) SlotAddress() argument 1461 CanonicalizeNaN(const VRegister& dst, const VRegister& src) CanonicalizeNaN() argument 1487 Move(Register dst, Smi src) Move() argument 1488 Move(Register dst, MemOperand src) Move() argument 1489 Move(Register dst, Register src) Move() argument 2361 Register dst = x7; InvokePrologue() local 2811 LoadGlobalProxy(Register dst) TruncateDoubleToI() argument 2857 LoadMap(Register dst, Register object) TruncateDoubleToI() argument 2956 SmiUntagField(Register dst, const MemOperand& src) TruncateDoubleToI() argument 3410 LoadNativeContextSlot(Register dst, int index) TruncateDoubleToI() argument 3735 PopcntHelper(Register dst, Register src) TruncateDoubleToI() argument 3745 I64x2BitMask(Register dst, VRegister src) TruncateDoubleToI() argument 3756 I64x2AllTrue(Register dst, VRegister src) TruncateDoubleToI() argument [all...] |
| /third_party/node/deps/v8/src/builtins/arm64/ |
| H A D | builtins-arm64.cc | 142 Register dst = x10; in Generate_JSBuiltinsConstructStubHelper() local 333 Register dst = x10; in Generate_JSConstructStubGeneric() local 2416 Register dst in Generate_PrepareForCopyingVarargs() local 2482 Register dst = x16; Generate_CallOrConstructVarargs() local 2548 Register dst = x13; Generate_CallOrConstructForwardVarargs() local 3789 CopyRegListToFrame(MacroAssembler* masm, const Register& dst, int dst_offset, const CPURegList& reg_list, const Register& temp0, const Register& temp1, int src_offset = 0) CopyRegListToFrame() argument [all...] |
| /third_party/node/deps/v8/src/codegen/ppc/ |
| H A D | macro-assembler-ppc.cc | 344 void TurboAssembler::Move(Register dst, Handle<HeapObject> value, in Move() argument 362 void TurboAssembler::Move(Register dst, ExternalReference reference) { in Move() argument 373 void TurboAssembler::Move(Register dst, Register src, Condition cond) { in Move() argument 380 Move(DoubleRegister dst, DoubleRegister src) Move() argument 561 SmiUntag(Register dst, const MemOperand& src, RCBit rc, Register scratch) SmiUntag() argument 890 CanonicalizeNaN(const DoubleRegister dst, const DoubleRegister src) CallRecordWriteStub() argument 896 ConvertIntToDouble(Register src, DoubleRegister dst) CallRecordWriteStub() argument 901 ConvertUnsignedIntToDouble(Register src, DoubleRegister dst) CallRecordWriteStub() argument 907 ConvertIntToFloat(Register src, DoubleRegister dst) CallRecordWriteStub() argument 912 ConvertUnsignedIntToFloat(Register src, DoubleRegister dst) CallRecordWriteStub() argument 944 ConvertDoubleToInt64(const DoubleRegister double_input, const Register dst_hi, const Register dst, const DoubleRegister double_dst, FPRoundingMode rounding_mode) CallRecordWriteStub() argument 967 ConvertDoubleToUnsignedInt64( const DoubleRegister double_input, const Register dst, const DoubleRegister double_dst, FPRoundingMode rounding_mode) CallRecordWriteStub() argument 1138 LoadPC(Register dst) CallRecordWriteStub() argument 1143 ComputeCodeStartAddress(Register dst) CallRecordWriteStub() argument 1405 MovFromFloatResult(const DoubleRegister dst) CallRecordWriteStub() argument 1409 MovFromFloatParameter(const DoubleRegister dst) CallRecordWriteStub() argument 2098 LoadNativeContextSlot(Register dst, int index) CallRecordWriteStub() argument 2427 LoadIntLiteral(Register dst, int value) CallRecordWriteStub() argument 2431 LoadSmiLiteral(Register dst, Smi smi) CallRecordWriteStub() argument 2484 MovIntToDouble(DoubleRegister dst, Register src, Register scratch) CallRecordWriteStub() argument 2509 MovUnsignedIntToDouble(DoubleRegister dst, Register src, Register scratch) CallRecordWriteStub() argument 2534 MovInt64ToDouble(DoubleRegister dst, Register src_hi, Register src) CallRecordWriteStub() argument 2559 MovInt64ComponentsToDouble(DoubleRegister dst, Register src_hi, Register src_lo, Register scratch) CallRecordWriteStub() argument 2579 InsertDoubleLow(DoubleRegister dst, Register src, Register scratch) CallRecordWriteStub() argument 2598 InsertDoubleHigh(DoubleRegister dst, Register src, Register scratch) CallRecordWriteStub() argument 2617 MovDoubleLowToInt(Register dst, DoubleRegister src) CallRecordWriteStub() argument 2632 MovDoubleHighToInt(Register dst, DoubleRegister src) CallRecordWriteStub() argument 2648 MovDoubleToInt64( Register dst_hi, Register dst, DoubleRegister src) CallRecordWriteStub() argument 2672 MovIntToFloat(DoubleRegister dst, Register src, Register scratch) CallRecordWriteStub() argument 2687 MovFloatToInt(Register dst, DoubleRegister src, DoubleRegister scratch) CallRecordWriteStub() argument 2701 AddS64(Register dst, Register src, Register value, OEBit s, RCBit r) CallRecordWriteStub() argument 2706 AddS64(Register dst, Register src, const Operand& value, Register scratch, OEBit s, RCBit r) CallRecordWriteStub() argument 2716 SubS64(Register dst, Register src, Register value, OEBit s, RCBit r) CallRecordWriteStub() argument 2721 SubS64(Register dst, Register src, const Operand& value, Register scratch, OEBit s, RCBit r) CallRecordWriteStub() argument 2731 AddS32(Register dst, Register src, Register value, RCBit r) CallRecordWriteStub() argument 2737 AddS32(Register dst, Register src, const Operand& value, Register scratch, RCBit r) CallRecordWriteStub() argument 2743 SubS32(Register dst, Register src, Register value, RCBit r) CallRecordWriteStub() argument 2749 SubS32(Register dst, Register src, const Operand& value, Register scratch, RCBit r) CallRecordWriteStub() argument 2755 MulS64(Register dst, Register src, const Operand& value, Register scratch, OEBit s, RCBit r) CallRecordWriteStub() argument 2765 MulS64(Register dst, Register src, Register value, OEBit s, RCBit r) CallRecordWriteStub() argument 2770 MulS32(Register dst, Register src, const Operand& value, Register scratch, OEBit s, RCBit r) CallRecordWriteStub() argument 2776 MulS32(Register dst, Register src, Register value, OEBit s, RCBit r) CallRecordWriteStub() argument 2782 DivS64(Register dst, Register src, Register value, OEBit s, RCBit r) CallRecordWriteStub() argument 2787 DivU64(Register dst, Register src, Register value, OEBit s, RCBit r) CallRecordWriteStub() argument 2792 DivS32(Register dst, Register src, Register value, OEBit s, RCBit r) CallRecordWriteStub() argument 2797 DivU32(Register dst, Register src, Register value, OEBit s, RCBit r) CallRecordWriteStub() argument 2803 ModS64(Register dst, Register src, Register value) CallRecordWriteStub() argument 2816 ModU64(Register dst, Register src, Register value) CallRecordWriteStub() argument 2829 ModS32(Register dst, Register src, Register value) CallRecordWriteStub() argument 2842 ModU32(Register dst, Register src, Register value) CallRecordWriteStub() argument 2856 AndU64(Register dst, Register src, const Operand& value, Register scratch, RCBit r) CallRecordWriteStub() argument 2866 AndU64(Register dst, Register src, Register value, RCBit r) CallRecordWriteStub() argument 2871 OrU64(Register dst, Register src, const Operand& value, Register scratch, RCBit r) CallRecordWriteStub() argument 2881 OrU64(Register dst, Register src, Register value, RCBit r) CallRecordWriteStub() argument 2886 XorU64(Register dst, Register src, const Operand& value, Register scratch, RCBit r) CallRecordWriteStub() argument 2896 XorU64(Register dst, Register src, Register value, RCBit r) CallRecordWriteStub() argument 2901 AndU32(Register dst, Register src, const Operand& value, Register scratch, RCBit r) CallRecordWriteStub() argument 2907 AndU32(Register dst, Register src, Register value, RCBit r) CallRecordWriteStub() argument 2913 OrU32(Register dst, Register src, const Operand& value, Register scratch, RCBit r) CallRecordWriteStub() argument 2919 OrU32(Register dst, Register src, Register value, RCBit r) CallRecordWriteStub() argument 2925 XorU32(Register dst, Register src, const Operand& value, Register scratch, RCBit r) CallRecordWriteStub() argument 2931 XorU32(Register dst, Register src, Register value, RCBit r) CallRecordWriteStub() argument 2937 ShiftLeftU64(Register dst, Register src, const Operand& value, RCBit r) CallRecordWriteStub() argument 2942 ShiftRightU64(Register dst, Register src, const Operand& value, RCBit r) CallRecordWriteStub() argument 2947 ShiftRightS64(Register dst, Register src, const Operand& value, RCBit r) CallRecordWriteStub() argument 2952 ShiftLeftU32(Register dst, Register src, const Operand& value, RCBit r) CallRecordWriteStub() argument 2957 ShiftRightU32(Register dst, Register src, const Operand& value, RCBit r) CallRecordWriteStub() argument 2962 ShiftRightS32(Register dst, Register src, const Operand& value, RCBit r) CallRecordWriteStub() argument 2967 ShiftLeftU64(Register dst, Register src, Register value, RCBit r) CallRecordWriteStub() argument 2972 ShiftRightU64(Register dst, Register src, Register value, RCBit r) CallRecordWriteStub() argument 2977 ShiftRightS64(Register dst, Register src, Register value, RCBit r) CallRecordWriteStub() argument 2982 ShiftLeftU32(Register dst, Register src, Register value, RCBit r) CallRecordWriteStub() argument 2987 ShiftRightU32(Register dst, Register src, Register value, RCBit r) CallRecordWriteStub() argument 2992 ShiftRightS32(Register dst, Register src, Register value, RCBit r) CallRecordWriteStub() argument 3057 AddF64(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs, RCBit r) CallRecordWriteStub() argument 3062 SubF64(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs, RCBit r) CallRecordWriteStub() argument 3067 MulF64(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs, RCBit r) CallRecordWriteStub() argument 3072 DivF64(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs, RCBit r) CallRecordWriteStub() argument 3077 AddF32(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs, RCBit r) CallRecordWriteStub() argument 3083 SubF32(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs, RCBit r) CallRecordWriteStub() argument 3089 MulF32(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs, RCBit r) CallRecordWriteStub() argument 3095 DivF32(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs, RCBit r) CallRecordWriteStub() argument 3101 CopySignF64(DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs, RCBit r) CallRecordWriteStub() argument 3126 AddSmiLiteral(Register dst, Register src, Smi smi, Register scratch) CallRecordWriteStub() argument 3136 SubSmiLiteral(Register dst, Register src, Smi smi, Register scratch) CallRecordWriteStub() argument 3146 AndSmiLiteral(Register dst, Register src, Smi smi, Register scratch, RCBit rc) CallRecordWriteStub() argument 3257 LoadS8(Register dst, const MemOperand& mem, Register scratch) CallRecordWriteStub() argument 3319 LoadS32LE(Register dst, const MemOperand& mem, Register scratch) CallRecordWriteStub() argument 3329 LoadS16LE(Register dst, const MemOperand& mem, Register scratch) CallRecordWriteStub() argument 3339 LoadF64LE(DoubleRegister dst, const MemOperand& mem, Register scratch, Register scratch2) CallRecordWriteStub() argument 3351 LoadF32LE(DoubleRegister dst, const MemOperand& mem, Register scratch, Register scratch2) CallRecordWriteStub() argument 3363 StoreF64LE(DoubleRegister dst, const MemOperand& mem, Register scratch, Register scratch2) CallRecordWriteStub() argument 3374 StoreF32LE(DoubleRegister dst, const MemOperand& mem, Register scratch, Register scratch2) CallRecordWriteStub() argument 3400 SwapP(Register src, Register dst, Register scratch) CallRecordWriteStub() argument 3408 SwapP(Register src, MemOperand dst, Register scratch) CallRecordWriteStub() argument 3419 SwapP(MemOperand src, MemOperand dst, Register scratch_0, Register scratch_1) CallRecordWriteStub() argument 3451 SwapFloat32(DoubleRegister src, DoubleRegister dst, DoubleRegister scratch) CallRecordWriteStub() argument 3460 SwapFloat32(DoubleRegister src, MemOperand dst, DoubleRegister scratch) CallRecordWriteStub() argument 3468 SwapFloat32(MemOperand src, MemOperand dst, DoubleRegister scratch_0, DoubleRegister scratch_1) CallRecordWriteStub() argument 3478 SwapDouble(DoubleRegister src, DoubleRegister dst, DoubleRegister scratch) CallRecordWriteStub() argument 3487 SwapDouble(DoubleRegister src, MemOperand dst, DoubleRegister scratch) CallRecordWriteStub() argument 3495 SwapDouble(MemOperand src, MemOperand dst, DoubleRegister scratch_0, DoubleRegister scratch_1) CallRecordWriteStub() argument 3505 SwapSimd128(Simd128Register src, Simd128Register dst, Simd128Register scratch) CallRecordWriteStub() argument 3513 SwapSimd128(Simd128Register src, MemOperand dst, Simd128Register scratch) CallRecordWriteStub() argument 3528 SwapSimd128(MemOperand src, MemOperand dst, Simd128Register scratch) CallRecordWriteStub() argument 3552 ByteReverseU16(Register dst, Register val, Register scratch) CallRecordWriteStub() argument 3565 ByteReverseU32(Register dst, Register val, Register scratch) CallRecordWriteStub() argument 3578 ByteReverseU64(Register dst, Register val, Register) CallRecordWriteStub() argument 3744 ZeroExtByte(Register dst, Register src) CallRecordWriteStub() argument 3748 ZeroExtHalfWord(Register dst, Register src) CallRecordWriteStub() argument 3752 ZeroExtWord32(Register dst, Register src) CallRecordWriteStub() argument 3759 Popcnt32(Register dst, Register src) CallRecordWriteStub() argument 3761 Popcnt64(Register dst, Register src) CallRecordWriteStub() argument 3763 CountLeadingZerosU32(Register dst, Register src, RCBit r) CallRecordWriteStub() argument 3767 CountLeadingZerosU64(Register dst, Register src, RCBit r) CallRecordWriteStub() argument 3784 CountTrailingZerosU32(Register dst, Register src, Register scratch1, Register scratch2, RCBit r) CallRecordWriteStub() argument 3794 CountTrailingZerosU64(Register dst, Register src, Register scratch1, Register scratch2, RCBit r) CallRecordWriteStub() argument 3805 ClearByteU64(Register dst, int byte_idx) CallRecordWriteStub() argument 3812 ReverseBitsU64(Register dst, Register src, Register scratch1, Register scratch2) CallRecordWriteStub() argument 3820 ReverseBitsU32(Register dst, Register src, Register scratch1, Register scratch2) CallRecordWriteStub() argument 3829 ReverseBitsInSingleByteU64(Register dst, Register src, Register scratch1, Register scratch2, int byte_idx) CallRecordWriteStub() argument [all...] |
| H A D | assembler-ppc.cc | 488 Register dst = Register::from_code(instr_at(pos + kInstrSize)); in target_at_put() local 499 Register dst = Register::from_code((operands >> 27) & 0x1F); in target_at_put() local 514 Register dst = Register::from_code(instr_at(pos + kInstrSize)); in target_at_put() local 726 void Assembler::xori(Register dst, Register src, const Operand& imm) { in xori() argument 760 void Assembler::slwi(Register dst, Registe argument 765 srwi(Register dst, Register src, const Operand& val, RCBit rc) srwi() argument 770 clrrwi(Register dst, Register src, const Operand& val, RCBit rc) clrrwi() argument 776 clrlwi(Register dst, Register src, const Operand& val, RCBit rc) clrlwi() argument 794 subi(Register dst, Register src, const Operand& imm) subi() argument 798 addc(Register dst, Register src1, Register src2, OEBit o, RCBit r) addc() argument 803 adde(Register dst, Register src1, Register src2, OEBit o, RCBit r) adde() argument 808 addze(Register dst, Register src1, OEBit o, RCBit r) addze() argument 813 sub(Register dst, Register src1, Register src2, OEBit o, RCBit r) sub() argument 818 subc(Register dst, Register src1, Register src2, OEBit o, RCBit r) subc() argument 823 sube(Register dst, Register src1, Register src2, OEBit o, RCBit r) sube() argument 828 subfic(Register dst, Register src, const Operand& imm) subfic() argument 832 add(Register dst, Register src1, Register src2, OEBit o, RCBit r) add() argument 838 mullw(Register dst, Register src1, Register src2, OEBit o, RCBit r) mullw() argument 843 mulli(Register dst, Register src, const Operand& imm) mulli() argument 848 mulhw(Register dst, Register src1, Register src2, RCBit r) mulhw() argument 853 mulhwu(Register dst, Register src1, Register src2, RCBit r) mulhwu() argument 858 divw(Register dst, Register src1, Register src2, OEBit o, RCBit r) divw() argument 864 divwu(Register dst, Register src1, Register src2, OEBit o, RCBit r) divwu() argument 869 addi(Register dst, Register src, const Operand& imm) addi() argument 874 addis(Register dst, Register src, const Operand& imm) addis() argument 879 addic(Register dst, Register src, const Operand& imm) addic() argument 895 oris(Register dst, Register src, const Operand& imm) oris() argument 957 li(Register dst, const Operand& imm) li() argument 961 lis(Register dst, const Operand& imm) lis() argument 966 mr(Register dst, Register src) mr() argument 971 lbz(Register dst, const MemOperand& src) lbz() argument 976 lhz(Register dst, const MemOperand& src) lhz() argument 981 lwz(Register dst, const MemOperand& src) lwz() argument 986 lwzu(Register dst, const MemOperand& src) lwzu() argument 991 lha(Register dst, const MemOperand& src) lha() argument 996 lwa(Register dst, const MemOperand& src) lwa() argument 1008 stb(Register dst, const MemOperand& src) stb() argument 1013 sth(Register dst, const MemOperand& src) sth() argument 1018 stw(Register dst, const MemOperand& src) stw() argument 1023 stwu(Register dst, const MemOperand& src) stwu() argument 1082 sldi(Register dst, Register src, const Operand& val, RCBit rc) sldi() argument 1087 srdi(Register dst, Register src, const Operand& val, RCBit rc) srdi() argument 1092 clrrdi(Register dst, Register src, const Operand& val, RCBit rc) clrrdi() argument 1098 clrldi(Register dst, Register src, const Operand& val, RCBit rc) clrldi() argument 1128 mulld(Register dst, Register src1, Register src2, OEBit o, RCBit r) mulld() argument 1133 divd(Register dst, Register src1, Register src2, OEBit o, RCBit r) divd() argument 1138 divdu(Register dst, Register src1, Register src2, OEBit o, RCBit r) divdu() argument 1152 paddi(Register dst, Register src, const Operand& imm) paddi() argument 1162 pli(Register dst, const Operand& imm) pli() argument 1171 psubi(Register dst, Register src, const Operand& imm) psubi() argument 1175 plbz(Register dst, const MemOperand& src) plbz() argument 1184 plhz(Register dst, const MemOperand& src) plhz() argument 1193 plha(Register dst, const MemOperand& src) plha() argument 1202 plwz(Register dst, const MemOperand& src) plwz() argument 1211 plwa(Register dst, const MemOperand& src) plwa() argument 1220 pld(Register dst, const MemOperand& src) pld() argument 1229 plfs(DoubleRegister dst, const MemOperand& src) plfs() argument 1238 plfd(DoubleRegister dst, const MemOperand& src) plfd() argument 1248 instructions_required_for_mov(Register dst, const Operand& src) const instructions_required_for_mov() argument 1262 use_constant_pool_for_mov(Register dst, const Operand& src, bool canOptimize) const use_constant_pool_for_mov() argument 1312 mov(Register dst, const Operand& src) mov() argument 1398 bitwise_mov(Register dst, intptr_t value) bitwise_mov() argument 1420 bitwise_mov32(Register dst, int32_t value) bitwise_mov32() argument 1428 bitwise_add32(Register dst, Register src, int32_t value) bitwise_add32() argument 1442 patch_wasm_cpi_return_address(Register dst, int pc_offset, int return_address_offset) patch_wasm_cpi_return_address() argument 1451 mov_label_offset(Register dst, Label* label) mov_label_offset() argument 1477 add_label_offset(Register dst, Register base, Label* label, int delta) add_label_offset() argument 1505 mov_label_addr(Register dst, Label* label) mov_label_addr() argument 1570 mflr(Register dst) mflr() argument 1593 mfcr(Register dst) mfcr() argument 1599 mffprd(Register dst, DoubleRegister src) mffprd() argument 1603 mffprwz(Register dst, DoubleRegister src) mffprwz() argument 1607 mtfprd(DoubleRegister dst, Register src) mtfprd() argument 1611 mtfprwz(DoubleRegister dst, Register src) mtfprwz() argument 1615 mtfprwa(DoubleRegister dst, Register src) mtfprwa() argument 1972 stxsdx(const Simd128Register rs, const MemOperand& dst) stxsdx() argument 1979 stxsibx(const Simd128Register rs, const MemOperand& dst) stxsibx() argument 1986 stxsihx(const Simd128Register rs, const MemOperand& dst) stxsihx() argument 1993 stxsiwx(const Simd128Register rs, const MemOperand& dst) stxsiwx() argument 2000 stxvd(const Simd128Register rt, const MemOperand& dst) stxvd() argument 2007 stxvx(const Simd128Register rt, const MemOperand& dst) stxvx() argument [all...] |
| /third_party/node/deps/v8/src/codegen/ia32/ |
| H A D | assembler-ia32.cc | 546 void Assembler::pop(Register dst) { in pop() argument 552 void Assembler::pop(Operand dst) { in pop() argument 563 void Assembler::mov_b(Register dst, Operand src) { in mov_b() argument 570 void Assembler::mov_b(Operand dst, const Immediate& src) { in mov_b() argument 577 void Assembler::mov_b(Operand dst, Registe argument 584 mov_w(Register dst, Operand src) mov_w() argument 591 mov_w(Operand dst, Register src) mov_w() argument 598 mov_w(Operand dst, const Immediate& src) mov_w() argument 607 mov(Register dst, int32_t imm32) mov() argument 613 mov(Register dst, const Immediate& x) mov() argument 619 mov(Register dst, Handle<HeapObject> handle) mov() argument 625 mov(Register dst, Operand src) mov() argument 631 mov(Register dst, Register src) mov() argument 637 mov(Operand dst, const Immediate& x) mov() argument 644 mov(Operand dst, Address src, RelocInfo::Mode rmode) mov() argument 651 mov(Operand dst, Handle<HeapObject> handle) mov() argument 658 mov(Operand dst, Register src) mov() argument 664 movsx_b(Register dst, Operand src) movsx_b() argument 672 movsx_w(Register dst, Operand src) movsx_w() argument 679 movzx_b(Register dst, Operand src) movzx_b() argument 687 movzx_w(Register dst, Operand src) movzx_w() argument 694 movq(XMMRegister dst, Operand src) movq() argument 702 movq(Operand dst, XMMRegister src) movq() argument 710 cmov(Condition cc, Register dst, Operand src) cmov() argument 740 xadd(Operand dst, Register src) xadd() argument 747 xadd_b(Operand dst, Register src) xadd_b() argument 755 xadd_w(Operand dst, Register src) xadd_w() argument 763 xchg(Register dst, Register src) xchg() argument 773 xchg(Register dst, Operand src) xchg() argument 798 cmpxchg(Operand dst, Register src) cmpxchg() argument 805 cmpxchg_b(Operand dst, Register src) cmpxchg_b() argument 813 cmpxchg_w(Operand dst, Register src) cmpxchg_w() argument 821 cmpxchg8b(Operand dst) cmpxchg8b() argument 848 adc(Register dst, int32_t imm32) adc() argument 853 adc(Register dst, Operand src) adc() argument 859 add(Register dst, Operand src) add() argument 865 add(Operand dst, Register src) add() argument 871 add(Operand dst, const Immediate& x) add() argument 877 and_(Register dst, int32_t imm32) and_() argument 881 and_(Register dst, const Immediate& x) and_() argument 886 and_(Register dst, Operand src) and_() argument 892 and_(Operand dst, const Immediate& x) and_() argument 897 and_(Operand dst, Register src) and_() argument 997 dec_b(Register dst) dec_b() argument 1004 dec_b(Operand dst) dec_b() argument 1010 dec(Register dst) dec() argument 1015 dec(Operand dst) dec() argument 1044 imul(Register dst, Operand src) imul() argument 1051 imul(Register dst, Register src, int32_t imm32) imul() argument 1055 imul(Register dst, Operand src, int32_t imm32) imul() argument 1068 inc(Register dst) inc() argument 1073 inc(Operand dst) inc() argument 1079 lea(Register dst, Operand src) lea() argument 1091 neg(Register dst) neg() argument 1097 neg(Operand dst) neg() argument 1103 not_(Register dst) not_() argument 1109 not_(Operand dst) not_() argument 1115 or_(Register dst, int32_t imm32) or_() argument 1120 or_(Register dst, Operand src) or_() argument 1126 or_(Operand dst, const Immediate& x) or_() argument 1131 or_(Operand dst, Register src) or_() argument 1137 rcl(Register dst, uint8_t imm8) rcl() argument 1150 rcr(Register dst, uint8_t imm8) rcr() argument 1163 rol(Operand dst, uint8_t imm8) rol() argument 1176 rol_cl(Operand dst) rol_cl() argument 1182 ror(Operand dst, uint8_t imm8) ror() argument 1195 ror_cl(Operand dst) ror_cl() argument 1201 sar(Operand dst, uint8_t imm8) sar() argument 1214 sar_cl(Operand dst) sar_cl() argument 1220 sbb(Register dst, Operand src) sbb() argument 1226 shld(Register dst, Register src, uint8_t shift) shld() argument 1235 shld_cl(Register dst, Register src) shld_cl() argument 1242 shl(Operand dst, uint8_t imm8) shl() argument 1255 shl_cl(Operand dst) shl_cl() argument 1261 shr(Operand dst, uint8_t imm8) shr() argument 1274 shr_cl(Operand dst) shr_cl() argument 1280 shrd(Register dst, Register src, uint8_t shift) shrd() argument 1289 shrd_cl(Operand dst, Register src) shrd_cl() argument 1296 sub(Operand dst, const Immediate& x) sub() argument 1301 sub(Register dst, Operand src) sub() argument 1307 sub(Operand dst, Register src) sub() argument 1429 xor_(Register dst, int32_t imm32) xor_() argument 1434 xor_(Register dst, Operand src) xor_() argument 1440 xor_(Operand dst, Register src) xor_() argument 1446 xor_(Operand dst, const Immediate& x) xor_() argument 1451 bswap(Register dst) bswap() argument 1457 bt(Operand dst, Register src) bt() argument 1464 bts(Operand dst, Register src) bts() argument 1471 bsr(Register dst, Operand src) bsr() argument 1478 bsf(Register dst, Operand src) bsf() argument 2148 cvttss2si(Register dst, Operand src) cvttss2si() argument 2158 cvttsd2si(Register dst, Operand src) cvttsd2si() argument 2168 cvtsd2si(Register dst, XMMRegister src) cvtsd2si() argument 2176 cvtsi2ss(XMMRegister dst, Operand src) cvtsi2ss() argument 2184 cvtsi2sd(XMMRegister dst, Operand src) cvtsi2sd() argument 2192 cvtss2sd(XMMRegister dst, Operand src) cvtss2sd() argument 2200 cvtdq2pd(XMMRegister dst, XMMRegister src) cvtdq2pd() argument 2208 cvtpd2ps(XMMRegister dst, XMMRegister src) cvtpd2ps() argument 2216 cvttps2dq(XMMRegister dst, Operand src) cvttps2dq() argument 2224 cvttpd2dq(XMMRegister dst, XMMRegister src) cvttpd2dq() argument 2232 cmpps(XMMRegister dst, Operand src, uint8_t cmp) cmpps() argument 2240 cmppd(XMMRegister dst, Operand src, uint8_t cmp) cmppd() argument 2249 haddps(XMMRegister dst, Operand src) haddps() argument 2258 ucomisd(XMMRegister dst, Operand src) ucomisd() argument 2266 roundps(XMMRegister dst, XMMRegister src, RoundingMode mode) roundps() argument 2278 roundpd(XMMRegister dst, XMMRegister src, RoundingMode mode) roundpd() argument 2290 roundss(XMMRegister dst, XMMRegister src, RoundingMode mode) roundss() argument 2302 roundsd(XMMRegister dst, XMMRegister src, RoundingMode mode) roundsd() argument 2314 movmskpd(Register dst, XMMRegister src) movmskpd() argument 2322 movmskps(Register dst, XMMRegister src) movmskps() argument 2329 pmovmskb(Register dst, XMMRegister src) pmovmskb() argument 2337 cmpltsd(XMMRegister dst, XMMRegister src) cmpltsd() argument 2346 movaps(XMMRegister dst, Operand src) movaps() argument 2353 movups(XMMRegister dst, Operand src) movups() argument 2360 movups(Operand dst, XMMRegister src) movups() argument 2367 movddup(XMMRegister dst, Operand src) movddup() argument 2376 movshdup(XMMRegister dst, XMMRegister src) movshdup() argument 2385 shufps(XMMRegister dst, XMMRegister src, byte imm8) shufps() argument 2394 shufpd(XMMRegister dst, XMMRegister src, byte imm8) shufpd() argument 2404 movhlps(XMMRegister dst, XMMRegister src) movhlps() argument 2411 movlhps(XMMRegister dst, XMMRegister src) movlhps() argument 2418 movlps(XMMRegister dst, Operand src) movlps() argument 2425 movlps(Operand dst, XMMRegister src) movlps() argument 2432 movhps(XMMRegister dst, Operand src) movhps() argument 2439 movhps(Operand dst, XMMRegister src) movhps() argument 2446 movdqa(Operand dst, XMMRegister src) movdqa() argument 2454 movdqa(XMMRegister dst, Operand src) movdqa() argument 2462 movdqa(XMMRegister dst, XMMRegister src) movdqa() argument 2470 movdqu(Operand dst, XMMRegister src) movdqu() argument 2478 movdqu(XMMRegister dst, Operand src) movdqu() argument 2486 movdqu(XMMRegister dst, XMMRegister src) movdqu() argument 2504 movsd(Operand dst, XMMRegister src) movsd() argument 2512 movsd(XMMRegister dst, Operand src) movsd() argument 2520 movss(Operand dst, XMMRegister src) movss() argument 2528 movss(XMMRegister dst, Operand src) movss() argument 2536 movd(XMMRegister dst, Operand src) movd() argument 2544 movd(Operand dst, XMMRegister src) movd() argument 2552 extractps(Operand dst, XMMRegister src, byte imm8) extractps() argument 2564 extractps(Register dst, XMMRegister src, byte imm8) extractps() argument 2576 pcmpgtq(XMMRegister dst, XMMRegister src) pcmpgtq() argument 2658 pshufhw(XMMRegister dst, Operand src, uint8_t shuffle) pshufhw() argument 2667 pshuflw(XMMRegister dst, Operand src, uint8_t shuffle) pshuflw() argument 2676 pshufd(XMMRegister dst, Operand src, uint8_t shuffle) pshufd() argument 2685 pblendw(XMMRegister dst, Operand src, uint8_t mask) pblendw() argument 2696 palignr(XMMRegister dst, Operand src, uint8_t mask) palignr() argument 2707 pextrb(Operand dst, XMMRegister src, uint8_t offset) pextrb() argument 2718 pextrw(Operand dst, XMMRegister src, uint8_t offset) pextrw() argument 2729 pextrd(Operand dst, XMMRegister src, uint8_t offset) pextrd() argument 2740 insertps(XMMRegister dst, Operand src, uint8_t offset) insertps() argument 2751 pinsrb(XMMRegister dst, Operand src, uint8_t offset) pinsrb() argument 2762 pinsrw(XMMRegister dst, Operand src, uint8_t offset) pinsrw() argument 2772 pinsrd(XMMRegister dst, Operand src, uint8_t offset) pinsrd() argument 2783 addss(XMMRegister dst, Operand src) addss() argument 2791 subss(XMMRegister dst, Operand src) subss() argument 2799 mulss(XMMRegister dst, Operand src) mulss() argument 2807 divss(XMMRegister dst, Operand src) divss() argument 2815 sqrtss(XMMRegister dst, Operand src) sqrtss() argument 2823 ucomiss(XMMRegister dst, Operand src) ucomiss() argument 2830 maxss(XMMRegister dst, Operand src) maxss() argument 2838 minss(XMMRegister dst, Operand src) minss() argument 2847 ps(byte opcode, XMMRegister dst, Operand src) ps() argument 2855 pd(byte opcode, XMMRegister dst, Operand src) pd() argument 2865 vss(byte op, XMMRegister dst, XMMRegister src1, Operand src2) vss() argument 2869 vps(byte op, XMMRegister dst, XMMRegister src1, Operand src2) vps() argument 2873 vpd(byte op, XMMRegister dst, XMMRegister src1, Operand src2) vpd() argument 2877 vshufpd(XMMRegister dst, XMMRegister src1, Operand src2, byte imm8) vshufpd() argument 2884 vmovhlps(XMMRegister dst, XMMRegister src1, XMMRegister src2) vmovhlps() argument 2888 vmovlhps(XMMRegister dst, XMMRegister src1, XMMRegister src2) vmovlhps() argument 2892 vmovlps(XMMRegister dst, XMMRegister src1, Operand src2) vmovlps() argument 2896 vmovlps(Operand dst, XMMRegister src) vmovlps() argument 2900 vmovhps(XMMRegister dst, XMMRegister src1, Operand src2) vmovhps() argument 2904 vmovhps(Operand dst, XMMRegister src) vmovhps() argument 2908 vcmpps(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t cmp) vcmpps() argument 2914 vcmppd(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t cmp) vcmppd() argument 2920 vshufps(XMMRegister dst, XMMRegister src1, Operand src2, byte imm8) vshufps() argument 2927 vpsllw(XMMRegister dst, XMMRegister src, uint8_t imm8) vpsllw() argument 2933 vpslld(XMMRegister dst, XMMRegister src, uint8_t imm8) vpslld() argument 2939 vpsllq(XMMRegister dst, XMMRegister src, uint8_t imm8) vpsllq() argument 2945 vpsrlw(XMMRegister dst, XMMRegister src, uint8_t imm8) vpsrlw() argument 2951 vpsrld(XMMRegister dst, XMMRegister src, uint8_t imm8) vpsrld() argument 2957 vpsrlq(XMMRegister dst, XMMRegister src, uint8_t imm8) vpsrlq() argument 2963 vpsraw(XMMRegister dst, XMMRegister src, uint8_t imm8) vpsraw() argument 2969 vpsrad(XMMRegister dst, XMMRegister src, uint8_t imm8) vpsrad() argument 2975 vpshufhw(XMMRegister dst, Operand src, uint8_t shuffle) vpshufhw() argument 2980 vpshuflw(XMMRegister dst, Operand src, uint8_t shuffle) vpshuflw() argument 2985 vpshufd(XMMRegister dst, Operand src, uint8_t shuffle) vpshufd() argument 2990 vblendvps(XMMRegister dst, XMMRegister src1, XMMRegister src2, XMMRegister mask) vblendvps() argument 2996 vblendvpd(XMMRegister dst, XMMRegister src1, XMMRegister src2, XMMRegister mask) vblendvpd() argument 3002 vpblendvb(XMMRegister dst, XMMRegister src1, XMMRegister src2, XMMRegister mask) vpblendvb() argument 3008 vpblendw(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t mask) vpblendw() argument 3014 vpalignr(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t mask) vpalignr() argument 3020 vpextrb(Operand dst, XMMRegister src, uint8_t offset) vpextrb() argument 3025 vpextrw(Operand dst, XMMRegister src, uint8_t offset) vpextrw() argument 3030 vpextrd(Operand dst, XMMRegister src, uint8_t offset) vpextrd() argument 3035 vinsertps(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t offset) vinsertps() argument 3041 vpinsrb(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t offset) vpinsrb() argument 3047 vpinsrw(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t offset) vpinsrw() argument 3053 vpinsrd(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t offset) vpinsrd() argument 3059 vroundsd(XMMRegister dst, XMMRegister src1, XMMRegister src2, RoundingMode mode) vroundsd() argument 3064 vroundss(XMMRegister dst, XMMRegister src1, XMMRegister src2, RoundingMode mode) vroundss() argument 3069 vroundps(XMMRegister dst, XMMRegister src, RoundingMode mode) vroundps() argument 3073 vroundpd(XMMRegister dst, XMMRegister src, RoundingMode mode) vroundpd() argument 3078 vmovmskpd(Register dst, XMMRegister src) vmovmskpd() argument 3086 vmovmskps(Register dst, XMMRegister src) vmovmskps() argument 3094 vpmovmskb(Register dst, XMMRegister src) vpmovmskb() argument 3102 vextractps(Operand dst, XMMRegister src, byte imm8) vextractps() argument 3107 vpcmpgtq(XMMRegister dst, XMMRegister src1, XMMRegister src2) vpcmpgtq() argument 3119 tzcnt(Register dst, Operand src) tzcnt() argument 3128 lzcnt(Register dst, Operand src) lzcnt() argument 3137 popcnt(Register dst, Operand src) popcnt() argument 3155 rorx(Register dst, Operand src, byte imm8) rorx() argument 3166 sse_instr(XMMRegister dst, Operand src, byte escape, byte opcode) sse_instr() argument 3174 sse2_instr(XMMRegister dst, Operand src, byte prefix, byte escape, byte opcode) sse2_instr() argument 3183 ssse3_instr(XMMRegister dst, Operand src, byte prefix, byte escape1, byte escape2, byte opcode) ssse3_instr() argument 3194 sse4_instr(XMMRegister dst, Operand src, byte prefix, byte escape1, byte escape2, byte opcode) sse4_instr() argument 3205 vinstr(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2, SIMDPrefix pp, LeadingOpcode m, VexW w, CpuFeature feature) vinstr() argument 3211 vinstr(byte op, XMMRegister dst, XMMRegister src1, Operand src2, SIMDPrefix pp, LeadingOpcode m, VexW w, CpuFeature feature) vinstr() argument 3217 vinstr(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2, VectorLength l, SIMDPrefix pp, LeadingOpcode m, VexW w, CpuFeature feature) vinstr() argument 3227 vinstr(byte op, XMMRegister dst, XMMRegister src1, Operand src2, VectorLength l, SIMDPrefix pp, LeadingOpcode m, VexW w, CpuFeature feature) vinstr() argument 3242 emit_sse_operand(XMMRegister dst, XMMRegister src) emit_sse_operand() argument 3246 emit_sse_operand(Register dst, XMMRegister src) emit_sse_operand() argument 3250 emit_sse_operand(XMMRegister dst, Register src) emit_sse_operand() argument 3327 emit_arith_b(int op1, int op2, Register dst, int imm8) emit_arith_b() argument 3336 emit_arith(int sel, Operand dst, const Immediate& x) emit_arith() argument [all...] |
| /third_party/node/deps/v8/src/codegen/loong64/ |
| H A D | macro-assembler-loong64.cc | 1108 void TurboAssembler::li(Register dst, Handle<HeapObject> value, LiFlags mode) { in CallRecordWriteStub() argument 1119 void TurboAssembler::li(Register dst, ExternalReference value, LiFlags mode) { in CallRecordWriteStub() argument 1130 void TurboAssembler::li(Register dst, const StringConstantBase* string, in CallRecordWriteStub() argument 1768 void TurboAssembler::RoundDouble(FPURegister dst, FPURegiste in CallRecordWriteStub() argument 1779 Floor_d(FPURegister dst, FPURegister src) CallRecordWriteStub() argument 1783 Ceil_d(FPURegister dst, FPURegister src) CallRecordWriteStub() argument 1787 Trunc_d(FPURegister dst, FPURegister src) CallRecordWriteStub() argument 1791 Round_d(FPURegister dst, FPURegister src) CallRecordWriteStub() argument 1795 RoundFloat(FPURegister dst, FPURegister src, FPURoundingMode mode) CallRecordWriteStub() argument 1806 Floor_s(FPURegister dst, FPURegister src) CallRecordWriteStub() argument 1810 Ceil_s(FPURegister dst, FPURegister src) CallRecordWriteStub() argument 1814 Trunc_s(FPURegister dst, FPURegister src) CallRecordWriteStub() argument 1818 Round_s(FPURegister dst, FPURegister src) CallRecordWriteStub() argument 1873 FmoveLow(FPURegister dst, Register src_low) CallRecordWriteStub() argument 1882 Move(FPURegister dst, uint32_t src) CallRecordWriteStub() argument 1889 Move(FPURegister dst, uint64_t src) CallRecordWriteStub() argument 2938 FPUCanonicalizeNaN(const DoubleRegister dst, const DoubleRegister src) CallRecordWriteStub() argument 3196 AddOverflow_d(Register dst, Register left, const Operand& right, Register overflow) CallRecordWriteStub() argument 3229 SubOverflow_d(Register dst, Register left, const Operand& right, Register overflow) CallRecordWriteStub() argument 3262 MulOverflow_w(Register dst, Register left, const Operand& right, Register overflow) CallRecordWriteStub() argument 3451 LoadNativeContextSlot(Register dst, int index) CallRecordWriteStub() argument 3659 SmiUntag(Register dst, const MemOperand& src) CallRecordWriteStub() argument 3814 Float32Max(FPURegister dst, FPURegister src1, FPURegister src2, Label* out_of_line) CallRecordWriteStub() argument 3829 Float32MaxOutOfLine(FPURegister dst, FPURegister src1, FPURegister src2) CallRecordWriteStub() argument 3834 Float32Min(FPURegister dst, FPURegister src1, FPURegister src2, Label* out_of_line) CallRecordWriteStub() argument 3849 Float32MinOutOfLine(FPURegister dst, FPURegister src1, FPURegister src2) CallRecordWriteStub() argument 3854 Float64Max(FPURegister dst, FPURegister src1, FPURegister src2, Label* out_of_line) CallRecordWriteStub() argument 3869 Float64MaxOutOfLine(FPURegister dst, FPURegister src1, FPURegister src2) CallRecordWriteStub() argument 3874 Float64Min(FPURegister dst, FPURegister src1, FPURegister src2, Label* out_of_line) CallRecordWriteStub() argument 3889 Float64MinOutOfLine(FPURegister dst, FPURegister src1, FPURegister src2) CallRecordWriteStub() argument 4076 ComputeCodeStartAddress(Register dst) CallRecordWriteStub() argument [all...] |
| /third_party/node/deps/v8/src/codegen/x64/ |
| H A D | assembler-x64.cc | 714 void Assembler::immediate_arithmetic_op(byte subcode, Register dst, in immediate_arithmetic_op() argument 732 void Assembler::immediate_arithmetic_op(byte subcode, Operand dst, in immediate_arithmetic_op() argument 747 void Assembler::immediate_arithmetic_op_16(byte subcode, Register dst, in immediate_arithmetic_op_16() argument 766 immediate_arithmetic_op_16(byte subcode, Operand dst, Immediate src) immediate_arithmetic_op_16() argument 782 immediate_arithmetic_op_8(byte subcode, Operand dst, Immediate src) immediate_arithmetic_op_8() argument 792 immediate_arithmetic_op_8(byte subcode, Register dst, Immediate src) immediate_arithmetic_op_8() argument 805 shift(Register dst, Immediate shift_amount, int subcode, int size) shift() argument 822 shift(Operand dst, Immediate shift_amount, int subcode, int size) shift() argument 839 shift(Register dst, int subcode, int size) shift() argument 846 shift(Operand dst, int subcode, int size) shift() argument 853 bswapl(Register dst) bswapl() argument 860 bswapq(Register dst) bswapq() argument 867 btq(Operand dst, Register src) btq() argument 875 btsq(Operand dst, Register src) btsq() argument 883 btsq(Register dst, Immediate imm8) btsq() argument 892 btrq(Register dst, Immediate imm8) btrq() argument 901 bsrl(Register dst, Register src) bsrl() argument 909 bsrl(Register dst, Operand src) bsrl() argument 917 bsrq(Register dst, Register src) bsrq() argument 925 bsrq(Register dst, Operand src) bsrq() argument 933 bsfl(Register dst, Register src) bsfl() argument 941 bsfl(Register dst, Operand src) bsfl() argument 949 bsfq(Register dst, Register src) bsfq() argument 957 bsfq(Register dst, Operand src) bsfq() argument 965 pblendw(XMMRegister dst, Operand src, uint8_t mask) pblendw() argument 970 pblendw(XMMRegister dst, XMMRegister src, uint8_t mask) pblendw() argument 975 palignr(XMMRegister dst, Operand src, uint8_t mask) palignr() argument 980 palignr(XMMRegister dst, XMMRegister src, uint8_t mask) palignr() argument 1070 cmovq(Condition cc, Register dst, Register src) cmovq() argument 1087 cmovq(Condition cc, Register dst, Operand src) cmovq() argument 1102 cmovl(Condition cc, Register dst, Register src) cmovl() argument 1117 cmovl(Condition cc, Register dst, Operand src) cmovl() argument 1144 xaddb(Operand dst, Register src) xaddb() argument 1152 xaddw(Operand dst, Register src) xaddw() argument 1161 xaddl(Operand dst, Register src) xaddl() argument 1169 xaddq(Operand dst, Register src) xaddq() argument 1177 cmpxchgb(Operand dst, Register src) cmpxchgb() argument 1190 cmpxchgw(Operand dst, Register src) cmpxchgw() argument 1199 emit_cmpxchg(Operand dst, Register src, int size) emit_cmpxchg() argument 1233 emit_dec(Register dst, int size) emit_dec() argument 1240 emit_dec(Operand dst, int size) emit_dec() argument 1247 decb(Register dst) decb() argument 1257 decb(Operand dst) decb() argument 1297 emit_imul(Register dst, Register src, int size) emit_imul() argument 1305 emit_imul(Register dst, Operand src, int size) emit_imul() argument 1313 emit_imul(Register dst, Register src, Immediate imm, int size) emit_imul() argument 1327 emit_imul(Register dst, Operand src, Immediate imm, int size) emit_imul() argument 1341 emit_inc(Register dst, int size) emit_inc() argument 1348 emit_inc(Operand dst, int size) emit_inc() argument 1564 emit_lea(Register dst, Operand src, int size) emit_lea() argument 1587 movb(Register dst, Operand src) movb() argument 1599 movb(Register dst, Immediate imm) movb() argument 1609 movb(Operand dst, Register src) movb() argument 1621 movb(Operand dst, Immediate imm) movb() argument 1629 movw(Register dst, Operand src) movw() argument 1637 movw(Operand dst, Register src) movw() argument 1645 movw(Operand dst, Immediate imm) movw() argument 1655 emit_mov(Register dst, Operand src, int size) emit_mov() argument 1662 emit_mov(Register dst, Register src, int size) emit_mov() argument 1681 emit_mov(Operand dst, Register src, int size) emit_mov() argument 1688 emit_mov(Register dst, Immediate value, int size) emit_mov() argument 1701 emit_mov(Operand dst, Immediate value, int size) emit_mov() argument 1709 emit_mov(Register dst, Immediate64 value, int size) emit_mov() argument 1724 movq_imm64(Register dst, int64_t value) movq_imm64() argument 1731 movq_heap_number(Register dst, double value) movq_heap_number() argument 1739 movq_string(Register dst, const StringConstantBase* str) movq_string() argument 1749 movl(Operand dst, Label* src) movl() argument 1769 movsxbl(Register dst, Register src) movsxbl() argument 1782 movsxbl(Register dst, Operand src) movsxbl() argument 1790 movsxbq(Register dst, Operand src) movsxbq() argument 1798 movsxbq(Register dst, Register src) movsxbq() argument 1806 movsxwl(Register dst, Register src) movsxwl() argument 1814 movsxwl(Register dst, Operand src) movsxwl() argument 1822 movsxwq(Register dst, Operand src) movsxwq() argument 1830 movsxwq(Register dst, Register src) movsxwq() argument 1838 movsxlq(Register dst, Register src) movsxlq() argument 1845 movsxlq(Register dst, Operand src) movsxlq() argument 1852 emit_movzxb(Register dst, Operand src, int size) emit_movzxb() argument 1862 emit_movzxb(Register dst, Register src, int size) emit_movzxb() argument 1877 emit_movzxw(Register dst, Operand src, int size) emit_movzxw() argument 1887 emit_movzxw(Register dst, Register src, int size) emit_movzxw() argument 2014 emit_not(Register dst, int size) emit_not() argument 2021 emit_not(Operand dst, int size) emit_not() argument 2062 popq(Register dst) popq() argument 2068 popq(Operand dst) popq() argument 2164 shld(Register dst, Register src) shld() argument 2172 shrd(Register dst, Register src) shrd() argument 2200 emit_xchg(Register dst, Register src, int size) emit_xchg() argument 2217 emit_xchg(Register dst, Operand src, int size) emit_xchg() argument 2224 store_rax(Address dst, RelocInfo::Mode mode) store_rax() argument 2242 testb(Register dst, Register src) testb() argument 2261 testw(Register dst, Register src) testw() argument 2277 emit_test(Register dst, Register src, int size) emit_test() argument 2706 movd(XMMRegister dst, Register src) movd() argument 2716 movd(XMMRegister dst, Operand src) movd() argument 2726 movd(Register dst, XMMRegister src) movd() argument 2736 movq(XMMRegister dst, Register src) movq() argument 2747 movq(XMMRegister dst, Operand src) movq() argument 2758 movq(Register dst, XMMRegister src) movq() argument 2769 movq(XMMRegister dst, XMMRegister src) movq() argument 2789 movdqa(Operand dst, XMMRegister src) movdqa() argument 2798 movdqa(XMMRegister dst, Operand src) movdqa() argument 2807 movdqa(XMMRegister dst, XMMRegister src) movdqa() argument 2816 movdqu(Operand dst, XMMRegister src) movdqu() argument 2825 movdqu(XMMRegister dst, Operand src) movdqu() argument 2834 movdqu(XMMRegister dst, XMMRegister src) movdqu() argument 2843 pinsrw(XMMRegister dst, Register src, uint8_t imm8) pinsrw() argument 2853 pinsrw(XMMRegister dst, Operand src, uint8_t imm8) pinsrw() argument 2863 pextrq(Register dst, XMMRegister src, int8_t imm8) pextrq() argument 2875 pinsrq(XMMRegister dst, Register src, uint8_t imm8) pinsrq() argument 2887 pinsrq(XMMRegister dst, Operand src, uint8_t imm8) pinsrq() argument 2899 pinsrd(XMMRegister dst, Register src, uint8_t imm8) pinsrd() argument 2903 pinsrd(XMMRegister dst, Operand src, uint8_t imm8) pinsrd() argument 2908 pinsrb(XMMRegister dst, Register src, uint8_t imm8) pinsrb() argument 2912 pinsrb(XMMRegister dst, Operand src, uint8_t imm8) pinsrb() argument 2917 insertps(XMMRegister dst, XMMRegister src, byte imm8) insertps() argument 2923 insertps(XMMRegister dst, Operand src, byte imm8) insertps() argument 2929 movsd(Operand dst, XMMRegister src) movsd() argument 2939 movsd(XMMRegister dst, XMMRegister src) movsd() argument 2949 movsd(XMMRegister dst, Operand src) movsd() argument 2959 movaps(XMMRegister dst, XMMRegister src) movaps() argument 2976 movaps(XMMRegister dst, Operand src) movaps() argument 2985 shufps(XMMRegister dst, XMMRegister src, byte imm8) shufps() argument 2995 movapd(XMMRegister dst, XMMRegister src) movapd() argument 3014 movupd(XMMRegister dst, Operand src) movupd() argument 3023 movupd(Operand dst, XMMRegister src) movupd() argument 3032 ucomiss(XMMRegister dst, XMMRegister src) ucomiss() argument 3041 ucomiss(XMMRegister dst, Operand src) ucomiss() argument 3050 movss(XMMRegister dst, XMMRegister src) movss() argument 3060 movss(XMMRegister dst, Operand src) movss() argument 3070 movss(Operand src, XMMRegister dst) movss() argument 3080 movlps(XMMRegister dst, Operand src) movlps() argument 3089 movlps(Operand src, XMMRegister dst) movlps() argument 3098 movhps(XMMRegister dst, Operand src) movhps() argument 3107 movhps(Operand src, XMMRegister dst) movhps() argument 3116 cmpps(XMMRegister dst, XMMRegister src, int8_t cmp) cmpps() argument 3125 cmpps(XMMRegister dst, Operand src, int8_t cmp) cmpps() argument 3134 cmppd(XMMRegister dst, XMMRegister src, int8_t cmp) cmppd() argument 3144 cmppd(XMMRegister dst, Operand src, int8_t cmp) cmppd() argument 3154 cvtdq2pd(XMMRegister dst, XMMRegister src) cvtdq2pd() argument 3158 cvttss2si(Register dst, Operand src) cvttss2si() argument 3168 cvttss2si(Register dst, XMMRegister src) cvttss2si() argument 3178 cvttsd2si(Register dst, Operand src) cvttsd2si() argument 3188 cvttsd2si(Register dst, XMMRegister src) cvttsd2si() argument 3198 cvttss2siq(Register dst, XMMRegister src) cvttss2siq() argument 3208 cvttss2siq(Register dst, Operand src) cvttss2siq() argument 3218 cvttsd2siq(Register dst, XMMRegister src) cvttsd2siq() argument 3228 cvttsd2siq(Register dst, Operand src) cvttsd2siq() argument 3238 cvttps2dq(XMMRegister dst, Operand src) cvttps2dq() argument 3247 cvttps2dq(XMMRegister dst, XMMRegister src) cvttps2dq() argument 3256 cvtlsi2sd(XMMRegister dst, Operand src) cvtlsi2sd() argument 3266 cvtlsi2sd(XMMRegister dst, Register src) cvtlsi2sd() argument 3276 cvtlsi2ss(XMMRegister dst, Operand src) cvtlsi2ss() argument 3286 cvtlsi2ss(XMMRegister dst, Register src) cvtlsi2ss() argument 3295 cvtqsi2ss(XMMRegister dst, Operand src) cvtqsi2ss() argument 3305 cvtqsi2ss(XMMRegister dst, Register src) cvtqsi2ss() argument 3315 cvtqsi2sd(XMMRegister dst, Operand src) cvtqsi2sd() argument 3325 cvtqsi2sd(XMMRegister dst, Register src) cvtqsi2sd() argument 3335 cvtsd2si(Register dst, XMMRegister src) cvtsd2si() argument 3345 cvtsd2siq(Register dst, XMMRegister src) cvtsd2siq() argument 3355 haddps(XMMRegister dst, XMMRegister src) haddps() argument 3365 haddps(XMMRegister dst, Operand src) haddps() argument 3375 cmpeqss(XMMRegister dst, XMMRegister src) cmpeqss() argument 3386 cmpeqsd(XMMRegister dst, XMMRegister src) cmpeqsd() argument 3397 cmpltsd(XMMRegister dst, XMMRegister src) cmpltsd() argument 3407 roundss(XMMRegister dst, XMMRegister src, RoundingMode mode) roundss() argument 3414 roundss(XMMRegister dst, Operand src, RoundingMode mode) roundss() argument 3421 roundsd(XMMRegister dst, XMMRegister src, RoundingMode mode) roundsd() argument 3428 roundsd(XMMRegister dst, Operand src, RoundingMode mode) roundsd() argument 3435 roundps(XMMRegister dst, XMMRegister src, RoundingMode mode) roundps() argument 3442 roundpd(XMMRegister dst, XMMRegister src, RoundingMode mode) roundpd() argument 3449 movmskpd(Register dst, XMMRegister src) movmskpd() argument 3458 movmskps(Register dst, XMMRegister src) movmskps() argument 3466 pmovmskb(Register dst, XMMRegister src) pmovmskb() argument 3523 fma_instr(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2, VectorLength l, SIMDPrefix pp, LeadingOpcode m, VexW w) fma_instr() argument 3533 fma_instr(byte op, XMMRegister dst, XMMRegister src1, Operand src2, VectorLength l, SIMDPrefix pp, LeadingOpcode m, VexW w) fma_instr() argument 3543 vmovd(XMMRegister dst, Register src) vmovd() argument 3552 vmovd(XMMRegister dst, Operand src) vmovd() argument 3560 vmovd(Register dst, XMMRegister src) vmovd() argument 3569 vmovq(XMMRegister dst, Register src) vmovq() argument 3578 vmovq(XMMRegister dst, Operand src) vmovq() argument 3586 vmovq(Register dst, XMMRegister src) vmovq() argument 3595 vmovdqa(XMMRegister dst, Operand src) vmovdqa() argument 3603 vmovdqa(XMMRegister dst, XMMRegister src) vmovdqa() argument 3611 vmovdqa(YMMRegister dst, Operand src) vmovdqa() argument 3619 vmovdqa(YMMRegister dst, YMMRegister src) vmovdqa() argument 3627 vmovdqu(XMMRegister dst, Operand src) vmovdqu() argument 3635 vmovdqu(Operand dst, XMMRegister src) vmovdqu() argument 3643 vmovdqu(XMMRegister dst, XMMRegister src) vmovdqu() argument 3651 vmovdqu(YMMRegister dst, Operand src) vmovdqu() argument 3659 vmovdqu(Operand dst, YMMRegister src) vmovdqu() argument 3667 vmovdqu(YMMRegister dst, YMMRegister src) vmovdqu() argument 3675 vmovlps(XMMRegister dst, XMMRegister src1, Operand src2) vmovlps() argument 3683 vmovlps(Operand dst, XMMRegister src) vmovlps() argument 3691 vmovhps(XMMRegister dst, XMMRegister src1, Operand src2) vmovhps() argument 3699 vmovhps(Operand dst, XMMRegister src) vmovhps() argument 3707 vinstr(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2, SIMDPrefix pp, LeadingOpcode m, VexW w, CpuFeature feature) vinstr() argument 3718 vinstr(byte op, XMMRegister dst, XMMRegister src1, Operand src2, SIMDPrefix pp, LeadingOpcode m, VexW w, CpuFeature feature) vinstr() argument 3730 vinstr(byte op, Reg1 dst, Reg2 src1, Op src2, SIMDPrefix pp, LeadingOpcode m, VexW w, CpuFeature feature) vinstr() argument 3756 vps(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2) vps() argument 3765 vps(byte op, YMMRegister dst, YMMRegister src1, YMMRegister src2) vps() argument 3774 vps(byte op, XMMRegister dst, XMMRegister src1, Operand src2) vps() argument 3782 vps(byte op, YMMRegister dst, YMMRegister src1, Operand src2) vps() argument 3790 vps(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2, byte imm8) vps() argument 3800 vps(byte op, YMMRegister dst, YMMRegister src1, YMMRegister src2, byte imm8) vps() argument 3832 vucomiss(XMMRegister dst, XMMRegister src) vucomiss() argument 3840 vucomiss(XMMRegister dst, Operand src) vucomiss() argument 3848 vpmovmskb(Register dst, XMMRegister src) vpmovmskb() argument 3857 vss(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2) vss() argument 3866 vss(byte op, XMMRegister dst, XMMRegister src1, Operand src2) vss() argument 3906 tzcntq(Register dst, Register src) tzcntq() argument 3916 tzcntq(Register dst, Operand src) tzcntq() argument 3926 tzcntl(Register dst, Register src) tzcntl() argument 3936 tzcntl(Register dst, Operand src) tzcntl() argument 3946 lzcntq(Register dst, Register src) lzcntq() argument 3956 lzcntq(Register dst, Operand src) lzcntq() argument 3966 lzcntl(Register dst, Register src) lzcntl() argument 3976 lzcntl(Register dst, Operand src) lzcntl() argument 3986 popcntq(Register dst, Register src) popcntq() argument 3996 popcntq(Register dst, Operand src) popcntq() argument 4006 popcntl(Register dst, Register src) popcntl() argument 4016 popcntl(Register dst, Operand src) popcntl() argument 4062 rorxq(Register dst, Register src, byte imm8) rorxq() argument 4073 rorxq(Register dst, Operand src, byte imm8) rorxq() argument 4084 rorxl(Register dst, Register src, byte imm8) rorxl() argument 4095 rorxl(Register dst, Operand src, byte imm8) rorxl() argument 4111 movups(XMMRegister dst, XMMRegister src) movups() argument 4127 movups(XMMRegister dst, Operand src) movups() argument 4135 movups(Operand dst, XMMRegister src) movups() argument 4143 sse_instr(XMMRegister dst, XMMRegister src, byte escape, byte opcode) sse_instr() argument 4152 sse_instr(XMMRegister dst, Operand src, byte escape, byte opcode) sse_instr() argument 4161 sse2_instr(XMMRegister dst, XMMRegister src, byte prefix, byte escape, byte opcode) sse2_instr() argument 4171 sse2_instr(XMMRegister dst, Operand src, byte prefix, byte escape, byte opcode) sse2_instr() argument 4181 ssse3_instr(XMMRegister dst, XMMRegister src, byte prefix, byte escape1, byte escape2, byte opcode) ssse3_instr() argument 4193 ssse3_instr(XMMRegister dst, Operand src, byte prefix, byte escape1, byte escape2, byte opcode) ssse3_instr() argument 4205 sse4_instr(XMMRegister dst, Register src, byte prefix, byte escape1, byte escape2, byte opcode, int8_t imm8) sse4_instr() argument 4220 sse4_instr(XMMRegister dst, XMMRegister src, byte prefix, byte escape1, byte escape2, byte opcode) sse4_instr() argument 4232 sse4_instr(XMMRegister dst, Operand src, byte prefix, byte escape1, byte escape2, byte opcode) sse4_instr() argument 4244 sse4_instr(Register dst, XMMRegister src, byte prefix, byte escape1, byte escape2, byte opcode, int8_t imm8) sse4_instr() argument 4259 sse4_instr(Operand dst, XMMRegister src, byte prefix, byte escape1, byte escape2, byte opcode, int8_t imm8) sse4_instr() argument 4274 sse4_2_instr(XMMRegister dst, XMMRegister src, byte prefix, byte escape1, byte escape2, byte opcode) sse4_2_instr() argument 4286 sse4_2_instr(XMMRegister dst, Operand src, byte prefix, byte escape1, byte escape2, byte opcode) sse4_2_instr() argument 4298 lddqu(XMMRegister dst, Operand src) lddqu() argument 4308 movddup(XMMRegister dst, XMMRegister src) movddup() argument 4318 movddup(XMMRegister dst, Operand src) movddup() argument 4328 movshdup(XMMRegister dst, XMMRegister src) movshdup() argument 4338 psrldq(XMMRegister dst, uint8_t shift) psrldq() argument 4348 pshufhw(XMMRegister dst, XMMRegister src, uint8_t shuffle) pshufhw() argument 4358 pshufhw(XMMRegister dst, Operand src, uint8_t shuffle) pshufhw() argument 4368 pshuflw(XMMRegister dst, XMMRegister src, uint8_t shuffle) pshuflw() argument 4378 pshuflw(XMMRegister dst, Operand src, uint8_t shuffle) pshuflw() argument 4388 pshufd(XMMRegister dst, XMMRegister src, uint8_t shuffle) pshufd() argument 4398 pshufd(XMMRegister dst, Operand src, uint8_t shuffle) pshufd() argument 4417 emit_sse_operand(XMMRegister dst, XMMRegister src) emit_sse_operand() argument 4421 emit_sse_operand(XMMRegister dst, Register src) emit_sse_operand() argument 4425 emit_sse_operand(Register dst, XMMRegister src) emit_sse_operand() argument 4429 emit_sse_operand(XMMRegister dst) emit_sse_operand() argument [all...] |
| H A D | macro-assembler-x64.cc | 265 void TurboAssembler::SmiUntagField(Register dst, Operand src) { in SmiUntagField() argument 874 void TurboAssembler::Movq(XMMRegister dst, Register src) { in CallRecordWriteStub() argument 883 void TurboAssembler::Movq(Register dst, XMMRegister src) { in CallRecordWriteStub() argument 892 void TurboAssembler::Pextrq(Register dst, XMMRegister src, int8_t imm8) { in CallRecordWriteStub() argument 902 Cvtss2sd(XMMRegister dst, XMMRegister src) CallRecordWriteStub() argument 911 Cvtss2sd(XMMRegister dst, Operand src) CallRecordWriteStub() argument 920 Cvtsd2ss(XMMRegister dst, XMMRegister src) CallRecordWriteStub() argument 929 Cvtsd2ss(XMMRegister dst, Operand src) CallRecordWriteStub() argument 938 Cvtlsi2sd(XMMRegister dst, Register src) CallRecordWriteStub() argument 948 Cvtlsi2sd(XMMRegister dst, Operand src) CallRecordWriteStub() argument 958 Cvtlsi2ss(XMMRegister dst, Register src) CallRecordWriteStub() argument 968 Cvtlsi2ss(XMMRegister dst, Operand src) CallRecordWriteStub() argument 978 Cvtqsi2ss(XMMRegister dst, Register src) CallRecordWriteStub() argument 988 Cvtqsi2ss(XMMRegister dst, Operand src) CallRecordWriteStub() argument 998 Cvtqsi2sd(XMMRegister dst, Register src) CallRecordWriteStub() argument 1008 Cvtqsi2sd(XMMRegister dst, Operand src) CallRecordWriteStub() argument 1018 Cvtlui2ss(XMMRegister dst, Register src) CallRecordWriteStub() argument 1024 Cvtlui2ss(XMMRegister dst, Operand src) CallRecordWriteStub() argument 1030 Cvtlui2sd(XMMRegister dst, Register src) CallRecordWriteStub() argument 1036 Cvtlui2sd(XMMRegister dst, Operand src) CallRecordWriteStub() argument 1042 Cvtqui2ss(XMMRegister dst, Register src) CallRecordWriteStub() argument 1061 Cvtqui2ss(XMMRegister dst, Operand src) CallRecordWriteStub() argument 1066 Cvtqui2sd(XMMRegister dst, Register src) CallRecordWriteStub() argument 1085 Cvtqui2sd(XMMRegister dst, Operand src) CallRecordWriteStub() argument 1090 Cvttss2si(Register dst, XMMRegister src) CallRecordWriteStub() argument 1099 Cvttss2si(Register dst, Operand src) CallRecordWriteStub() argument 1108 Cvttsd2si(Register dst, XMMRegister src) CallRecordWriteStub() argument 1117 Cvttsd2si(Register dst, Operand src) CallRecordWriteStub() argument 1126 Cvttss2siq(Register dst, XMMRegister src) CallRecordWriteStub() argument 1135 Cvttss2siq(Register dst, Operand src) CallRecordWriteStub() argument 1144 Cvttsd2siq(Register dst, XMMRegister src) CallRecordWriteStub() argument 1153 Cvttsd2siq(Register dst, Operand src) CallRecordWriteStub() argument 1164 ConvertFloatToUint64(TurboAssembler* tasm, Register dst, OperandOrXMMRegister src, Label* fail) CallRecordWriteStub() argument 1202 Cvttsd2uiq(Register dst, Operand src, Label* fail) CallRecordWriteStub() argument 1206 Cvttsd2uiq(Register dst, XMMRegister src, Label* fail) CallRecordWriteStub() argument 1210 Cvttss2uiq(Register dst, Operand src, Label* fail) CallRecordWriteStub() argument 1214 Cvttss2uiq(Register dst, XMMRegister src, Label* fail) CallRecordWriteStub() argument 1218 Cmpeqss(XMMRegister dst, XMMRegister src) CallRecordWriteStub() argument 1227 Cmpeqsd(XMMRegister dst, XMMRegister src) CallRecordWriteStub() argument 1244 Cmp(Register dst, int32_t src) CallRecordWriteStub() argument 1262 SmiTag(Register dst, Register src) CallRecordWriteStub() argument 1283 SmiUntag(Register dst, Register src) CallRecordWriteStub() argument 1297 SmiUntag(Register dst, Operand src) CallRecordWriteStub() argument 1329 SmiCompare(Register dst, Smi src) CallRecordWriteStub() argument 1334 Cmp(Register dst, Smi src) CallRecordWriteStub() argument 1344 SmiCompare(Register dst, Operand src) CallRecordWriteStub() argument 1350 SmiCompare(Operand dst, Register src) CallRecordWriteStub() argument 1356 SmiCompare(Operand dst, Smi src) CallRecordWriteStub() argument 1366 Cmp(Operand dst, Smi src) CallRecordWriteStub() argument 1403 SmiAddConstant(Operand dst, Smi constant) CallRecordWriteStub() argument 1423 SmiToIndex(Register dst, Register src, int shift) CallRecordWriteStub() argument 1475 Move(Register dst, Smi source) CallRecordWriteStub() argument 1488 Move(Operand dst, intptr_t x) CallRecordWriteStub() argument 1497 Move(Register dst, ExternalReference ext) CallRecordWriteStub() argument 1508 Move(Register dst, Register src) CallRecordWriteStub() argument 1514 Move(Register dst, Operand src) CallRecordWriteStub() argument 1515 Move(Register dst, Immediate src) CallRecordWriteStub() argument 1523 Move(XMMRegister dst, XMMRegister src) CallRecordWriteStub() argument 1548 MoveNumber(Register dst, double value) CallRecordWriteStub() argument 1557 Move(XMMRegister dst, uint32_t src) CallRecordWriteStub() argument 1576 Move(XMMRegister dst, uint64_t src) CallRecordWriteStub() argument 1601 Move(XMMRegister dst, uint64_t high, uint64_t low) CallRecordWriteStub() argument 1615 Cmp(Register dst, Handle<Object> source) CallRecordWriteStub() argument 1624 Cmp(Operand dst, Handle<Object> source) CallRecordWriteStub() argument 1701 Move(Operand dst, Handle<HeapObject> object, RelocInfo::Mode rmode) CallRecordWriteStub() argument 1801 Pop(Register dst) CallRecordWriteStub() argument 1803 Pop(Operand dst) CallRecordWriteStub() argument 1805 PopQuad(Operand dst) CallRecordWriteStub() argument 2068 PextrdPreSse41(Register dst, XMMRegister src, uint8_t imm8) CallRecordWriteStub() argument 2081 PinsrdPreSse41Helper(TurboAssembler* tasm, XMMRegister dst, Op src, uint8_t imm8, uint32_t* load_pc_offset) CallRecordWriteStub() argument 2094 PinsrdPreSse41(XMMRegister dst, Register src, uint8_t imm8, uint32_t* load_pc_offset) CallRecordWriteStub() argument 2099 PinsrdPreSse41(XMMRegister dst, Operand src, uint8_t imm8, uint32_t* load_pc_offset) CallRecordWriteStub() argument 2104 Pinsrq(XMMRegister dst, XMMRegister src1, Register src2, uint8_t imm8, uint32_t* load_pc_offset) CallRecordWriteStub() argument 2110 Pinsrq(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t imm8, uint32_t* load_pc_offset) CallRecordWriteStub() argument 2116 Lzcntl(Register dst, Register src) CallRecordWriteStub() argument 2130 Lzcntl(Register dst, Operand src) CallRecordWriteStub() argument 2144 Lzcntq(Register dst, Register src) CallRecordWriteStub() argument 2158 Lzcntq(Register dst, Operand src) CallRecordWriteStub() argument 2172 Tzcntq(Register dst, Register src) CallRecordWriteStub() argument 2186 Tzcntq(Register dst, Operand src) CallRecordWriteStub() argument 2200 Tzcntl(Register dst, Register src) CallRecordWriteStub() argument 2213 Tzcntl(Register dst, Operand src) CallRecordWriteStub() argument 2226 Popcntl(Register dst, Register src) CallRecordWriteStub() argument 2235 Popcntl(Register dst, Operand src) CallRecordWriteStub() argument 2244 Popcntq(Register dst, Register src) CallRecordWriteStub() argument 2253 Popcntq(Register dst, Operand src) CallRecordWriteStub() argument 2964 LoadNativeContextSlot(Register dst, int index) CallRecordWriteStub() argument 3111 ComputeCodeStartAddress(Register dst) CallRecordWriteStub() argument [all...] |
| /third_party/node/deps/v8/src/execution/arm64/ |
| H A D | simulator-logic-arm64.cc | 346 void Simulator::ld1(VectorFormat vform, LogicVRegister dst, uint64_t addr) { in ld1() argument 354 void Simulator::ld1(VectorFormat vform, LogicVRegister dst, int index, in ld1() argument 359 void Simulator::ld1r(VectorFormat vform, LogicVRegister dst, uint64_t addr) { in ld1r() argument 514 void Simulator::st2(VectorFormat vform, LogicVRegister dst, LogicVRegister dst2, in st2() argument 526 st2(VectorFormat vform, LogicVRegister dst, LogicVRegister dst2, int index, uint64_t addr) st2() argument 533 st3(VectorFormat vform, LogicVRegister dst, LogicVRegister dst2, LogicVRegister dst3, uint64_t addr) st3() argument 548 st3(VectorFormat vform, LogicVRegister dst, LogicVRegister dst2, LogicVRegister dst3, int index, uint64_t addr) st3() argument 556 st4(VectorFormat vform, LogicVRegister dst, LogicVRegister dst2, LogicVRegister dst3, LogicVRegister dst4, uint64_t addr) st4() argument 574 st4(VectorFormat vform, LogicVRegister dst, LogicVRegister dst2, LogicVRegister dst3, LogicVRegister dst4, int index, uint64_t addr) st4() argument 584 cmp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, Condition cond) cmp() argument 624 cmp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, int imm, Condition cond) cmp() argument 632 cmptst(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) cmptst() argument 644 add(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) add() argument 673 addp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) addp() argument 683 mla(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) mla() argument 692 mls(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) mls() argument 701 mul(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) mul() argument 711 mul(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) mul() argument 719 mla(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) mla() argument 727 mls(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) mls() argument 735 smull(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) smull() argument 744 smull2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) smull2() argument 753 umull(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) umull() argument 762 umull2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) umull2() argument 771 smlal(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) smlal() argument 780 smlal2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) smlal2() argument 789 umlal(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) umlal() argument 798 umlal2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) umlal2() argument 807 smlsl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) smlsl() argument 816 smlsl2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) smlsl2() argument 825 umlsl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) umlsl() argument 834 umlsl2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) umlsl2() argument 843 sqdmull(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) sqdmull() argument 852 sqdmull2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) sqdmull2() argument 861 sqdmlal(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) sqdmlal() argument 870 sqdmlal2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) sqdmlal2() argument 879 sqdmlsl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) sqdmlsl() argument 888 sqdmlsl2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) sqdmlsl2() argument 897 sqdmulh(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) sqdmulh() argument 905 sqrdmulh(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) sqrdmulh() argument 924 pmul(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) pmul() argument 935 pmull(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) pmull() argument 948 pmull2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) pmull2() argument 962 sub(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) sub() argument 991 and_(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) and_() argument 1001 orr(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) orr() argument 1011 orn(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) orn() argument 1021 eor(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) eor() argument 1031 bic(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) bic() argument 1041 bic(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, uint64_t imm) bic() argument 1052 bif(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) bif() argument 1066 bit(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) bit() argument 1080 bsl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) bsl() argument 1094 SMinMax(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, bool max) SMinMax() argument 1112 smax(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) smax() argument 1118 smin(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) smin() argument 1124 SMinMaxP(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, bool max) SMinMaxP() argument 1149 smaxp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) smaxp() argument 1155 sminp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) sminp() argument 1161 addp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) addp() argument 1171 addv(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) addv() argument 1186 saddlv(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) saddlv() argument 1201 uaddlv(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) uaddlv() argument 1216 SMinMaxV(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, bool max) SMinMaxV() argument 1232 smaxv(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) smaxv() argument 1238 sminv(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) sminv() argument 1244 UMinMax(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, bool max) UMinMax() argument 1262 umax(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) umax() argument 1268 umin(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) umin() argument 1274 UMinMaxP(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, bool max) UMinMaxP() argument 1299 umaxp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) umaxp() argument 1305 uminp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) uminp() argument 1311 UMinMaxV(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, bool max) UMinMaxV() argument 1327 umaxv(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) umaxv() argument 1333 uminv(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) uminv() argument 1339 shl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) shl() argument 1347 sshll(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) sshll() argument 1356 sshll2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) sshll2() argument 1365 shll(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) shll() argument 1371 shll2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) shll2() argument 1377 ushll(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) ushll() argument 1386 ushll2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) ushll2() argument 1395 sli(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) sli() argument 1409 sqshl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) sqshl() argument 1417 uqshl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) uqshl() argument 1425 sqshlu(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) sqshlu() argument 1433 sri(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) sri() argument 1456 ushr(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) ushr() argument 1464 sshr(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) sshr() argument 1472 ssra(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) ssra() argument 1479 usra(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) usra() argument 1486 srsra(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) srsra() argument 1493 ursra(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) ursra() argument 1500 cls(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) cls() argument 1513 clz(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) clz() argument 1526 cnt(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) cnt() argument 1544 sshl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) sshl() argument 1603 ushl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) ushl() argument 1640 neg(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) neg() argument 1654 suqadd(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) suqadd() argument 1672 usqadd(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) usqadd() argument 1691 abs(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) abs() argument 1709 ExtractNarrow(VectorFormat dstform, LogicVRegister dst, bool dstIsSigned, const LogicVRegister& src, bool srcIsSigned) ExtractNarrow() argument 1809 xtn(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) xtn() argument 1814 sqxtn(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) sqxtn() argument 1819 sqxtun(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) sqxtun() argument 1824 uqxtn(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) uqxtn() argument 1829 AbsDiff(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, bool issigned) AbsDiff() argument 1847 saba(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) saba() argument 1857 uaba(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) uaba() argument 1867 not_(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) not_() argument 1876 rbit(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) rbit() argument 1897 rev(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int revSize) rev() argument 1912 rev16(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) rev16() argument 1917 rev32(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) rev32() argument 1922 rev64(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) rev64() argument 1927 addlp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, bool is_signed, bool do_accumulate) addlp() argument 1956 saddlp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) saddlp() argument 1961 uaddlp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) uaddlp() argument 1966 sadalp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) sadalp() argument 1971 uadalp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) uadalp() argument 1976 ext(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) ext() argument 1994 dup_element(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int src_index) dup_element() argument 2006 dup_immediate(VectorFormat vform, LogicVRegister dst, uint64_t imm) dup_immediate() argument 2017 ins_element(VectorFormat vform, LogicVRegister dst, int dst_index, const LogicVRegister& src, int src_index) ins_element() argument 2024 ins_immediate(VectorFormat vform, LogicVRegister dst, int dst_index, uint64_t imm) ins_immediate() argument 2031 movi(VectorFormat vform, LogicVRegister dst, uint64_t imm) movi() argument 2041 mvni(VectorFormat vform, LogicVRegister dst, uint64_t imm) mvni() argument 2051 orr(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, uint64_t imm) orr() argument 2062 uxtl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) uxtl() argument 2073 sxtl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) sxtl() argument 2084 uxtl2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) uxtl2() argument 2096 sxtl2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) sxtl2() argument 2108 shrn(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) shrn() argument 2117 shrn2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) shrn2() argument 2126 rshrn(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) rshrn() argument 2135 rshrn2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) rshrn2() argument 2144 Table(VectorFormat vform, LogicVRegister dst, const LogicVRegister& ind, bool zero_out_of_bounds, const LogicVRegister* tab1, const LogicVRegister* tab2, const LogicVRegister* tab3, const LogicVRegister* tab4) Table() argument 2169 tbl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& tab, const LogicVRegister& ind) tbl() argument 2175 tbl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& tab, const LogicVRegister& tab2, const LogicVRegister& ind) tbl() argument 2182 tbl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& tab, const LogicVRegister& tab2, const LogicVRegister& tab3, const LogicVRegister& ind) tbl() argument 2190 tbl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& tab, const LogicVRegister& tab2, const LogicVRegister& tab3, const LogicVRegister& tab4, const LogicVRegister& ind) tbl() argument 2199 tbx(VectorFormat vform, LogicVRegister dst, const LogicVRegister& tab, const LogicVRegister& ind) tbx() argument 2205 tbx(VectorFormat vform, LogicVRegister dst, const LogicVRegister& tab, const LogicVRegister& tab2, const LogicVRegister& ind) tbx() argument 2212 tbx(VectorFormat vform, LogicVRegister dst, const LogicVRegister& tab, const LogicVRegister& tab2, const LogicVRegister& tab3, const LogicVRegister& ind) tbx() argument 2220 tbx(VectorFormat vform, LogicVRegister dst, const LogicVRegister& tab, const LogicVRegister& tab2, const LogicVRegister& tab3, const LogicVRegister& tab4, const LogicVRegister& ind) tbx() argument 2229 uqshrn(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) uqshrn() argument 2234 uqshrn2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) uqshrn2() argument 2239 uqrshrn(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) uqrshrn() argument 2244 uqrshrn2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) uqrshrn2() argument 2249 sqshrn(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) sqshrn() argument 2258 sqshrn2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) sqshrn2() argument 2267 sqrshrn(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) sqrshrn() argument 2276 sqrshrn2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) sqrshrn2() argument 2285 sqshrun(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) sqshrun() argument 2294 sqshrun2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) sqshrun2() argument 2303 sqrshrun(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) sqrshrun() argument 2312 sqrshrun2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int shift) sqrshrun2() argument 2321 uaddl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) uaddl() argument 2331 uaddl2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) uaddl2() argument 2341 uaddw(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) uaddw() argument 2350 uaddw2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) uaddw2() argument 2359 saddl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) saddl() argument 2369 saddl2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) saddl2() argument 2379 saddw(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) saddw() argument 2388 saddw2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) saddw2() argument 2397 usubl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) usubl() argument 2407 usubl2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) usubl2() argument 2417 usubw(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) usubw() argument 2426 usubw2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) usubw2() argument 2435 ssubl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) ssubl() argument 2445 ssubl2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) ssubl2() argument 2455 ssubw(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) ssubw() argument 2464 ssubw2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) ssubw2() argument 2473 uabal(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) uabal() argument 2483 uabal2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) uabal2() argument 2493 sabal(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) sabal() argument 2503 sabal2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) sabal2() argument 2513 uabdl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) uabdl() argument 2523 uabdl2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) uabdl2() argument 2533 sabdl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) sabdl() argument 2543 sabdl2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) sabdl2() argument 2553 umull(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) umull() argument 2563 umull2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) umull2() argument 2573 smull(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) smull() argument 2583 smull2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) smull2() argument 2593 umlsl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) umlsl() argument 2603 umlsl2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) umlsl2() argument 2613 smlsl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) smlsl() argument 2623 smlsl2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) smlsl2() argument 2633 umlal(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) umlal() argument 2643 umlal2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) umlal2() argument 2653 smlal(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) smlal() argument 2663 smlal2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) smlal2() argument 2673 sqdmlal(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) sqdmlal() argument 2681 sqdmlal2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) sqdmlal2() argument 2689 sqdmlsl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) sqdmlsl() argument 2697 sqdmlsl2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) sqdmlsl2() argument 2705 sqdmull(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) sqdmull() argument 2713 sqdmull2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) sqdmull2() argument 2721 sqrdmulh(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, bool round) sqrdmulh() argument 2748 sqdmulh(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) sqdmulh() argument 2754 addhn(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) addhn() argument 2763 addhn2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) addhn2() argument 2772 raddhn(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) raddhn() argument 2781 raddhn2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) raddhn2() argument 2790 subhn(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) subhn() argument 2799 subhn2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) subhn2() argument 2808 rsubhn(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) rsubhn() argument 2817 rsubhn2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) rsubhn2() argument 2826 trn1(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) trn1() argument 2841 trn2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) trn2() argument 2856 zip1(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) zip1() argument 2871 zip2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) zip2() argument 2886 uzp1(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) uzp1() argument 2903 uzp2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) uzp2() argument 3277 fnmul(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) fnmul() argument 3286 frecps(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) frecps() argument 3299 frecps(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) frecps() argument 3312 frsqrts(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) frsqrts() argument 3384 frsqrts(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) frsqrts() argument 3397 fcmp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, Condition cond) fcmp() argument 3432 fcmp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, Condition cond) fcmp() argument 3444 fcmp_zero(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, Condition cond) fcmp_zero() argument 3460 fabscmp(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, Condition cond) fabscmp() argument 3478 fmla(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) fmla() argument 3492 fmla(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) fmla() argument 3505 fmls(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) fmls() argument 3519 fmls(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) fmls() argument 3532 fneg(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) fneg() argument 3543 fneg(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) fneg() argument 3555 fabs_(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) fabs_() argument 3568 fabs_(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) fabs_() argument 3579 fabd(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2) fabd() argument 3588 fsqrt(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) fsqrt() argument 3633 FMinMaxV(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, FPMinMaxOp Op) FMinMaxV() argument 3645 fmaxv(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) fmaxv() argument 3650 fminv(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) fminv() argument 3655 fmaxnmv(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) fmaxnmv() argument 3660 fminnmv(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) fminnmv() argument 3665 fmul(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) fmul() argument 3681 fmla(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) fmla() argument 3697 fmls(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) fmls() argument 3713 fmulx(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src1, const LogicVRegister& src2, int index) fmulx() argument 3730 frint(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, FPRounding rounding_mode, bool inexact_exception) frint() argument 3758 fcvts(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, FPRounding rounding_mode, int fbits) fcvts() argument 3777 fcvtu(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, FPRounding rounding_mode, int fbits) fcvtu() argument 3796 fcvtl(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) fcvtl() argument 3811 fcvtl2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) fcvtl2() argument 3827 fcvtn(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) fcvtn() argument 3843 fcvtn2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) fcvtn2() argument 3859 fcvtxn(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) fcvtxn() argument 3869 fcvtxn2(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) fcvtxn2() argument 3966 frsqrte(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) frsqrte() argument 4087 frecpe(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, FPRounding round) frecpe() argument 4105 ursqrte(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) ursqrte() argument 4135 urecpe(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) urecpe() argument 4156 frecpx(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) frecpx() argument 4184 frecpx(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src) frecpx() argument 4195 scvtf(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int fbits, FPRounding round) scvtf() argument 4211 ucvtf(VectorFormat vform, LogicVRegister dst, const LogicVRegister& src, int fbits, FPRounding round) ucvtf() argument [all...] |
| /third_party/node/deps/v8/src/execution/s390/ |
| H A D | simulator-s390.cc | 3288 inline static void VectorBinaryOp(Simulator* sim, int dst, int src1, int src2, in VectorBinaryOp() argument 3434 void VectorSum(Simulator* sim, int dst, int src1, int src2) { in VectorSum() argument 3528 void VectorPack(Simulator* sim, int dst, int src1, int src2, bool saturate, in VectorPack() argument 3603 void VectorUnpackHigh(Simulator* sim, int dst, int src) { in VectorUnpackHigh() argument 3648 VectorPopulationCount(Simulator* sim, int dst, int src) VectorPopulationCount() argument 3750 VectorUnpackLow(Simulator* sim, int dst, int src) VectorUnpackLow() argument 3975 VectorLoadComplement(Simulator* sim, int dst, int src) VectorLoadComplement() argument 4068 VectorShift(Simulator* sim, int dst, int src, unsigned int shift, Operation op) VectorShift() argument 4396 FPMinMaxForEachLane(Simulator* sim, Operation Op, int dst, int lhs, int rhs, int m5, int m6) FPMinMaxForEachLane() argument 4446 VectorFPCompare(Simulator* sim, int dst, int src1, int src2, int m6, Operation op) VectorFPCompare() argument 4531 VectorUnaryOp(Simulator* sim, int dst, int src, int sec, Op op) VectorUnaryOp() argument 4550 VectorSignOp(Simulator* sim, int dst, int src, int m4, int m5) VectorSignOp() argument [all...] |