| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 76 unsigned AArch64InstrInfo::getInstSizeInBytes(const MachineInstr &MI) const { in getInstSizeInBytes() argument
188 AArch64InstrInfo::getBranchDestBlock(const MachineInstr &MI) const { in getBranchDestBlock() argument
179 isBranchOffsetInRange(unsigned BranchOp, int64_t BrOffset) const isBranchOffsetInRange() argument
209 analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const analyzeBranch() argument
296 reverseBranchCondition( SmallVectorImpl<MachineOperand> &Cond) const reverseBranchCondition() argument
337 removeBranch(MachineBasicBlock &MBB, int *BytesRemoved) const removeBranch() argument
372 instantiateCondBranch( MachineBasicBlock &MBB, const DebugLoc &DL, MachineBasicBlock *TBB, ArrayRef<MachineOperand> Cond) const instantiateCondBranch() argument
389 insertBranch( MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, const DebugLoc &DL, int *BytesAdded) const insertBranch() argument
497 canInsertSelect(const MachineBasicBlock &MBB, ArrayRef<MachineOperand> Cond, unsigned TrueReg, unsigned FalseReg, int &CondCycles, int &TrueCycles, int &FalseCycles) const canInsertSelect() argument
539 insertSelect(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, unsigned DstReg, ArrayRef<MachineOperand> Cond, unsigned TrueReg, unsigned FalseReg) const insertSelect() argument
685 isAsCheapAsAMove(const MachineInstr &MI) const isAsCheapAsAMove() argument
912 isCoalescableExtInstr(const MachineInstr &MI, unsigned &SrcReg, unsigned &DstReg, unsigned &SubIdx) const isCoalescableExtInstr() argument
932 areMemAccessesTriviallyDisjoint( const MachineInstr &MIa, const MachineInstr &MIb) const areMemAccessesTriviallyDisjoint() argument
1182 optimizeCompareInstr( MachineInstr &CmpInstr, unsigned SrcReg, unsigned SrcReg2, int CmpMask, int CmpValue, const MachineRegisterInfo *MRI) const optimizeCompareInstr() argument
1441 substituteCmpToZero( MachineInstr &CmpInstr, unsigned SrcReg, const MachineRegisterInfo *MRI) const substituteCmpToZero() argument
1469 expandPostRAPseudo(MachineInstr &MI) const expandPostRAPseudo() argument
1652 isLoadFromStackSlot(const MachineInstr &MI, int &FrameIndex) const isLoadFromStackSlot() argument
1675 isStoreToStackSlot(const MachineInstr &MI, int &FrameIndex) const isStoreToStackSlot() argument
1928 isCandidateToMergeOrPair(const MachineInstr &MI) const isCandidateToMergeOrPair() argument
1981 getMemOperandWithOffset(const MachineInstr &LdSt, const MachineOperand *&BaseOp, int64_t &Offset, const TargetRegisterInfo *TRI) const getMemOperandWithOffset() argument
1992 getMemOperandWithOffsetWidth( const MachineInstr &LdSt, const MachineOperand *&BaseOp, int64_t &Offset, unsigned &Width, const TargetRegisterInfo *TRI) const getMemOperandWithOffsetWidth() argument
2039 getMemOpBaseRegImmOfsOffsetOperand(MachineInstr &LdSt) const getMemOpBaseRegImmOfsOffsetOperand() argument
2366 shouldClusterMemOps(const MachineOperand &BaseOp1, const MachineOperand &BaseOp2, unsigned NumLoads) const shouldClusterMemOps() argument
2449 copyPhysRegTuple(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc, unsigned Opcode, ArrayRef<unsigned> Indices) const copyPhysRegTuple() argument
2476 copyGPRRegTuple(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc, unsigned Opcode, unsigned ZeroReg, llvm::ArrayRef<unsigned> Indices) const copyGPRRegTuple() argument
2501 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc) const copyPhysReg() argument
2844 storeRegToStackSlot( MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const storeRegToStackSlot() argument
2986 loadRegFromStackSlot( MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const loadRegFromStackSlot() argument
3239 foldMemoryOperandImpl( MachineFunction &MF, MachineInstr &MI, ArrayRef<unsigned> Ops, MachineBasicBlock::iterator InsertPt, int FrameIndex, LiveIntervals *LIS, VirtRegMap *VRM) const foldMemoryOperandImpl() argument
3713 isAssociativeAndCommutative( const MachineInstr &Inst) const isAssociativeAndCommutative() argument
4025 isThroughputPattern( MachineCombinerPattern Pattern) const isThroughputPattern() argument
4134 getMachineCombinerPatterns( MachineInstr &Root, SmallVectorImpl<MachineCombinerPattern> &Patterns) const getMachineCombinerPatterns() argument
4357 genAlternativeCodeSequence( MachineInstr &Root, MachineCombinerPattern Pattern, SmallVectorImpl<MachineInstr *> &InsInstrs, SmallVectorImpl<MachineInstr *> &DelInstrs, DenseMap<unsigned, unsigned> &InstrIdxForVirtReg) const genAlternativeCodeSequence() argument
5229 optimizeCondBranch(MachineInstr &MI) const optimizeCondBranch() argument
5367 decomposeMachineOperandsTargetFlags(unsigned TF) const decomposeMachineOperandsTargetFlags() argument
5373 getSerializableDirectMachineOperandTargetFlags() const getSerializableDirectMachineOperandTargetFlags() argument
5385 getSerializableBitmaskMachineOperandTargetFlags() const getSerializableBitmaskMachineOperandTargetFlags() argument
5401 getSerializableMachineMemOperandTargetFlags() const getSerializableMachineMemOperandTargetFlags() argument
5503 findRegisterToSaveLRTo(const outliner::Candidate &C) const findRegisterToSaveLRTo() argument
5616 getOutliningCandidateInfo( std::vector<outliner::Candidate> &RepeatedSequenceLocs) const getOutliningCandidateInfo() argument
5967 isFunctionSafeToOutlineFrom( MachineFunction &MF, bool OutlineFromLinkOnceODRs) const isFunctionSafeToOutlineFrom() argument
5993 isMBBSafeToOutlineFrom(MachineBasicBlock &MBB, unsigned &Flags) const isMBBSafeToOutlineFrom() argument
6060 getOutliningType(MachineBasicBlock::iterator &MIT, unsigned Flags) const getOutliningType() argument
6203 fixupPostOutline(MachineBasicBlock &MBB) const fixupPostOutline() argument
6285 buildOutlinedFrame( MachineBasicBlock &MBB, MachineFunction &MF, const outliner::OutlinedFunction &OF) const buildOutlinedFrame() argument
6418 insertOutlinedCall( Module &M, MachineBasicBlock &MBB, MachineBasicBlock::iterator &It, MachineFunction &MF, const outliner::Candidate &C) const insertOutlinedCall() argument
6490 shouldOutlineFromFunctionByDefault( MachineFunction &MF) const shouldOutlineFromFunctionByDefault() argument
6496 isCopyInstrImpl(const MachineInstr &MI) const isCopyInstrImpl() argument
6515 isAddImmediate(const MachineInstr &MI, Register Reg) const isAddImmediate() argument
6590 describeLoadedValue(const MachineInstr &MI, Register Reg) const describeLoadedValue() argument
[all...] |
| H A D | AArch64InstructionSelector.cpp | 181 selectAddrModeUnscaled8(MachineOperand &Root) const selectAddrModeUnscaled8() argument
184 selectAddrModeUnscaled16(MachineOperand &Root) const selectAddrModeUnscaled16() argument
187 selectAddrModeUnscaled32(MachineOperand &Root) const selectAddrModeUnscaled32() argument
190 selectAddrModeUnscaled64(MachineOperand &Root) const selectAddrModeUnscaled64() argument
193 selectAddrModeUnscaled128(MachineOperand &Root) const selectAddrModeUnscaled128() argument
200 selectAddrModeIndexed(MachineOperand &Root) const selectAddrModeIndexed() argument
221 selectAddrModeXRO(MachineOperand &Root) const selectAddrModeXRO() argument
228 selectAddrModeWRO(MachineOperand &Root) const selectAddrModeWRO() argument
234 selectArithShiftedRegister(MachineOperand &Root) const selectArithShiftedRegister() argument
238 selectLogicalShiftedRegister(MachineOperand &Root) const selectLogicalShiftedRegister() argument
980 selectCompareBranch( MachineInstr &I, MachineFunction &MF, MachineRegisterInfo &MRI) const selectCompareBranch() argument
1097 selectVectorSHL( MachineInstr &I, MachineRegisterInfo &MRI) const selectVectorSHL() argument
1135 selectVectorASHR( MachineInstr &I, MachineRegisterInfo &MRI) const selectVectorASHR() argument
1179 selectVaStartAAPCS( MachineInstr &I, MachineFunction &MF, MachineRegisterInfo &MRI) const selectVaStartAAPCS() argument
1184 selectVaStartDarwin( MachineInstr &I, MachineFunction &MF, MachineRegisterInfo &MRI) const selectVaStartDarwin() argument
1211 materializeLargeCMVal( MachineInstr &I, const Value *V, unsigned OpFlags) const materializeLargeCMVal() argument
1250 preISelLower(MachineInstr &I) const preISelLower() argument
1294 earlySelectSHL( MachineInstr &I, MachineRegisterInfo &MRI) const earlySelectSHL() argument
1329 contractCrossBankCopyIntoStore( MachineInstr &I, MachineRegisterInfo &MRI) const contractCrossBankCopyIntoStore() argument
1371 earlySelect(MachineInstr &I) const earlySelect() argument
2428 selectBrJT(MachineInstr &I, MachineRegisterInfo &MRI) const selectBrJT() argument
2448 selectJumpTable( MachineInstr &I, MachineRegisterInfo &MRI) const selectJumpTable() argument
2465 selectTLSGlobalValue( MachineInstr &I, MachineRegisterInfo &MRI) const selectTLSGlobalValue() argument
2496 selectIntrinsicTrunc( MachineInstr &I, MachineRegisterInfo &MRI) const selectIntrinsicTrunc() argument
2551 selectIntrinsicRound( MachineInstr &I, MachineRegisterInfo &MRI) const selectIntrinsicRound() argument
2606 selectVectorICmp( MachineInstr &I, MachineRegisterInfo &MRI) const selectVectorICmp() argument
2778 emitScalarToVector( unsigned EltSize, const TargetRegisterClass *DstRC, Register Scalar, MachineIRBuilder &MIRBuilder) const emitScalarToVector() argument
2805 selectMergeValues( MachineInstr &I, MachineRegisterInfo &MRI) const selectMergeValues() argument
2900 emitExtractVectorElt( Optional<Register> DstReg, const RegisterBank &DstRB, LLT ScalarTy, Register VecReg, unsigned LaneIdx, MachineIRBuilder &MIRBuilder) const emitExtractVectorElt() argument
2960 selectExtractElt( MachineInstr &I, MachineRegisterInfo &MRI) const selectExtractElt() argument
3000 selectSplitVectorUnmerge( MachineInstr &I, MachineRegisterInfo &MRI) const selectSplitVectorUnmerge() argument
3030 selectUnmergeValues( MachineInstr &I, MachineRegisterInfo &MRI) const selectUnmergeValues() argument
3145 selectConcatVectors( MachineInstr &I, MachineRegisterInfo &MRI) const selectConcatVectors() argument
3161 emitConstantPoolEntry(Constant *CPVal, MachineFunction &MF) const emitConstantPoolEntry() argument
3172 emitLoadFromConstantPool( Constant *CPVal, MachineIRBuilder &MIRBuilder) const emitLoadFromConstantPool() argument
3241 emitADD(Register DefReg, MachineOperand &LHS, MachineOperand &RHS, MachineIRBuilder &MIRBuilder) const emitADD() argument
3266 emitCMN(MachineOperand &LHS, MachineOperand &RHS, MachineIRBuilder &MIRBuilder) const emitCMN() argument
3292 emitTST(const Register &LHS, const Register &RHS, MachineIRBuilder &MIRBuilder) const emitTST() argument
3319 emitIntegerCompare( MachineOperand &LHS, MachineOperand &RHS, MachineOperand &Predicate, MachineIRBuilder &MIRBuilder) const emitIntegerCompare() argument
3367 emitVectorConcat( Optional<Register> Dst, Register Op1, Register Op2, MachineIRBuilder &MIRBuilder) const emitVectorConcat() argument
3427 emitFMovForFConstant( MachineInstr &I, MachineRegisterInfo &MRI) const emitFMovForFConstant() argument
3461 emitCSetForICMP(Register DefReg, unsigned Pred, MachineIRBuilder &MIRBuilder) const emitCSetForICMP() argument
3474 tryOptSelect(MachineInstr &I) const tryOptSelect() argument
3571 tryFoldIntegerCompare( MachineOperand &LHS, MachineOperand &RHS, MachineOperand &Predicate, MachineIRBuilder &MIRBuilder) const tryFoldIntegerCompare() argument
3663 tryOptVectorDup(MachineInstr &I) const tryOptVectorDup() argument
3764 tryOptVectorShuffle(MachineInstr &I) const tryOptVectorShuffle() argument
3772 selectShuffleVector( MachineInstr &I, MachineRegisterInfo &MRI) const selectShuffleVector() argument
3971 selectBuildVector( MachineInstr &I, MachineRegisterInfo &MRI) const selectBuildVector() argument
4058 selectIntrinsicWithSideEffects( MachineInstr &I, MachineRegisterInfo &MRI) const selectIntrinsicWithSideEffects() argument
4084 selectIntrinsic( MachineInstr &I, MachineRegisterInfo &MRI) const selectIntrinsic() argument
4158 selectShiftA_32(const MachineOperand &Root) const selectShiftA_32() argument
[all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 123 ARMBaseInstrInfo::CreateTargetHazardRecognizer(const TargetSubtargetInfo *STI, in CreateTargetHazardRecognizer() argument
134 CreateTargetPostRAHazardRecognizer(const InstrItineraryData *II, in CreateTargetPostRAHazardRecognizer() argument
141 convertToThreeAddress( MachineFunction::iterator &MFI, MachineInstr &MI, LiveVariables *LV) const convertToThreeAddress() argument
311 analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const analyzeBranch() argument
401 removeBranch(MachineBasicBlock &MBB, int *BytesRemoved) const removeBranch() argument
428 insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, const DebugLoc &DL, int *BytesAdded) const insertBranch() argument
476 reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const reverseBranchCondition() argument
482 isPredicated(const MachineInstr &MI) const isPredicated() argument
498 PredicateInstruction( MachineInstr &MI, ArrayRef<MachineOperand> Pred) const PredicateInstruction() argument
519 SubsumesPredicate(ArrayRef<MachineOperand> Pred1, ArrayRef<MachineOperand> Pred2) const SubsumesPredicate() argument
545 DefinesPredicate( MachineInstr &MI, std::vector<MachineOperand> &Pred) const DefinesPredicate() argument
567 isAddrMode3OpImm(const MachineInstr &MI, unsigned Op) const isAddrMode3OpImm() argument
575 isAddrMode3OpMinusReg(const MachineInstr &MI, unsigned Op) const isAddrMode3OpMinusReg() argument
587 isLdstScaledReg(const MachineInstr &MI, unsigned Op) const isLdstScaledReg() argument
595 isLdstScaledRegNotPlusLsl2(const MachineInstr &MI, unsigned Op) const isLdstScaledRegNotPlusLsl2() argument
609 isLdstSoMinusReg(const MachineInstr &MI, unsigned Op) const isLdstSoMinusReg() argument
616 isAm2ScaledReg(const MachineInstr &MI, unsigned Op) const isAm2ScaledReg() argument
654 isPredicable(const MachineInstr &MI) const isPredicable() argument
700 getInstSizeInBytes(const MachineInstr &MI) const getInstSizeInBytes() argument
757 getInstBundleLength(const MachineInstr &MI) const getInstBundleLength() argument
768 copyFromCPSR(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, bool KillSrc, const ARMSubtarget &Subtarget) const copyFromCPSR() argument
788 copyToCPSR(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned SrcReg, bool KillSrc, const ARMSubtarget &Subtarget) const copyToCPSR() argument
830 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc) const copyPhysReg() argument
997 isCopyInstrImpl(const MachineInstr &MI) const isCopyInstrImpl() argument
1013 AddDReg(MachineInstrBuilder &MIB, unsigned Reg, unsigned SubIdx, unsigned State, const TargetRegisterInfo *TRI) const AddDReg() argument
1025 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned SrcReg, bool isKill, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const storeRegToStackSlot() argument
1202 isStoreToStackSlot(const MachineInstr &MI, int &FrameIndex) const isStoreToStackSlot() argument
1252 isStoreToStackSlotPostFE(const MachineInstr &MI, int &FrameIndex) const isStoreToStackSlotPostFE() argument
1266 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const loadRegFromStackSlot() argument
1439 isLoadFromStackSlot(const MachineInstr &MI, int &FrameIndex) const isLoadFromStackSlot() argument
1495 isLoadFromStackSlotPostFE(const MachineInstr &MI, int &FrameIndex) const isLoadFromStackSlotPostFE() argument
1510 expandMEMCPY(MachineBasicBlock::iterator MI) const expandMEMCPY() argument
1564 expandPostRAPseudo(MachineInstr &MI) const expandPostRAPseudo() argument
1689 reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, unsigned SubIdx, const MachineInstr &Orig, const TargetRegisterInfo &TRI) const reMaterialize() argument
1717 duplicate(MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, const MachineInstr &Orig) const duplicate() argument
1741 produceSameValue(const MachineInstr &MI0, const MachineInstr &MI1, const MachineRegisterInfo *MRI) const produceSameValue() argument
1835 areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1, int64_t &Offset2) const areLoadsFromSameBasePtr() argument
1916 shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1, int64_t Offset2, unsigned NumLoads) const shouldScheduleLoadsNear() argument
1946 isSchedulingBoundary(const MachineInstr &MI, const MachineBasicBlock *MBB, const MachineFunction &MF) const isSchedulingBoundary() argument
1990 isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, unsigned ExtraPredCycles, BranchProbability Probability) const isProfitableToIfCvt() argument
2016 isProfitableToIfCvt(MachineBasicBlock &TBB, unsigned TCycles, unsigned TExtra, MachineBasicBlock &FBB, unsigned FCycles, unsigned FExtra, BranchProbability Probability) const isProfitableToIfCvt() argument
2080 extraSizeToPredicateInstructions(const MachineFunction &MF, unsigned NumInsts) const extraSizeToPredicateInstructions() argument
2089 predictBranchSizeForIfCvt(MachineInstr &MI) const predictBranchSizeForIfCvt() argument
2112 isProfitableToUnpredicate(MachineBasicBlock &TMBB, MachineBasicBlock &FMBB) const isProfitableToUnpredicate() argument
2145 commuteInstructionImpl(MachineInstr &MI, bool NewMI, unsigned OpIdx1, unsigned OpIdx2) const commuteInstructionImpl() argument
2174 canFoldIntoMOVCC(unsigned Reg, const MachineRegisterInfo &MRI, const TargetInstrInfo *TII) const canFoldIntoMOVCC() argument
2209 analyzeSelect(const MachineInstr &MI, SmallVectorImpl<MachineOperand> &Cond, unsigned &TrueOp, unsigned &FalseOp, bool &Optimizable) const analyzeSelect() argument
2231 optimizeSelect(MachineInstr &MI, SmallPtrSetImpl<MachineInstr *> &SeenMIs, bool PreferFalse) const optimizeSelect() argument
2674 analyzeCompare(const MachineInstr &MI, unsigned &SrcReg, unsigned &SrcReg2, int &CmpMask, int &CmpValue) const analyzeCompare() argument
2881 optimizeCompareInstr( MachineInstr &CmpInstr, unsigned SrcReg, unsigned SrcReg2, int CmpMask, int CmpValue, const MachineRegisterInfo *MRI) const optimizeCompareInstr() argument
3161 shouldSink(const MachineInstr &MI) const shouldSink() argument
3179 FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, unsigned Reg, MachineRegisterInfo *MRI) const FoldImmediate() argument
3575 getNumLDMAddresses(const MachineInstr &MI) const getNumLDMAddresses() argument
3629 getNumMicroOps(const InstrItineraryData *ItinData, const MachineInstr &MI) const getNumMicroOps() argument
3743 getVLDMDefCycle(const InstrItineraryData *ItinData, const MCInstrDesc &DefMCID, unsigned DefClass, unsigned DefIdx, unsigned DefAlign) const getVLDMDefCycle() argument
3783 isLDMBaseRegInList(const MachineInstr &MI) const isLDMBaseRegInList() argument
3793 getLDMVariableDefsSize(const MachineInstr &MI) const getLDMVariableDefsSize() argument
3800 getLDMDefCycle(const InstrItineraryData *ItinData, const MCInstrDesc &DefMCID, unsigned DefClass, unsigned DefIdx, unsigned DefAlign) const getLDMDefCycle() argument
3835 getVSTMUseCycle(const InstrItineraryData *ItinData, const MCInstrDesc &UseMCID, unsigned UseClass, unsigned UseIdx, unsigned UseAlign) const getVSTMUseCycle() argument
3875 getSTMUseCycle(const InstrItineraryData *ItinData, const MCInstrDesc &UseMCID, unsigned UseClass, unsigned UseIdx, unsigned UseAlign) const getSTMUseCycle() argument
3904 getOperandLatency(const InstrItineraryData *ItinData, const MCInstrDesc &DefMCID, unsigned DefIdx, unsigned DefAlign, const MCInstrDesc &UseMCID, unsigned UseIdx, unsigned UseAlign) const getOperandLatency() argument
4248 getOperandLatency(const InstrItineraryData *ItinData, const MachineInstr &DefMI, unsigned DefIdx, const MachineInstr &UseMI, unsigned UseIdx) const getOperandLatency() argument
4284 getOperandLatencyImpl( const InstrItineraryData *ItinData, const MachineInstr &DefMI, unsigned DefIdx, const MCInstrDesc &DefMCID, unsigned DefAdj, const MachineOperand &DefMO, unsigned Reg, const MachineInstr &UseMI, unsigned UseIdx, const MCInstrDesc &UseMCID, unsigned UseAdj) const getOperandLatencyImpl() argument
4345 getOperandLatency(const InstrItineraryData *ItinData, SDNode *DefNode, unsigned DefIdx, SDNode *UseNode, unsigned UseIdx) const getOperandLatency() argument
4601 getPredicationCost(const MachineInstr &MI) const getPredicationCost() argument
4620 getInstrLatency(const InstrItineraryData *ItinData, const MachineInstr &MI, unsigned *PredCost) const getInstrLatency() argument
4671 getInstrLatency(const InstrItineraryData *ItinData, SDNode *Node) const getInstrLatency() argument
4689 hasHighOperandLatency(const TargetSchedModel &SchedModel, const MachineRegisterInfo *MRI, const MachineInstr &DefMI, unsigned DefIdx, const MachineInstr &UseMI, unsigned UseIdx) const hasHighOperandLatency() argument
4710 hasLowDefLatency(const TargetSchedModel &SchedModel, const MachineInstr &DefMI, unsigned DefIdx) const hasLowDefLatency() argument
4726 verifyInstruction(const MachineInstr &MI, StringRef &ErrInfo) const verifyInstruction() argument
4762 expandLoadStackGuardBase(MachineBasicBlock::iterator MI, unsigned LoadImmOpc, unsigned LoadOpc) const expandLoadStackGuardBase() argument
4797 isFpMLxInstruction(unsigned Opcode, unsigned &MulOpc, unsigned &AddSubOpc, bool &NegAcc, bool &HasLane) const isFpMLxInstruction() argument
4833 getExecutionDomain(const MachineInstr &MI) const getExecutionDomain() argument
4923 setExecutionDomain(MachineInstr &MI, unsigned Domain) const setExecutionDomain() argument
5131 getPartialRegUpdateClearance( const MachineInstr &MI, unsigned OpNum, const TargetRegisterInfo *TRI) const getPartialRegUpdateClearance() argument
5192 breakPartialRegDependency( MachineInstr &MI, unsigned OpNum, const TargetRegisterInfo *TRI) const breakPartialRegDependency() argument
[all...] |
| H A D | ARMISelDAGToDAG.cpp | 165 inline bool is_so_imm(unsigned Imm) const { in is_so_imm() argument
169 inline bool is_so_imm_not(unsigned Imm) const { in is_so_imm_not() argument
173 inline bool is_t2_so_imm(unsigned Imm) const { in is_t2_so_imm() argument
177 inline bool is_t2_so_imm_not(unsigned Imm) const { in is_t2_so_imm_not() argument
458 hasNoVMLxHazardUse(SDNode *N) const hasNoVMLxHazardUse() argument
512 canExtractShiftFromMul(const SDValue &N, unsigned MaxShift, unsigned &PowerOfTwo, SDValue &NewMulConst) const canExtractShiftFromMul() argument
[all...] |
| H A D | ARMSubtarget.h | 510 unsigned getMaxInlineSizeThreshold() const { in getMaxInlineSizeThreshold() argument
568 hasV4TOps() const hasV4TOps() argument
569 hasV5TOps() const hasV5TOps() argument
570 hasV5TEOps() const hasV5TEOps() argument
571 hasV6Ops() const hasV6Ops() argument
572 hasV6MOps() const hasV6MOps() argument
573 hasV6KOps() const hasV6KOps() argument
574 hasV6T2Ops() const hasV6T2Ops() argument
575 hasV7Ops() const hasV7Ops() argument
576 hasV8Ops() const hasV8Ops() argument
577 hasV8_1aOps() const hasV8_1aOps() argument
578 hasV8_2aOps() const hasV8_2aOps() argument
579 hasV8_3aOps() const hasV8_3aOps() argument
580 hasV8_4aOps() const hasV8_4aOps() argument
581 hasV8_5aOps() const hasV8_5aOps() argument
582 hasV8MBaselineOps() const hasV8MBaselineOps() argument
583 hasV8MMainlineOps() const hasV8MMainlineOps() argument
584 hasV8_1MMainlineOps() const hasV8_1MMainlineOps() argument
585 hasMVEIntegerOps() const hasMVEIntegerOps() argument
586 hasMVEFloatOps() const hasMVEFloatOps() argument
587 hasFPRegs() const hasFPRegs() argument
588 hasFPRegs16() const hasFPRegs16() argument
589 hasFPRegs64() const hasFPRegs64() argument
594 isCortexA5() const isCortexA5() argument
595 isCortexA7() const isCortexA7() argument
596 isCortexA8() const isCortexA8() argument
597 isCortexA9() const isCortexA9() argument
598 isCortexA15() const isCortexA15() argument
599 isSwift() const isSwift() argument
600 isCortexM3() const isCortexM3() argument
601 isLikeA9() const isLikeA9() argument
602 isCortexR5() const isCortexR5() argument
603 isKrait() const isKrait() argument
606 hasARMOps() const hasARMOps() argument
608 hasVFP2Base() const hasVFP2Base() argument
609 hasVFP3Base() const hasVFP3Base() argument
610 hasVFP4Base() const hasVFP4Base() argument
611 hasFPARMv8Base() const hasFPARMv8Base() argument
612 hasNEON() const hasNEON() argument
613 hasSHA2() const hasSHA2() argument
614 hasAES() const hasAES() argument
615 hasCrypto() const hasCrypto() argument
616 hasDotProd() const hasDotProd() argument
617 hasCRC() const hasCRC() argument
618 hasRAS() const hasRAS() argument
619 hasLOB() const hasLOB() argument
620 hasVirtualization() const hasVirtualization() argument
622 useNEONForSinglePrecisionFP() const useNEONForSinglePrecisionFP() argument
626 hasDivideInThumbMode() const hasDivideInThumbMode() argument
627 hasDivideInARMMode() const hasDivideInARMMode() argument
628 hasDataBarrier() const hasDataBarrier() argument
629 hasFullDataBarrier() const hasFullDataBarrier() argument
630 hasV7Clrex() const hasV7Clrex() argument
631 hasAcquireRelease() const hasAcquireRelease() argument
633 hasAnyDataBarrier() const hasAnyDataBarrier() argument
637 useMulOps() const useMulOps() argument
638 useFPVMLx() const useFPVMLx() argument
639 useFPVFMx() const useFPVFMx() argument
642 useFPVFMx16() const useFPVFMx16() argument
643 useFPVFMx64() const useFPVFMx64() argument
644 hasVMLxForwarding() const hasVMLxForwarding() argument
645 isFPBrccSlow() const isFPBrccSlow() argument
646 hasFP64() const hasFP64() argument
647 hasPerfMon() const hasPerfMon() argument
648 hasTrustZone() const hasTrustZone() argument
649 has8MSecExt() const has8MSecExt() argument
650 hasZeroCycleZeroing() const hasZeroCycleZeroing() argument
651 hasFPAO() const hasFPAO() argument
652 isProfitableToUnpredicate() const isProfitableToUnpredicate() argument
653 hasSlowVGETLNi32() const hasSlowVGETLNi32() argument
654 hasSlowVDUP32() const hasSlowVDUP32() argument
655 preferVMOVSR() const preferVMOVSR() argument
656 preferISHSTBarriers() const preferISHSTBarriers() argument
657 expandMLx() const expandMLx() argument
658 hasVMLxHazards() const hasVMLxHazards() argument
659 hasSlowOddRegister() const hasSlowOddRegister() argument
660 hasSlowLoadDSubregister() const hasSlowLoadDSubregister() argument
661 useWideStrideVFP() const useWideStrideVFP() argument
662 hasMuxedUnits() const hasMuxedUnits() argument
663 dontWidenVMOVS() const dontWidenVMOVS() argument
664 useSplatVFPToNeon() const useSplatVFPToNeon() argument
665 useNEONForFPMovs() const useNEONForFPMovs() argument
666 checkVLDnAccessAlignment() const checkVLDnAccessAlignment() argument
667 nonpipelinedVFP() const nonpipelinedVFP() argument
668 prefers32BitThumb() const prefers32BitThumb() argument
669 avoidCPSRPartialUpdate() const avoidCPSRPartialUpdate() argument
670 cheapPredicableCPSRDef() const cheapPredicableCPSRDef() argument
671 avoidMOVsShifterOperand() const avoidMOVsShifterOperand() argument
672 hasRetAddrStack() const hasRetAddrStack() argument
673 hasBranchPredictor() const hasBranchPredictor() argument
674 hasMPExtension() const hasMPExtension() argument
675 hasDSP() const hasDSP() argument
676 useNaClTrap() const useNaClTrap() argument
677 useSjLjEH() const useSjLjEH() argument
678 hasSB() const hasSB() argument
679 genLongCalls() const genLongCalls() argument
680 genExecuteOnly() const genExecuteOnly() argument
681 hasBaseDSP() const hasBaseDSP() argument
688 hasFP16() const hasFP16() argument
689 hasD32() const hasD32() argument
690 hasFullFP16() const hasFullFP16() argument
691 hasFP16FML() const hasFP16FML() argument
693 hasFuseAES() const hasFuseAES() argument
694 hasFuseLiterals() const hasFuseLiterals() argument
696 hasFusion() const hasFusion() argument
698 getTargetTriple() const getTargetTriple() argument
700 isTargetDarwin() const isTargetDarwin() argument
701 isTargetIOS() const isTargetIOS() argument
702 isTargetWatchOS() const isTargetWatchOS() argument
703 isTargetWatchABI() const isTargetWatchABI() argument
704 isTargetLinux() const isTargetLinux() argument
705 isTargetNaCl() const isTargetNaCl() argument
706 isTargetNetBSD() const isTargetNetBSD() argument
707 isTargetWindows() const isTargetWindows() argument
709 isTargetCOFF() const isTargetCOFF() argument
710 isTargetELF() const isTargetELF() argument
711 isTargetMachO() const isTargetMachO() argument
720 isTargetAEABI() const isTargetAEABI() argument
725 isTargetGNUAEABI() const isTargetGNUAEABI() argument
730 isTargetMuslAEABI() const isTargetMuslAEABI() argument
738 isTargetEHABICompatible() const isTargetEHABICompatible() argument
751 isTargetAndroid() const isTargetAndroid() argument
762 useMachineScheduler() const useMachineScheduler() argument
763 disablePostRAScheduler() const disablePostRAScheduler() argument
764 useSoftFloat() const useSoftFloat() argument
765 isThumb() const isThumb() argument
766 hasMinSize() const hasMinSize() argument
767 isThumb1Only() const isThumb1Only() argument
768 isThumb2() const isThumb2() argument
769 hasThumb2() const hasThumb2() argument
770 isMClass() const isMClass() argument
771 isRClass() const isRClass() argument
772 isAClass() const isAClass() argument
773 isReadTPHard() const isReadTPHard() argument
775 isR9Reserved() const isR9Reserved() argument
779 useR7AsFramePointer() const useR7AsFramePointer() argument
787 splitFramePushPop(const MachineFunction &MF) const splitFramePushPop() argument
797 supportsTailCall() const supportsTailCall() argument
799 allowsUnalignedMem() const allowsUnalignedMem() argument
801 restrictIT() const restrictIT() argument
803 getCPUString() const getCPUString() argument
805 isLittle() const isLittle() argument
837 getStackAlignment() const getStackAlignment() argument
839 getMaxInterleaveFactor() const getMaxInterleaveFactor() argument
841 getPartialUpdateClearance() const getPartialUpdateClearance() argument
843 getLdStMultipleTiming() const getLdStMultipleTiming() argument
847 getPreISelOperandLatencyAdjustment() const getPreISelOperandLatencyAdjustment() argument
863 getReturnOpcode() const getReturnOpcode() argument
874 allowPositionIndependentMovt() const allowPositionIndependentMovt() argument
878 getPrefLoopLogAlignment() const getPrefLoopLogAlignment() argument
880 getMVEVectorCostFactor() const getMVEVectorCostFactor() argument
[all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 612 getInstruction(MCInst &MI, uint64_t &Size, ArrayRef<uint8_t> Bytes, uint64_t Address, raw_ostream &CS) const getInstruction() argument
621 getARMInstruction(MCInst &MI, uint64_t &Size, ArrayRef<uint8_t> Bytes, uint64_t Address, raw_ostream &CS) const getARMInstruction() argument
761 AddThumbPredicate(MCInst &MI) const AddThumbPredicate() argument
876 UpdateThumbVFPPredicate( DecodeStatus &S, MCInst &MI) const UpdateThumbVFPPredicate() argument
907 getThumbInstruction(MCInst &MI, uint64_t &Size, ArrayRef<uint8_t> Bytes, uint64_t Address, raw_ostream &CS) const getThumbInstruction() argument
[all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 124 unsigned getNumNamedVarArgParams() const { return NumNamedVarArgParams; } in getNumNamedVarArgParams() argument
156 LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const LowerINTRINSIC_WO_CHAIN() argument
177 CanLowerReturn( CallingConv::ID CallConv, MachineFunction &MF, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const CanLowerReturn() argument
193 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl, SelectionDAG &DAG) const LowerReturn() argument
234 mayBeEmittedAsTailCall(const CallInst *CI) const mayBeEmittedAsTailCall() argument
239 getRegisterByName( const char* RegName, LLT VT, const MachineFunction &) const getRegisterByName() argument
318 LowerCallResult( SDValue Chain, SDValue Glue, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals, const SmallVectorImpl<SDValue> &OutVals, SDValue Callee) const LowerCallResult() argument
372 LowerCall(TargetLowering::CallLoweringInfo &CLI, SmallVectorImpl<SDValue> &InVals) const LowerCall() argument
599 getPostIndexedAddressParts(SDNode *N, SDNode *Op, SDValue &Base, SDValue &Offset, ISD::MemIndexedMode &AM, SelectionDAG &DAG) const getPostIndexedAddressParts() argument
629 LowerINLINEASM(SDValue Op, SelectionDAG &DAG) const LowerINLINEASM() argument
677 LowerPREFETCH(SDValue Op, SelectionDAG &DAG) const LowerPREFETCH() argument
692 LowerREADCYCLECOUNTER(SDValue Op, SelectionDAG &DAG) const LowerREADCYCLECOUNTER() argument
700 LowerINTRINSIC_VOID(SDValue Op, SelectionDAG &DAG) const LowerINTRINSIC_VOID() argument
715 LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const LowerDYNAMIC_STACKALLOC() argument
745 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const LowerFormalArguments() argument
853 LowerVASTART(SDValue Op, SelectionDAG &DAG) const LowerVASTART() argument
864 LowerSETCC(SDValue Op, SelectionDAG &DAG) const LowerSETCC() argument
924 LowerVSELECT(SDValue Op, SelectionDAG &DAG) const LowerVSELECT() argument
971 LowerConstantPool(SDValue Op, SelectionDAG &DAG) const LowerConstantPool() argument
1007 LowerJumpTable(SDValue Op, SelectionDAG &DAG) const LowerJumpTable() argument
1020 LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const LowerRETURNADDR() argument
1046 LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const LowerFRAMEADDR() argument
1063 LowerATOMIC_FENCE(SDValue Op, SelectionDAG& DAG) const LowerATOMIC_FENCE() argument
1069 LowerGLOBALADDRESS(SDValue Op, SelectionDAG &DAG) const LowerGLOBALADDRESS() argument
1103 LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const LowerBlockAddress() argument
1119 LowerGLOBAL_OFFSET_TABLE(SDValue Op, SelectionDAG &DAG) const LowerGLOBAL_OFFSET_TABLE() argument
1128 GetDynamicTLSAddr(SelectionDAG &DAG, SDValue Chain, GlobalAddressSDNode *GA, SDValue Glue, EVT PtrVT, unsigned ReturnReg, unsigned char OperandFlags) const GetDynamicTLSAddr() argument
1165 LowerToTLSInitialExecModel(GlobalAddressSDNode *GA, SelectionDAG &DAG) const LowerToTLSInitialExecModel() argument
1207 LowerToTLSLocalExecModel(GlobalAddressSDNode *GA, SelectionDAG &DAG) const LowerToTLSLocalExecModel() argument
1229 LowerToTLSGeneralDynamicModel(GlobalAddressSDNode *GA, SelectionDAG &DAG) const LowerToTLSGeneralDynamicModel() argument
1266 LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const LowerGlobalTLSAddress() argument
1685 getTargetNodeName(unsigned Opcode) const getTargetNodeName() argument
1736 validateConstPtrAlignment(SDValue Ptr, const SDLoc &dl, unsigned NeedAlign) const validateConstPtrAlignment() argument
1834 getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I, MachineFunction &MF, unsigned Intrinsic) const getTgtMemIntrinsic() argument
1894 hasBitTest(SDValue X, SDValue Y) const hasBitTest() argument
1898 isTruncateFree(Type *Ty1, Type *Ty2) const isTruncateFree() argument
1902 isTruncateFree(EVT VT1, EVT VT2) const isTruncateFree() argument
1908 isFMAFasterThanFMulAndFAdd( const MachineFunction &MF, EVT VT) const isFMAFasterThanFMulAndFAdd() argument
1914 shouldExpandBuildVectorWithShuffles(EVT VT, unsigned DefinedValues) const shouldExpandBuildVectorWithShuffles() argument
1919 isShuffleMaskLegal(ArrayRef<int> Mask, EVT VT) const isShuffleMaskLegal() argument
1925 getPreferredVectorAction(MVT VT) const getPreferredVectorAction() argument
1957 getBaseAndOffset(SDValue Addr) const getBaseAndOffset() argument
1969 LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const LowerVECTOR_SHUFFLE() argument
2096 getVectorShiftByInt(SDValue Op, SelectionDAG &DAG) const getVectorShiftByInt() argument
2122 LowerVECTOR_SHIFT(SDValue Op, SelectionDAG &DAG) const LowerVECTOR_SHIFT() argument
2127 LowerROTL(SDValue Op, SelectionDAG &DAG) const LowerROTL() argument
2134 LowerBITCAST(SDValue Op, SelectionDAG &DAG) const LowerBITCAST() argument
2152 getBuildVectorConstInts(ArrayRef<SDValue> Values, MVT VecTy, SelectionDAG &DAG, MutableArrayRef<ConstantInt*> Consts) const getBuildVectorConstInts() argument
2182 buildVector32(ArrayRef<SDValue> Elem, const SDLoc &dl, MVT VecTy, SelectionDAG &DAG) const buildVector32() argument
2265 buildVector64(ArrayRef<SDValue> Elem, const SDLoc &dl, MVT VecTy, SelectionDAG &DAG) const buildVector64() argument
2326 extractVector(SDValue VecV, SDValue IdxV, const SDLoc &dl, MVT ValTy, MVT ResTy, SelectionDAG &DAG) const extractVector() argument
2425 insertVector(SDValue VecV, SDValue ValV, SDValue IdxV, const SDLoc &dl, MVT ValTy, SelectionDAG &DAG) const insertVector() argument
2491 expandPredicate(SDValue Vec32, const SDLoc &dl, SelectionDAG &DAG) const expandPredicate() argument
2500 contractPredicate(SDValue Vec64, const SDLoc &dl, SelectionDAG &DAG) const contractPredicate() argument
2509 getZero(const SDLoc &dl, MVT Ty, SelectionDAG &DAG) const getZero() argument
2527 LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const LowerBUILD_VECTOR() argument
2581 LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const LowerCONCAT_VECTORS() argument
2646 LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const LowerEXTRACT_VECTOR_ELT() argument
2654 LowerEXTRACT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const LowerEXTRACT_SUBVECTOR() argument
2661 LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const LowerINSERT_VECTOR_ELT() argument
2668 LowerINSERT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const LowerINSERT_SUBVECTOR() argument
2676 allowTruncateForTailCall(Type *Ty1, Type *Ty2) const allowTruncateForTailCall() argument
2689 LowerLoad(SDValue Op, SelectionDAG &DAG) const LowerLoad() argument
2699 LowerStore(SDValue Op, SelectionDAG &DAG) const LowerStore() argument
2714 LowerUnalignedLoad(SDValue Op, SelectionDAG &DAG) const LowerUnalignedLoad() argument
2800 LowerUAddSubO(SDValue Op, SelectionDAG &DAG) const LowerUAddSubO() argument
2837 LowerAddSubCarry(SDValue Op, SelectionDAG &DAG) const LowerAddSubCarry() argument
2855 LowerEH_RETURN(SDValue Op, SelectionDAG &DAG) const LowerEH_RETURN() argument
2882 LowerOperation(SDValue Op, SelectionDAG &DAG) const LowerOperation() argument
2946 LowerOperationWrapper(SDNode *N, SmallVectorImpl<SDValue> &Results, SelectionDAG &DAG) const LowerOperationWrapper() argument
2959 ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results, SelectionDAG &DAG) const ReplaceNodeResults() argument
2981 PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const PerformDAGCombine() argument
3023 getPICJumpTableRelocBase(SDValue Table, SelectionDAG &DAG) const getPICJumpTableRelocBase() argument
3036 getConstraintType(StringRef Constraint) const getConstraintType() argument
3054 getRegForInlineAsmConstraint( const TargetRegisterInfo *TRI, StringRef Constraint, MVT VT) const getRegForInlineAsmConstraint() argument
3112 isFPImmLegal(const APFloat &Imm, EVT VT, bool ForCodeSize) const isFPImmLegal() argument
3119 isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty, unsigned AS, Instruction *I) const isLegalAddressingMode() argument
3157 isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const isOffsetFoldingLegal() argument
3166 isLegalICmpImmediate(int64_t Imm) const isLegalICmpImmediate() argument
3173 IsEligibleForTailCallOptimization( SDValue Callee, CallingConv::ID CalleeCC, bool IsVarArg, bool IsCalleeStructRet, bool IsCallerStructRet, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG& DAG) const IsEligibleForTailCallOptimization() argument
3235 getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign, bool IsMemset, bool ZeroMemset, bool MemcpyStrSrc, const AttributeList &FuncAttributes) const getOptimalMemOpType() argument
3253 allowsMisalignedMemoryAccesses( EVT VT, unsigned AS, unsigned Align, MachineMemOperand::Flags Flags, bool *Fast) const allowsMisalignedMemoryAccesses() argument
3262 findRepresentativeClass(const TargetRegisterInfo *TRI, MVT VT) const findRepresentativeClass() argument
3279 shouldReduceLoadWidth(SDNode *Load, ISD::LoadExtType ExtTy, EVT NewVT) const shouldReduceLoadWidth() argument
3298 emitLoadLinked(IRBuilder< &Builder, Value *Addr, AtomicOrdering Ord) const emitLoadLinked() argument
3321 emitStoreConditional(IRBuilder< &Builder, Value *Val, Value *Addr, AtomicOrdering Ord) const emitStoreConditional() argument
3345 shouldExpandAtomicLoadInIR(LoadInst *LI) const shouldExpandAtomicLoadInIR() argument
3352 shouldExpandAtomicStoreInIR(StoreInst *SI) const shouldExpandAtomicStoreInIR() argument
3358 shouldExpandAtomicCmpXchgInIR( AtomicCmpXchgInst *AI) const shouldExpandAtomicCmpXchgInIR() argument
[all...] |
| H A D | HexagonInstrInfo.cpp | 146 findLoopInstr(MachineBasicBlock *BB, unsigned EndLoopOp, MachineBasicBlock *TargetBB, SmallPtrSet<MachineBasicBlock *, 8> &Visited) const findLoopInstr() argument
239 isLoadFromStackSlot(const MachineInstr &MI, int &FrameIndex) const isLoadFromStackSlot() argument
287 isStoreToStackSlot(const MachineInstr &MI, int &FrameIndex) const isStoreToStackSlot() argument
337 hasLoadFromStackSlot( const MachineInstr &MI, SmallVectorImpl<const MachineMemOperand *> &Accesses) const hasLoadFromStackSlot() argument
355 hasStoreToStackSlot( const MachineInstr &MI, SmallVectorImpl<const MachineMemOperand *> &Accesses) const hasStoreToStackSlot() argument
385 analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const analyzeBranch() argument
555 removeBranch(MachineBasicBlock &MBB, int *BytesRemoved) const removeBranch() argument
578 insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, const DebugLoc &DL, int *BytesAdded) const insertBranch() argument
755 analyzeLoopForPipelining(MachineBasicBlock *LoopBB) const analyzeLoopForPipelining() argument
769 isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, unsigned ExtraPredCycles, BranchProbability Probability) const isProfitableToIfCvt() argument
775 isProfitableToIfCvt(MachineBasicBlock &TMBB, unsigned NumTCycles, unsigned ExtraTCycles, MachineBasicBlock &FMBB, unsigned NumFCycles, unsigned ExtraFCycles, BranchProbability Probability) const isProfitableToIfCvt() argument
782 isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumInstrs, BranchProbability Probability) const isProfitableToDupForIfCvt() argument
787 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc) const copyPhysReg() argument
884 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned SrcReg, bool isKill, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const storeRegToStackSlot() argument
930 loadRegFromStackSlot( MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const loadRegFromStackSlot() argument
983 expandPostRAPseudo(MachineInstr &MI) const expandPostRAPseudo() argument
1436 expandVGatherPseudo(MachineInstr &MI) const expandVGatherPseudo() argument
1524 reverseBranchCondition( SmallVectorImpl<MachineOperand> &Cond) const reverseBranchCondition() argument
1539 insertNoop(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const insertNoop() argument
1545 isPostIncrement(const MachineInstr &MI) const isPostIncrement() argument
1557 isPredicated(const MachineInstr &MI) const isPredicated() argument
1562 PredicateInstruction( MachineInstr &MI, ArrayRef<MachineOperand> Cond) const PredicateInstruction() argument
1613 SubsumesPredicate(ArrayRef<MachineOperand> Pred1, ArrayRef<MachineOperand> Pred2) const SubsumesPredicate() argument
1619 DefinesPredicate(MachineInstr &MI, std::vector<MachineOperand> &Pred) const DefinesPredicate() argument
1646 isPredicable(const MachineInstr &MI) const isPredicable() argument
1682 isSchedulingBoundary(const MachineInstr &MI, const MachineBasicBlock *MBB, const MachineFunction &MF) const isSchedulingBoundary() argument
1726 getInlineAsmLength(const char *Str, const MCAsmInfo &MAI, const TargetSubtargetInfo *STI) const getInlineAsmLength() argument
1754 CreateTargetPostRAHazardRecognizer( const InstrItineraryData *II, const ScheduleDAG *DAG) const CreateTargetPostRAHazardRecognizer() argument
1765 analyzeCompare(const MachineInstr &MI, unsigned &SrcReg, unsigned &SrcReg2, int &Mask, int &Value) const analyzeCompare() argument
1854 getInstrLatency(const InstrItineraryData *ItinData, const MachineInstr &MI, unsigned *PredCost) const getInstrLatency() argument
1860 CreateTargetScheduleState( const TargetSubtargetInfo &STI) const CreateTargetScheduleState() argument
1870 areMemAccessesTriviallyDisjoint( const MachineInstr &MIa, const MachineInstr &MIb) const areMemAccessesTriviallyDisjoint() argument
1928 getIncrementValue(const MachineInstr &MI, int &Value) const getIncrementValue() argument
1951 decomposeMachineOperandsTargetFlags(unsigned TF) const decomposeMachineOperandsTargetFlags() argument
1957 getSerializableDirectMachineOperandTargetFlags() const getSerializableDirectMachineOperandTargetFlags() argument
1976 getSerializableBitmaskMachineOperandTargetFlags() const getSerializableBitmaskMachineOperandTargetFlags() argument
1985 createVR(MachineFunction *MF, MVT VT) const createVR() argument
2002 isAbsoluteSet(const MachineInstr &MI) const isAbsoluteSet() argument
2006 isAccumulator(const MachineInstr &MI) const isAccumulator() argument
2011 isBaseImmOffset(const MachineInstr &MI) const isBaseImmOffset() argument
2015 isComplex(const MachineInstr &MI) const isComplex() argument
2024 isCompoundBranchInstr(const MachineInstr &MI) const isCompoundBranchInstr() argument
2030 isConstExtended(const MachineInstr &MI) const isConstExtended() argument
2073 isDeallocRet(const MachineInstr &MI) const isDeallocRet() argument
2088 isDependent(const MachineInstr &ProdMI, const MachineInstr &ConsMI) const isDependent() argument
2123 isDotCurInst(const MachineInstr &MI) const isDotCurInst() argument
2134 isDotNewInst(const MachineInstr &MI) const isDotNewInst() argument
2142 isDuplexPair(const MachineInstr &MIa, const MachineInstr &MIb) const isDuplexPair() argument
2149 isEarlySourceInstr(const MachineInstr &MI) const isEarlySourceInstr() argument
2158 isEndLoopN(unsigned Opcode) const isEndLoopN() argument
2163 isExpr(unsigned OpType) const isExpr() argument
2177 isExtendable(const MachineInstr &MI) const isExtendable() argument
2199 isExtended(const MachineInstr &MI) const isExtended() argument
2212 isFloat(const MachineInstr &MI) const isFloat() argument
2219 isHVXMemWithAIndirect(const MachineInstr &I, const MachineInstr &J) const isHVXMemWithAIndirect() argument
2228 isIndirectCall(const MachineInstr &MI) const isIndirectCall() argument
2239 isIndirectL4Return(const MachineInstr &MI) const isIndirectL4Return() argument
2253 isJumpR(const MachineInstr &MI) const isJumpR() argument
2271 isJumpWithinBranchRange(const MachineInstr &MI, unsigned offset) const isJumpWithinBranchRange() argument
2313 isLateInstrFeedsEarlyInstr(const MachineInstr &LRMI, const MachineInstr &ESMI) const isLateInstrFeedsEarlyInstr() argument
2331 isLateResultInstr(const MachineInstr &MI) const isLateResultInstr() argument
2350 isLateSourceInstr(const MachineInstr &MI) const isLateSourceInstr() argument
2356 isLoopN(const MachineInstr &MI) const isLoopN() argument
2368 isMemOp(const MachineInstr &MI) const isMemOp() argument
2400 isNewValue(const MachineInstr &MI) const isNewValue() argument
2405 isNewValue(unsigned Opcode) const isNewValue() argument
2410 isNewValueInst(const MachineInstr &MI) const isNewValueInst() argument
2414 isNewValueJump(const MachineInstr &MI) const isNewValueJump() argument
2418 isNewValueJump(unsigned Opcode) const isNewValueJump() argument
2422 isNewValueStore(const MachineInstr &MI) const isNewValueStore() argument
2427 isNewValueStore(unsigned Opcode) const isNewValueStore() argument
2433 isOperandExtended(const MachineInstr &MI, unsigned OperandNum) const isOperandExtended() argument
2440 isPredicatedNew(const MachineInstr &MI) const isPredicatedNew() argument
2446 isPredicatedNew(unsigned Opcode) const isPredicatedNew() argument
2452 isPredicatedTrue(const MachineInstr &MI) const isPredicatedTrue() argument
2458 isPredicatedTrue(unsigned Opcode) const isPredicatedTrue() argument
2466 isPredicated(unsigned Opcode) const isPredicated() argument
2471 isPredicateLate(unsigned Opcode) const isPredicateLate() argument
2476 isPredictedTaken(unsigned Opcode) const isPredictedTaken() argument
2483 isSaveCalleeSavedRegsCall(const MachineInstr &MI) const isSaveCalleeSavedRegsCall() argument
2490 isSignExtendingLoad(const MachineInstr &MI) const isSignExtendingLoad() argument
2568 isSolo(const MachineInstr &MI) const isSolo() argument
2573 isSpillPredRegOp(const MachineInstr &MI) const isSpillPredRegOp() argument
2583 isTailCall(const MachineInstr &MI) const isTailCall() argument
2594 isTC1(const MachineInstr &MI) const isTC1() argument
2599 isTC2(const MachineInstr &MI) const isTC2() argument
2604 isTC2Early(const MachineInstr &MI) const isTC2Early() argument
2609 isTC4x(const MachineInstr &MI) const isTC4x() argument
2615 isToBeScheduledASAP(const MachineInstr &MI1, const MachineInstr &MI2) const isToBeScheduledASAP() argument
2633 isHVXVec(const MachineInstr &MI) const isHVXVec() argument
2639 isValidAutoIncImm(const EVT VT, int Offset) const isValidAutoIncImm() argument
2676 isValidOffset(unsigned Opcode, int Offset, const TargetRegisterInfo *TRI, bool Extend) const isValidOffset() argument
2829 isVecAcc(const MachineInstr &MI) const isVecAcc() argument
2833 isVecALU(const MachineInstr &MI) const isVecALU() argument
2841 isVecUsableNextPacket(const MachineInstr &ProdMI, const MachineInstr &ConsMI) const isVecUsableNextPacket() argument
2855 isZeroExtendingLoad(const MachineInstr &MI) const isZeroExtendingLoad() argument
2934 addLatencyToSchedule(const MachineInstr &MI1, const MachineInstr &MI2) const addLatencyToSchedule() argument
2943 getMemOperandWithOffset( const MachineInstr &LdSt, const MachineOperand *&BaseOp, int64_t &Offset, const TargetRegisterInfo *TRI) const getMemOperandWithOffset() argument
2952 canExecuteInBundle(const MachineInstr &First, const MachineInstr &Second) const canExecuteInBundle() argument
2977 doesNotReturn(const MachineInstr &CallMI) const doesNotReturn() argument
2982 hasEHLabel(const MachineBasicBlock *B) const hasEHLabel() argument
2991 hasNonExtEquivalent(const MachineInstr &MI) const hasNonExtEquivalent() argument
3026 hasPseudoInstrPair(const MachineInstr &MI) const hasPseudoInstrPair() argument
3031 hasUncondBranch(const MachineBasicBlock *B) const hasUncondBranch() argument
3043 mayBeCurLoad(const MachineInstr &MI) const mayBeCurLoad() argument
3050 mayBeNewStore(const MachineInstr &MI) const mayBeNewStore() argument
3058 producesStall(const MachineInstr &ProdMI, const MachineInstr &ConsMI) const producesStall() argument
3076 producesStall(const MachineInstr &MI, MachineBasicBlock::const_instr_iterator BII) const producesStall() argument
3096 predCanBeUsedAsDotNew(const MachineInstr &MI, unsigned PredReg) const predCanBeUsedAsDotNew() argument
3131 PredOpcodeHasJMP_c(unsigned Opcode) const PredOpcodeHasJMP_c() argument
3142 predOpcodeHasNot(ArrayRef<MachineOperand> Cond) const predOpcodeHasNot() argument
3148 getAddrMode(const MachineInstr &MI) const getAddrMode() argument
3157 getBaseAndOffset(const MachineInstr &MI, int64_t &Offset, unsigned &AccessSize) const getBaseAndOffset() argument
3190 getBaseAndOffsetPosition(const MachineInstr &MI, unsigned &BasePos, unsigned &OffsetPos) const getBaseAndOffsetPosition() argument
3227 getBranchingInstrs( MachineBasicBlock& MBB) const getBranchingInstrs() argument
3285 getCExtOpNum(const MachineInstr &MI) const getCExtOpNum() argument
3292 getCompoundCandidateGroup( const MachineInstr &MI) const getCompoundCandidateGroup() argument
3380 getCompoundOpcode(const MachineInstr &GA, const MachineInstr &GB) const getCompoundOpcode() argument
3406 getCondOpcode(int Opc, bool invertPredicate) const getCondOpcode() argument
3418 getDotCurOp(const MachineInstr &MI) const getDotCurOp() argument
3434 getNonDotCurOp(const MachineInstr &MI) const getNonDotCurOp() argument
3531 getDotNewOp(const MachineInstr &MI) const getDotNewOp() argument
3572 getDotNewPredJumpOp(const MachineInstr &MI, const MachineBranchProbabilityInfo *MBPI) const getDotNewPredJumpOp() argument
3673 getDotOldOp(const MachineInstr &MI) const getDotOldOp() argument
3724 getDuplexCandidateGroup( const MachineInstr &MI) const getDuplexCandidateGroup() argument
4070 getEquivalentHWInstr(const MachineInstr &MI) const getEquivalentHWInstr() argument
4074 getInstrTimingClassLatency( const InstrItineraryData *ItinData, const MachineInstr &MI) const getInstrTimingClassLatency() argument
4094 getOperandLatency(const InstrItineraryData *ItinData, const MachineInstr &DefMI, unsigned DefIdx, const MachineInstr &UseMI, unsigned UseIdx) const getOperandLatency() argument
4140 getInvertedPredSense( SmallVectorImpl<MachineOperand> &Cond) const getInvertedPredSense() argument
4149 getInvertedPredicatedOpcode(const int Opc) const getInvertedPredicatedOpcode() argument
4160 getMaxValue(const MachineInstr &MI) const getMaxValue() argument
4174 isAddrModeWithOffset(const MachineInstr &MI) const isAddrModeWithOffset() argument
4202 getMemAccessSize(const MachineInstr &MI) const getMemAccessSize() argument
4222 getMinValue(const MachineInstr &MI) const getMinValue() argument
4236 getNonExtOpcode(const MachineInstr &MI) const getNonExtOpcode() argument
4260 getPredReg(ArrayRef<MachineOperand> Cond, unsigned &PredReg, unsigned &PredRegPos, unsigned &PredRegFlags) const getPredReg() argument
4280 getPseudoInstrPair(const MachineInstr &MI) const getPseudoInstrPair() argument
4284 getRegForm(const MachineInstr &MI) const getRegForm() argument
4292 getSize(const MachineInstr &MI) const getSize() argument
4326 getType(const MachineInstr &MI) const getType() argument
4331 getUnits(const MachineInstr &MI) const getUnits() argument
4339 nonDbgBBSize(const MachineBasicBlock *BB) const nonDbgBBSize() argument
4343 nonDbgBundleSize( MachineBasicBlock::const_iterator BundleHead) const nonDbgBundleSize() argument
4353 immediateExtend(MachineInstr &MI) const immediateExtend() argument
4366 invertAndChangeJumpTarget( MachineInstr &MI, MachineBasicBlock *NewTarget) const invertAndChangeJumpTarget() argument
4387 genAllInsnTimingClasses(MachineFunction &MF) const genAllInsnTimingClasses() argument
4409 reversePredSense(MachineInstr &MI) const reversePredSense() argument
4416 reversePrediction(unsigned Opcode) const reversePrediction() argument
4427 validateBranchCond(const ArrayRef<MachineOperand> &Cond) const validateBranchCond() argument
4433 setBundleNoShuf(MachineBasicBlock::instr_iterator MIB) const setBundleNoShuf() argument
4442 getBundleNoShuf(const MachineInstr &MIB) const getBundleNoShuf() argument
4449 changeAddrMode_abs_io(short Opc) const changeAddrMode_abs_io() argument
4453 changeAddrMode_io_abs(short Opc) const changeAddrMode_io_abs() argument
4457 changeAddrMode_io_pi(short Opc) const changeAddrMode_io_pi() argument
4461 changeAddrMode_io_rr(short Opc) const changeAddrMode_io_rr() argument
4465 changeAddrMode_pi_io(short Opc) const changeAddrMode_pi_io() argument
4469 changeAddrMode_rr_io(short Opc) const changeAddrMode_rr_io() argument
4473 changeAddrMode_rr_ur(short Opc) const changeAddrMode_rr_ur() argument
4477 changeAddrMode_ur_rr(short Opc) const changeAddrMode_ur_rr() argument
[all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 111 getRegisterTypeForCallingConv(LLVMContext &Context, CallingConv::ID CC, EVT VT) const getRegisterTypeForCallingConv() argument
121 getNumRegistersForCallingConv(LLVMContext &Context, CallingConv::ID CC, EVT VT) const getNumRegistersForCallingConv() argument
131 getVectorTypeBreakdownForCallingConv( LLVMContext &Context, CallingConv::ID CC, EVT VT, EVT &IntermediateVT, unsigned &NumIntermediates, MVT &RegisterVT) const getVectorTypeBreakdownForCallingConv() argument
149 getTargetNode(GlobalAddressSDNode *N, EVT Ty, SelectionDAG &DAG, unsigned Flag) const getTargetNode() argument
155 getTargetNode(ExternalSymbolSDNode *N, EVT Ty, SelectionDAG &DAG, unsigned Flag) const getTargetNode() argument
161 getTargetNode(BlockAddressSDNode *N, EVT Ty, SelectionDAG &DAG, unsigned Flag) const getTargetNode() argument
167 getTargetNode(JumpTableSDNode *N, EVT Ty, SelectionDAG &DAG, unsigned Flag) const getTargetNode() argument
173 getTargetNode(ConstantPoolSDNode *N, EVT Ty, SelectionDAG &DAG, unsigned Flag) const getTargetNode() argument
180 getTargetNodeName(unsigned Opcode) const getTargetNodeName() argument
540 createFastISel(FunctionLoweringInfo &funcInfo, const TargetLibraryInfo *libInfo) const createFastISel() argument
559 getSetCCResultType(const DataLayout &, LLVMContext &, EVT VT) const getSetCCResultType() argument
1154 PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const PerformDAGCombine() argument
1184 isCheapToSpeculateCttz() const isCheapToSpeculateCttz() argument
1188 isCheapToSpeculateCtlz() const isCheapToSpeculateCtlz() argument
1192 shouldFoldConstantShiftPairToMask( const SDNode *N, CombineLevel Level) const shouldFoldConstantShiftPairToMask() argument
1200 LowerOperationWrapper(SDNode *N, SmallVectorImpl<SDValue> &Results, SelectionDAG &DAG) const LowerOperationWrapper() argument
1211 ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results, SelectionDAG &DAG) const ReplaceNodeResults() argument
1218 LowerOperation(SDValue Op, SelectionDAG &DAG) const LowerOperation() argument
1295 EmitInstrWithCustomInserter(MachineInstr &MI, MachineBasicBlock *BB) const EmitInstrWithCustomInserter() argument
1460 emitAtomicBinary(MachineInstr &MI, MachineBasicBlock *BB) const emitAtomicBinary() argument
1616 emitSignExtendToI32InReg( MachineInstr &MI, MachineBasicBlock *BB, unsigned Size, unsigned DstReg, unsigned SrcReg) const emitSignExtendToI32InReg() argument
1646 emitAtomicBinaryPartword( MachineInstr &MI, MachineBasicBlock *BB, unsigned Size) const emitAtomicBinaryPartword() argument
1838 emitAtomicCmpSwap(MachineInstr &MI, MachineBasicBlock *BB) const emitAtomicCmpSwap() argument
1894 emitAtomicCmpSwapPartword( MachineInstr &MI, MachineBasicBlock *BB, unsigned Size) const emitAtomicCmpSwapPartword() argument
2018 lowerBRCOND(SDValue Op, SelectionDAG &DAG) const lowerBRCOND() argument
2043 lowerSELECT(SDValue Op, SelectionDAG &DAG) const lowerSELECT() argument
2056 lowerSETCC(SDValue Op, SelectionDAG &DAG) const lowerSETCC() argument
2070 lowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const lowerGlobalAddress() argument
2117 lowerBlockAddress(SDValue Op, SelectionDAG &DAG) const lowerBlockAddress() argument
2130 lowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const lowerGlobalTLSAddress() argument
2212 lowerJumpTable(SDValue Op, SelectionDAG &DAG) const lowerJumpTable() argument
2225 lowerConstantPool(SDValue Op, SelectionDAG &DAG) const lowerConstantPool() argument
2247 lowerVASTART(SDValue Op, SelectionDAG &DAG) const lowerVASTART() argument
2262 lowerVAARG(SDValue Op, SelectionDAG &DAG) const lowerVAARG() argument
2418 lowerFCOPYSIGN(SDValue Op, SelectionDAG &DAG) const lowerFCOPYSIGN() argument
2483 lowerFABS(SDValue Op, SelectionDAG &DAG) const lowerFABS() argument
2491 lowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const lowerFRAMEADDR() argument
2508 lowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const lowerRETURNADDR() argument
2535 lowerEH_RETURN(SDValue Op, SelectionDAG &DAG) const lowerEH_RETURN() argument
2559 lowerATOMIC_FENCE(SDValue Op, SelectionDAG &DAG) const lowerATOMIC_FENCE() argument
2569 lowerShiftLeftParts(SDValue Op, SelectionDAG &DAG) const lowerShiftLeftParts() argument
2600 lowerShiftRightParts(SDValue Op, SelectionDAG &DAG, bool IsSRA) const lowerShiftRightParts() argument
2669 lowerLOAD(SDValue Op, SelectionDAG &DAG) const lowerLOAD() argument
2795 lowerSTORE(SDValue Op, SelectionDAG &DAG) const lowerSTORE() argument
2808 lowerEH_DWARF_CFA(SDValue Op, SelectionDAG &DAG) const lowerEH_DWARF_CFA() argument
2819 lowerFP_TO_SINT(SDValue Op, SelectionDAG &DAG) const lowerFP_TO_SINT() argument
2988 CCAssignFnForCall() const CCAssignFnForCall() argument
2992 CCAssignFnForReturn() const CCAssignFnForReturn() argument
3005 passArgOnStack(SDValue StackPtr, unsigned Offset, SDValue Chain, SDValue Arg, const SDLoc &DL, bool IsTailCall, SelectionDAG &DAG) const passArgOnStack() argument
3024 getOpndList(SmallVectorImpl<SDValue> &Ops, std::deque<std::pair<unsigned, SDValue>> &RegsToPass, bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage, bool IsCallReloc, CallLoweringInfo &CLI, SDValue Callee, SDValue Chain) const getOpndList() argument
3083 AdjustInstrPostInstrSelection(MachineInstr &MI, SDNode *Node) const AdjustInstrPostInstrSelection() argument
3143 LowerCall(TargetLowering::CallLoweringInfo &CLI, SmallVectorImpl<SDValue> &InVals) const LowerCall() argument
3464 LowerCallResult( SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals, TargetLowering::CallLoweringInfo &CLI) const LowerCallResult() argument
3591 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const LowerFormalArguments() argument
3746 CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, LLVMContext &Context) const CanLowerReturn() argument
3755 shouldSignExtendTypeInLibCall(EVT Type, bool IsSigned) const shouldSignExtendTypeInLibCall() argument
3764 LowerInterruptReturn(SmallVectorImpl<SDValue> &RetOps, const SDLoc &DL, SelectionDAG &DAG) const LowerInterruptReturn() argument
3776 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, SelectionDAG &DAG) const LowerReturn() argument
3885 getConstraintType(StringRef Constraint) const getConstraintType() argument
3922 getSingleConstraintMatchWeight( AsmOperandInfo &info, const char *constraint) const getSingleConstraintMatchWeight() argument
3995 getTypeForExtReturn(LLVMContext &Context, EVT VT, ISD::NodeType) const getTypeForExtReturn() argument
4003 parseRegForInlineAsmConstraint(StringRef C, MVT VT) const parseRegForInlineAsmConstraint() argument
4080 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, StringRef Constraint, MVT VT) const getRegForInlineAsmConstraint() argument
4149 LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint, std::vector<SDValue>&Ops, SelectionDAG &DAG) const LowerAsmOperandForConstraint() argument
4243 isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty, unsigned AS, Instruction *I) const isLegalAddressingMode() argument
4266 isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const isOffsetFoldingLegal() argument
4271 getOptimalMemOpType( uint64_t Size, unsigned DstAlign, unsigned SrcAlign, bool IsMemset, bool ZeroMemset, bool MemcpyStrSrc, const AttributeList &FuncAttributes) const getOptimalMemOpType() argument
4281 isFPImmLegal(const APFloat &Imm, EVT VT, bool ForCodeSize) const isFPImmLegal() argument
4290 getJumpTableEncoding() const getJumpTableEncoding() argument
4299 useSoftFloat() const useSoftFloat() argument
4303 copyByValRegs( SDValue Chain, const SDLoc &DL, std::vector<SDValue> &OutChains, SelectionDAG &DAG, const ISD::ArgFlagsTy &Flags, SmallVectorImpl<SDValue> &InVals, const Argument *FuncArg, unsigned FirstReg, unsigned LastReg, const CCValAssign &VA, MipsCCState &State) const copyByValRegs() argument
4356 passByValArg( SDValue Chain, const SDLoc &DL, std::deque<std::pair<unsigned, SDValue>> &RegsToPass, SmallVectorImpl<SDValue> &MemOpChains, SDValue StackPtr, MachineFrameInfo &MFI, SelectionDAG &DAG, SDValue Arg, unsigned FirstReg, unsigned LastReg, const ISD::ArgFlagsTy &Flags, bool isLittle, const CCValAssign &VA) const passByValArg() argument
4452 writeVarArgRegs(std::vector<SDValue> &OutChains, SDValue Chain, const SDLoc &DL, SelectionDAG &DAG, CCState &State) const writeVarArgRegs() argument
4499 HandleByVal(CCState *State, unsigned &Size, unsigned Align) const HandleByVal() argument
4544 emitPseudoSELECT(MachineInstr &MI, MachineBasicBlock *BB, bool isFPCmp, unsigned Opc) const emitPseudoSELECT() argument
4623 emitPseudoD_SELECT(MachineInstr &MI, MachineBasicBlock *BB) const emitPseudoD_SELECT() argument
4701 getRegisterByName(const char *RegName, LLT VT, const MachineFunction &MF) const getRegisterByName() argument
[all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86AsmParser.cpp | 965 is64BitMode() const is64BitMode() argument
969 is32BitMode() const is32BitMode() argument
973 is16BitMode() const is16BitMode() argument
[all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 333 shouldAvoidImmediateInstFormsForSize(SDNode *N) const shouldAvoidImmediateInstFormsForSize() argument
441 isUnneededShiftMask(SDNode *N, unsigned Width) const isUnneededShiftMask() argument
459 getTargetMachine() const getTargetMachine() argument
465 getInstrInfo() const getInstrInfo() argument
480 isSExtRelocImm(SDNode *N) const isSExtRelocImm() argument
487 useNonTemporalLoad(LoadSDNode *N) const useNonTemporalLoad() argument
566 isMaskZeroExtended(SDNode *N) const isMaskZeroExtended() argument
578 IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const IsProfitableToFold() argument
2686 isSExtAbsoluteSymbolRef(unsigned Width, SDNode *N) const isSExtAbsoluteSymbolRef() argument
2723 onlyUsesZeroFlag(SDValue Flags) const onlyUsesZeroFlag() argument
2759 hasNoSignFlagUses(SDValue Flags) const hasNoSignFlagUses() argument
2815 hasNoCarryFlagUses(SDValue Flags) const hasNoCarryFlagUses() argument
[all...] |
| H A D | X86InstrInfo.cpp | 90 X86InstrInfo::isCoalescableExtInstr(const MachineInstr &MI, in isCoalescableExtInstr() argument
138 int X86InstrInfo::getSPAdjust(const MachineInstr &MI) const { in getSPAdjust() argument
193 bool X86InstrInfo::isFrameOperand(const MachineInstr &MI, unsigned int Op, in isFrameOperand() argument
396 unsigned X86InstrInfo::isLoadFromStackSlot(const MachineInst argument
402 isLoadFromStackSlot(const MachineInstr &MI, int &FrameIndex, unsigned &MemBytes) const isLoadFromStackSlot() argument
411 isLoadFromStackSlotPostFE(const MachineInstr &MI, int &FrameIndex) const isLoadFromStackSlotPostFE() argument
430 isStoreToStackSlot(const MachineInstr &MI, int &FrameIndex) const isStoreToStackSlot() argument
436 isStoreToStackSlot(const MachineInstr &MI, int &FrameIndex, unsigned &MemBytes) const isStoreToStackSlot() argument
446 isStoreToStackSlotPostFE(const MachineInstr &MI, int &FrameIndex) const isStoreToStackSlotPostFE() argument
482 isReallyTriviallyReMaterializable(const MachineInstr &MI, AAResults *AA) const isReallyTriviallyReMaterializable() argument
640 reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, unsigned SubIdx, const MachineInstr &Orig, const TargetRegisterInfo &TRI) const reMaterialize() argument
672 hasLiveCondCodeDef(MachineInstr &MI) const hasLiveCondCodeDef() argument
703 classifyLEAReg(MachineInstr &MI, const MachineOperand &Src, unsigned Opc, bool AllowSP, Register &NewSrc, bool &isKill, MachineOperand &ImplicitOp, LiveVariables *LV) const classifyLEAReg() argument
760 convertToThreeAddressWithLEA( unsigned MIOpc, MachineFunction::iterator &MFI, MachineInstr &MI, LiveVariables *LV, bool Is8BitOp) const convertToThreeAddressWithLEA() argument
892 convertToThreeAddress(MachineFunction::iterator &MFI, MachineInstr &MI, LiveVariables *LV) const convertToThreeAddress() argument
1357 getFMA3OpcodeToCommuteOperands( const MachineInstr &MI, unsigned SrcOpIdx1, unsigned SrcOpIdx2, const X86InstrFMA3Group &FMA3Group) const getFMA3OpcodeToCommuteOperands() argument
2438 replaceBranchWithTailCall( MachineBasicBlock &MBB, SmallVectorImpl<MachineOperand> &BranchCond, const MachineInstr &TailCall) const replaceBranchWithTailCall() argument
2503 AnalyzeBranchImpl( MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, SmallVectorImpl<MachineInstr *> &CondBranches, bool AllowModify) const AnalyzeBranchImpl() argument
2669 analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const analyzeBranch() argument
2678 analyzeBranchPredicate(MachineBasicBlock &MBB, MachineBranchPredicate &MBP, bool AllowModify) const analyzeBranchPredicate() argument
2747 removeBranch(MachineBasicBlock &MBB, int *BytesRemoved) const removeBranch() argument
2770 insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond, const DebugLoc &DL, int *BytesAdded) const insertBranch() argument
2830 canInsertSelect(const MachineBasicBlock &MBB, ArrayRef<MachineOperand> Cond, unsigned TrueReg, unsigned FalseReg, int &CondCycles, int &TrueCycles, int &FalseCycles) const canInsertSelect() argument
2866 insertSelect(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, unsigned DstReg, ArrayRef<MachineOperand> Cond, unsigned TrueReg, unsigned FalseReg) const insertSelect() argument
2965 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc) const copyPhysReg() argument
3051 isCopyInstrImpl(const MachineInstr &MI) const isCopyInstrImpl() argument
3192 getMemOperandWithOffset( const MachineInstr &MemOp, const MachineOperand *&BaseOp, int64_t &Offset, const TargetRegisterInfo *TRI) const getMemOperandWithOffset() argument
3242 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const storeRegToStackSlot() argument
3259 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const loadRegFromStackSlot() argument
3273 analyzeCompare(const MachineInstr &MI, unsigned &SrcReg, unsigned &SrcReg2, int &CmpMask, int &CmpValue) const analyzeCompare() argument
3550 optimizeCompareInstr(MachineInstr &CmpInstr, unsigned SrcReg, unsigned SrcReg2, int CmpMask, int CmpValue, const MachineRegisterInfo *MRI) const optimizeCompareInstr() argument
3831 optimizeLoadInstr(MachineInstr &MI, const MachineRegisterInfo *MRI, unsigned &FoldAsLoadDefReg, MachineInstr *&DefMI) const optimizeLoadInstr() argument
4073 expandPostRAPseudo(MachineInstr &MI) const expandPostRAPseudo() argument
4336 getPartialRegUpdateClearance( const MachineInstr &MI, unsigned OpNum, const TargetRegisterInfo *TRI) const getPartialRegUpdateClearance() argument
4551 getUndefRegClearance(const MachineInstr &MI, unsigned &OpNum, const TargetRegisterInfo *TRI) const getUndefRegClearance() argument
4563 breakPartialRegDependency( MachineInstr &MI, unsigned OpNum, const TargetRegisterInfo *TRI) const breakPartialRegDependency() argument
4727 foldMemoryOperandCustom( MachineFunction &MF, MachineInstr &MI, unsigned OpNum, ArrayRef<MachineOperand> MOs, MachineBasicBlock::iterator InsertPt, unsigned Size, unsigned Align) const foldMemoryOperandCustom() argument
4822 foldMemoryOperandImpl( MachineFunction &MF, MachineInstr &MI, unsigned OpNum, ArrayRef<MachineOperand> MOs, MachineBasicBlock::iterator InsertPt, unsigned Size, unsigned Align, bool AllowCommute) const foldMemoryOperandImpl() argument
5000 foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI, ArrayRef<unsigned> Ops, MachineBasicBlock::iterator InsertPt, int FrameIndex, LiveIntervals *LIS, VirtRegMap *VRM) const foldMemoryOperandImpl() argument
5191 foldMemoryOperandImpl( MachineFunction &MF, MachineInstr &MI, ArrayRef<unsigned> Ops, MachineBasicBlock::iterator InsertPt, MachineInstr &LoadMI, LiveIntervals *LIS) const foldMemoryOperandImpl() argument
5451 unfoldMemoryOperand( MachineFunction &MF, MachineInstr &MI, unsigned Reg, bool UnfoldLoad, bool UnfoldStore, SmallVectorImpl<MachineInstr *> &NewMIs) const unfoldMemoryOperand() argument
5597 unfoldMemoryOperand(SelectionDAG &DAG, SDNode *N, SmallVectorImpl<SDNode*> &NewNodes) const unfoldMemoryOperand() argument
5728 getOpcodeAfterMemoryUnfold(unsigned Opc, bool UnfoldLoad, bool UnfoldStore, unsigned *LoadRegIndex) const getOpcodeAfterMemoryUnfold() argument
5746 areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1, int64_t &Offset2) const areLoadsFromSameBasePtr() argument
5944 shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1, int64_t Offset2, unsigned NumLoads) const shouldScheduleLoadsNear() argument
5993 reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const reverseBranchCondition() argument
6001 isSafeToMoveRegClassDefs(const TargetRegisterClass *RC) const isSafeToMoveRegClassDefs() argument
6015 getGlobalBaseReg(MachineFunction *MF) const getGlobalBaseReg() argument
6589 getExecutionDomainCustom(const MachineInstr &MI) const getExecutionDomainCustom() argument
6687 setExecutionDomainCustom(MachineInstr &MI, unsigned Domain) const setExecutionDomainCustom() argument
6820 getExecutionDomain(const MachineInstr &MI) const getExecutionDomain() argument
6860 setExecutionDomain(MachineInstr &MI, unsigned Domain) const setExecutionDomain() argument
6911 getNoop(MCInst &NopInst) const getNoop() argument
6915 isHighLatencyDef(int opc) const isHighLatencyDef() argument
7225 hasHighOperandLatency(const TargetSchedModel &SchedModel, const MachineRegisterInfo *MRI, const MachineInstr &DefMI, unsigned DefIdx, const MachineInstr &UseMI, unsigned UseIdx) const hasHighOperandLatency() argument
7234 hasReassociableOperands(const MachineInstr &Inst, const MachineBasicBlock *MBB) const hasReassociableOperands() argument
7258 isAssociativeAndCommutative(const MachineInstr &Inst) const isAssociativeAndCommutative() argument
7596 describeLoadedValue(const MachineInstr &MI, Register Reg) const describeLoadedValue() argument
7735 setSpecialOperandAttr(MachineInstr &OldMI1, MachineInstr &OldMI2, MachineInstr &NewMI1, MachineInstr &NewMI2) const setSpecialOperandAttr() argument
7767 decomposeMachineOperandsTargetFlags(unsigned TF) const decomposeMachineOperandsTargetFlags() argument
7772 getSerializableDirectMachineOperandTargetFlags() const getSerializableDirectMachineOperandTargetFlags() argument
8060 getOutliningCandidateInfo( std::vector<outliner::Candidate> &RepeatedSequenceLocs) const getOutliningCandidateInfo() argument
8092 isFunctionSafeToOutlineFrom(MachineFunction &MF, bool OutlineFromLinkOnceODRs) const isFunctionSafeToOutlineFrom() argument
8115 getOutliningType(MachineBasicBlock::iterator &MIT, unsigned Flags) const getOutliningType() argument
8174 buildOutlinedFrame(MachineBasicBlock &MBB, MachineFunction &MF, const outliner::OutlinedFunction &OF) const buildOutlinedFrame() argument
8189 insertOutlinedCall(Module &M, MachineBasicBlock &MBB, MachineBasicBlock::iterator &It, MachineFunction &MF, const outliner::Candidate &C) const insertOutlinedCall() argument
[all...] |
| H A D | X86Subtarget.h | 527 getStackAlignment() const getStackAlignment() argument
531 getMaxInlineSizeThreshold() const getMaxInlineSizeThreshold() argument
551 is64Bit() const is64Bit() argument
555 is32Bit() const is32Bit() argument
559 is16Bit() const is16Bit() argument
564 isTarget64BitILP32() const isTarget64BitILP32() argument
570 isTarget64BitLP64() const isTarget64BitLP64() argument
575 getPICStyle() const getPICStyle() argument
578 hasX87() const hasX87() argument
579 hasCmpxchg8b() const hasCmpxchg8b() argument
580 hasNOPL() const hasNOPL() argument
583 hasCMov() const hasCMov() argument
584 hasSSE1() const hasSSE1() argument
585 hasSSE2() const hasSSE2() argument
586 hasSSE3() const hasSSE3() argument
587 hasSSSE3() const hasSSSE3() argument
588 hasSSE41() const hasSSE41() argument
589 hasSSE42() const hasSSE42() argument
590 hasAVX() const hasAVX() argument
591 hasAVX2() const hasAVX2() argument
592 hasAVX512() const hasAVX512() argument
593 hasInt256() const hasInt256() argument
594 hasSSE4A() const hasSSE4A() argument
595 hasMMX() const hasMMX() argument
596 has3DNow() const has3DNow() argument
597 has3DNowA() const has3DNowA() argument
598 hasPOPCNT() const hasPOPCNT() argument
599 hasAES() const hasAES() argument
600 hasVAES() const hasVAES() argument
601 hasFXSR() const hasFXSR() argument
602 hasXSAVE() const hasXSAVE() argument
603 hasXSAVEOPT() const hasXSAVEOPT() argument
604 hasXSAVEC() const hasXSAVEC() argument
605 hasXSAVES() const hasXSAVES() argument
606 hasPCLMUL() const hasPCLMUL() argument
607 hasVPCLMULQDQ() const hasVPCLMULQDQ() argument
608 hasGFNI() const hasGFNI() argument
611 hasFMA() const hasFMA() argument
612 hasFMA4() const hasFMA4() argument
613 hasAnyFMA() const hasAnyFMA() argument
614 hasXOP() const hasXOP() argument
615 hasTBM() const hasTBM() argument
616 hasLWP() const hasLWP() argument
617 hasMOVBE() const hasMOVBE() argument
618 hasRDRAND() const hasRDRAND() argument
619 hasF16C() const hasF16C() argument
620 hasFSGSBase() const hasFSGSBase() argument
621 hasLZCNT() const hasLZCNT() argument
622 hasBMI() const hasBMI() argument
623 hasBMI2() const hasBMI2() argument
624 hasVBMI() const hasVBMI() argument
625 hasVBMI2() const hasVBMI2() argument
626 hasIFMA() const hasIFMA() argument
627 hasRTM() const hasRTM() argument
628 hasADX() const hasADX() argument
629 hasSHA() const hasSHA() argument
630 hasPRFCHW() const hasPRFCHW() argument
631 hasPREFETCHWT1() const hasPREFETCHWT1() argument
632 hasSSEPrefetch() const hasSSEPrefetch() argument
638 hasRDSEED() const hasRDSEED() argument
639 hasLAHFSAHF() const hasLAHFSAHF() argument
640 hasMWAITX() const hasMWAITX() argument
641 hasCLZERO() const hasCLZERO() argument
642 hasCLDEMOTE() const hasCLDEMOTE() argument
643 hasMOVDIRI() const hasMOVDIRI() argument
644 hasMOVDIR64B() const hasMOVDIR64B() argument
645 hasPTWRITE() const hasPTWRITE() argument
646 isSHLDSlow() const isSHLDSlow() argument
647 isPMULLDSlow() const isPMULLDSlow() argument
648 isPMADDWDSlow() const isPMADDWDSlow() argument
649 isUnalignedMem16Slow() const isUnalignedMem16Slow() argument
650 isUnalignedMem32Slow() const isUnalignedMem32Slow() argument
651 getGatherOverhead() const getGatherOverhead() argument
652 getScatterOverhead() const getScatterOverhead() argument
653 hasSSEUnalignedMem() const hasSSEUnalignedMem() argument
654 hasCmpxchg16b() const hasCmpxchg16b() argument
655 useLeaForSP() const useLeaForSP() argument
656 hasPOPCNTFalseDeps() const hasPOPCNTFalseDeps() argument
657 hasLZCNTFalseDeps() const hasLZCNTFalseDeps() argument
658 hasFastVariableShuffle() const hasFastVariableShuffle() argument
661 insertVZEROUPPER() const insertVZEROUPPER() argument
662 hasFastGather() const hasFastGather() argument
663 hasFastScalarFSQRT() const hasFastScalarFSQRT() argument
664 hasFastVectorFSQRT() const hasFastVectorFSQRT() argument
665 hasFastLZCNT() const hasFastLZCNT() argument
666 hasFastSHLDRotate() const hasFastSHLDRotate() argument
667 hasFastBEXTR() const hasFastBEXTR() argument
668 hasFastHorizontalOps() const hasFastHorizontalOps() argument
669 hasFastScalarShiftMasks() const hasFastScalarShiftMasks() argument
670 hasFastVectorShiftMasks() const hasFastVectorShiftMasks() argument
671 hasMacroFusion() const hasMacroFusion() argument
672 hasBranchFusion() const hasBranchFusion() argument
673 hasERMSB() const hasERMSB() argument
674 hasSlowDivide32() const hasSlowDivide32() argument
675 hasSlowDivide64() const hasSlowDivide64() argument
676 padShortFunctions() const padShortFunctions() argument
677 slowTwoMemOps() const slowTwoMemOps() argument
678 LEAusesAG() const LEAusesAG() argument
679 slowLEA() const slowLEA() argument
680 slow3OpsLEA() const slow3OpsLEA() argument
681 slowIncDec() const slowIncDec() argument
682 hasCDI() const hasCDI() argument
683 hasVPOPCNTDQ() const hasVPOPCNTDQ() argument
684 hasPFI() const hasPFI() argument
685 hasERI() const hasERI() argument
686 hasDQI() const hasDQI() argument
687 hasBWI() const hasBWI() argument
688 hasVLX() const hasVLX() argument
689 hasPKU() const hasPKU() argument
690 hasVNNI() const hasVNNI() argument
691 hasBF16() const hasBF16() argument
692 hasVP2INTERSECT() const hasVP2INTERSECT() argument
693 hasBITALG() const hasBITALG() argument
694 hasSHSTK() const hasSHSTK() argument
695 hasCLFLUSHOPT() const hasCLFLUSHOPT() argument
696 hasCLWB() const hasCLWB() argument
697 hasWBNOINVD() const hasWBNOINVD() argument
698 hasRDPID() const hasRDPID() argument
699 hasWAITPKG() const hasWAITPKG() argument
700 hasPCONFIG() const hasPCONFIG() argument
701 hasSGX() const hasSGX() argument
702 threewayBranchProfitable() const threewayBranchProfitable() argument
703 hasINVPCID() const hasINVPCID() argument
704 hasENQCMD() const hasENQCMD() argument
705 useRetpolineIndirectCalls() const useRetpolineIndirectCalls() argument
706 useRetpolineIndirectBranches() const useRetpolineIndirectBranches() argument
709 useRetpolineExternalThunk() const useRetpolineExternalThunk() argument
710 preferMaskRegisters() const preferMaskRegisters() argument
711 useGLMDivSqrtCosts() const useGLMDivSqrtCosts() argument
713 getPreferVectorWidth() const getPreferVectorWidth() argument
714 getRequiredVectorWidth() const getRequiredVectorWidth() argument
720 canExtendTo512DQ() const canExtendTo512DQ() argument
723 canExtendTo512BW() const canExtendTo512BW() argument
729 useAVX512Regs() const useAVX512Regs() argument
733 useBWIRegs() const useBWIRegs() argument
739 getProcFamily() const getProcFamily() argument
742 isAtom() const isAtom() argument
743 isSLM() const isSLM() argument
744 useSoftFloat() const useSoftFloat() argument
750 hasMFence() const hasMFence() argument
752 getTargetTriple() const getTargetTriple() argument
754 isTargetDarwin() const isTargetDarwin() argument
755 isTargetFreeBSD() const isTargetFreeBSD() argument
756 isTargetDragonFly() const isTargetDragonFly() argument
757 isTargetSolaris() const isTargetSolaris() argument
758 isTargetPS4() const isTargetPS4() argument
760 isTargetELF() const isTargetELF() argument
761 isTargetCOFF() const isTargetCOFF() argument
762 isTargetMachO() const isTargetMachO() argument
764 isTargetLinux() const isTargetLinux() argument
765 isTargetKFreeBSD() const isTargetKFreeBSD() argument
766 isTargetGlibc() const isTargetGlibc() argument
767 isTargetAndroid() const isTargetAndroid() argument
768 isTargetNaCl() const isTargetNaCl() argument
769 isTargetNaCl32() const isTargetNaCl32() argument
770 isTargetNaCl64() const isTargetNaCl64() argument
771 isTargetMCU() const isTargetMCU() argument
772 isTargetFuchsia() const isTargetFuchsia() argument
774 isTargetWindowsMSVC() const isTargetWindowsMSVC() argument
778 isTargetWindowsCoreCLR() const isTargetWindowsCoreCLR() argument
782 isTargetWindowsCygwin() const isTargetWindowsCygwin() argument
786 isTargetWindowsGNU() const isTargetWindowsGNU() argument
790 isTargetWindowsItanium() const isTargetWindowsItanium() argument
794 isTargetCygMing() const isTargetCygMing() argument
796 isOSWindows() const isOSWindows() argument
798 isTargetWin64() const isTargetWin64() argument
800 isTargetWin32() const isTargetWin32() argument
802 isPICStyleGOT() const isPICStyleGOT() argument
803 isPICStyleRIPRel() const isPICStyleRIPRel() argument
805 isPICStyleStubPIC() const isPICStyleStubPIC() argument
809 isPositionIndependent() const isPositionIndependent() argument
811 isCallingConvWin64(CallingConv::ID CC) const isCallingConvWin64() argument
[all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/IPO/ |
| H A D | Attributor.cpp | 190 Argument *IRPosition::getAssociatedArgument() const { in getAssociatedArgument() argument
536 hasAttr(ArrayRef<Attribute::AttrKind> AKs, bool IgnoreSubsumingPositions) const hasAttr() argument
551 getAttrs(ArrayRef<Attribute::AttrKind> AKs, SmallVectorImpl<Attribute> &Attrs, bool IgnoreSubsumingPositions) const getAttrs() argument
1117 getAsStr() const getAsStr() argument
1124 getAssumedUniqueReturnValue(Attributor &A) const getAssumedUniqueReturnValue() argument
1155 checkForAllReturnedValuesAndReturnInsts( const function_ref<bool(Value &, const SmallSetVector<ReturnInst *, 4> &)> &Pred) const checkForAllReturnedValuesAndReturnInsts() argument
[all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/InstCombine/ |
| H A D | InstructionCombining.cpp | 202 bool InstCombiner::shouldChangeType(Type *From, Type *To) const { in shouldChangeType() argument
828 Value *InstCombiner::dyn_castNegVal(Value *V) const { in dyn_castNegVal() argument
174 shouldChangeType(unsigned FromWidth, unsigned ToWidth) const shouldChangeType() argument
3665 getAnalysisUsage(AnalysisUsage &AU) const getAnalysisUsage() argument
[all...] |
| /third_party/skia/third_party/externals/tint/src/writer/spirv/ |
| H A D | builder.cc | 328 total_size() const total_size() argument
348 iterate(std::function<void(const Instruction&)> cb) const iterate() argument
4214 ConvertStorageClass(ast::StorageClass klass) const ConvertStorageClass() argument
[all...] |
| /third_party/skia/third_party/externals/dng_sdk/source/ |
| H A D | dng_image_writer.cpp | 241 void tag_string::Put (dng_stream &stream) const in Put() argument
279 void tag_encoded_text::Put (dng_stream &stream) const in Put() argument
313 Put(dng_stream &stream) const Put() argument
460 Put(dng_stream &stream) const Put() argument
517 Put(dng_stream &stream) const Put() argument
610 Size() const Size() argument
637 Put(dng_stream &stream, OffsetsBase offsetsBase, uint32 explicitBase) const Put() argument
3299 SearchTable(int32 w, int32 k) const SearchTable() argument
[all...] |
| /third_party/protobuf/src/google/protobuf/ |
| H A D | descriptor.pb.cc | 1418 SetCachedSize(int size) const SetCachedSize() argument
1479 _InternalSerialize( ::PROTOBUF_NAMESPACE_ID::uint8* target, ::PROTOBUF_NAMESPACE_ID::io::EpsCopyOutputStream* stream) const _InternalSerialize() argument
1501 ByteSizeLong() const ByteSizeLong() argument
1564 IsInitialized() const IsInitialized() argument
1575 GetMetadata() const GetMetadata() argument
1701 SetCachedSize(int size) const SetCachedSize() argument
1920 _InternalSerialize( ::PROTOBUF_NAMESPACE_ID::uint8* target, ::PROTOBUF_NAMESPACE_ID::io::EpsCopyOutputStream* stream) const _InternalSerialize() argument
2035 ByteSizeLong() const ByteSizeLong() argument
2207 IsInitialized() const IsInitialized() argument
2240 GetMetadata() const GetMetadata() argument
2315 SetCachedSize(int size) const SetCachedSize() argument
2399 _InternalSerialize( ::PROTOBUF_NAMESPACE_ID::uint8* target, ::PROTOBUF_NAMESPACE_ID::io::EpsCopyOutputStream* stream) const _InternalSerialize() argument
2434 ByteSizeLong() const ByteSizeLong() argument
2526 IsInitialized() const IsInitialized() argument
2545 GetMetadata() const GetMetadata() argument
2603 SetCachedSize(int size) const SetCachedSize() argument
2676 _InternalSerialize( ::PROTOBUF_NAMESPACE_ID::uint8* target, ::PROTOBUF_NAMESPACE_ID::io::EpsCopyOutputStream* stream) const _InternalSerialize() argument
2703 ByteSizeLong() const ByteSizeLong() argument
2785 IsInitialized() const IsInitialized() argument
2801 GetMetadata() const GetMetadata() argument
2891 SetCachedSize(int size) const SetCachedSize() argument
3078 _InternalSerialize( ::PROTOBUF_NAMESPACE_ID::uint8* target, ::PROTOBUF_NAMESPACE_ID::io::EpsCopyOutputStream* stream) const _InternalSerialize() argument
3177 ByteSizeLong() const ByteSizeLong() argument
3323 IsInitialized() const IsInitialized() argument
3352 GetMetadata() const GetMetadata() argument
3401 SetCachedSize(int size) const SetCachedSize() argument
3469 _InternalSerialize( ::PROTOBUF_NAMESPACE_ID::uint8* target, ::PROTOBUF_NAMESPACE_ID::io::EpsCopyOutputStream* stream) const _InternalSerialize() argument
3495 ByteSizeLong() const ByteSizeLong() argument
3561 IsInitialized() const IsInitialized() argument
3577 GetMetadata() const GetMetadata() argument
3713 SetCachedSize(int size) const SetCachedSize() argument
3906 _InternalSerialize( ::PROTOBUF_NAMESPACE_ID::uint8* target, ::PROTOBUF_NAMESPACE_ID::io::EpsCopyOutputStream* stream) const _InternalSerialize() argument
4011 ByteSizeLong() const ByteSizeLong() argument
4184 IsInitialized() const IsInitialized() argument
4210 GetMetadata() const GetMetadata() argument
4284 SetCachedSize(int size) const SetCachedSize() argument
4363 _InternalSerialize( ::PROTOBUF_NAMESPACE_ID::uint8* target, ::PROTOBUF_NAMESPACE_ID::io::EpsCopyOutputStream* stream) const _InternalSerialize() argument
4396 ByteSizeLong() const ByteSizeLong() argument
4477 IsInitialized() const IsInitialized() argument
4492 GetMetadata() const GetMetadata() argument
4550 SetCachedSize(int size) const SetCachedSize() argument
4623 _InternalSerialize( ::PROTOBUF_NAMESPACE_ID::uint8* target, ::PROTOBUF_NAMESPACE_ID::io::EpsCopyOutputStream* stream) const _InternalSerialize() argument
4650 ByteSizeLong() const ByteSizeLong() argument
4732 IsInitialized() const IsInitialized() argument
4748 GetMetadata() const GetMetadata() argument
4828 SetCachedSize(int size) const SetCachedSize() argument
4950 _InternalSerialize( ::PROTOBUF_NAMESPACE_ID::uint8* target, ::PROTOBUF_NAMESPACE_ID::io::EpsCopyOutputStream* stream) const _InternalSerialize() argument
5009 ByteSizeLong() const ByteSizeLong() argument
5115 IsInitialized() const IsInitialized() argument
5134 GetMetadata() const GetMetadata() argument
5214 SetCachedSize(int size) const SetCachedSize() argument
5302 _InternalSerialize( ::PROTOBUF_NAMESPACE_ID::uint8* target, ::PROTOBUF_NAMESPACE_ID::io::EpsCopyOutputStream* stream) const _InternalSerialize() argument
5341 ByteSizeLong() const ByteSizeLong() argument
5433 IsInitialized() const IsInitialized() argument
5453 GetMetadata() const GetMetadata() argument
5529 SetCachedSize(int size) const SetCachedSize() argument
5621 _InternalSerialize( ::PROTOBUF_NAMESPACE_ID::uint8* target, ::PROTOBUF_NAMESPACE_ID::io::EpsCopyOutputStream* stream) const _InternalSerialize() argument
5662 ByteSizeLong() const ByteSizeLong() argument
5751 IsInitialized() const IsInitialized() argument
5768 GetMetadata() const GetMetadata() argument
5873 SetCachedSize(int size) const SetCachedSize() argument
5999 _InternalSerialize( ::PROTOBUF_NAMESPACE_ID::uint8* target, ::PROTOBUF_NAMESPACE_ID::io::EpsCopyOutputStream* stream) const _InternalSerialize() argument
6064 ByteSizeLong() const ByteSizeLong() argument
6182 IsInitialized() const IsInitialized() argument
6204 GetMetadata() const GetMetadata() argument
6393 SetCachedSize(int size) const SetCachedSize() argument
6705 _InternalSerialize( ::PROTOBUF_NAMESPACE_ID::uint8* target, ::PROTOBUF_NAMESPACE_ID::io::EpsCopyOutputStream* stream) const _InternalSerialize() argument
6893 ByteSizeLong() const ByteSizeLong() argument
7156 IsInitialized() const IsInitialized() argument
7191 GetMetadata() const GetMetadata() argument
7260 SetCachedSize(int size) const SetCachedSize() argument
7366 _InternalSerialize( ::PROTOBUF_NAMESPACE_ID::uint8* target, ::PROTOBUF_NAMESPACE_ID::io::EpsCopyOutputStream* stream) const _InternalSerialize() argument
7417 ByteSizeLong() const ByteSizeLong() argument
7522 IsInitialized() const IsInitialized() argument
7545 GetMetadata() const GetMetadata() argument
7620 SetCachedSize(int size) const SetCachedSize() argument
7753 _InternalSerialize( ::PROTOBUF_NAMESPACE_ID::uint8* target, ::PROTOBUF_NAMESPACE_ID::io::EpsCopyOutputStream* stream) const _InternalSerialize() argument
7818 ByteSizeLong() const ByteSizeLong() argument
7941 IsInitialized() const IsInitialized() argument
7964 GetMetadata() const GetMetadata() argument
8013 SetCachedSize(int size) const SetCachedSize() argument
8081 _InternalSerialize( ::PROTOBUF_NAMESPACE_ID::uint8* target, ::PROTOBUF_NAMESPACE_ID::io::EpsCopyOutputStream* stream) const _InternalSerialize() argument
8107 ByteSizeLong() const ByteSizeLong() argument
8173 IsInitialized() const IsInitialized() argument
8189 GetMetadata() const GetMetadata() argument
8252 SetCachedSize(int size) const SetCachedSize() argument
8342 _InternalSerialize( ::PROTOBUF_NAMESPACE_ID::uint8* target, ::PROTOBUF_NAMESPACE_ID::io::EpsCopyOutputStream* stream) const _InternalSerialize() argument
8381 ByteSizeLong() const ByteSizeLong() argument
8470 IsInitialized() const IsInitialized() argument
8493 GetMetadata() const GetMetadata() argument
8549 SetCachedSize(int size) const SetCachedSize() argument
8629 _InternalSerialize( ::PROTOBUF_NAMESPACE_ID::uint8* target, ::PROTOBUF_NAMESPACE_ID::io::EpsCopyOutputStream* stream) const _InternalSerialize() argument
8662 ByteSizeLong() const ByteSizeLong() argument
8737 IsInitialized() const IsInitialized() argument
8755 GetMetadata() const GetMetadata() argument
8811 SetCachedSize(int size) const SetCachedSize() argument
8891 _InternalSerialize( ::PROTOBUF_NAMESPACE_ID::uint8* target, ::PROTOBUF_NAMESPACE_ID::io::EpsCopyOutputStream* stream) const _InternalSerialize() argument
8924 ByteSizeLong() const ByteSizeLong() argument
8999 IsInitialized() const IsInitialized() argument
9017 GetMetadata() const GetMetadata() argument
9080 SetCachedSize(int size) const SetCachedSize() argument
9177 _InternalSerialize( ::PROTOBUF_NAMESPACE_ID::uint8* target, ::PROTOBUF_NAMESPACE_ID::io::EpsCopyOutputStream* stream) const _InternalSerialize() argument
9217 ByteSizeLong() const ByteSizeLong() argument
9307 IsInitialized() const IsInitialized() argument
9330 GetMetadata() const GetMetadata() argument
9395 SetCachedSize(int size) const SetCachedSize() argument
9470 _InternalSerialize( ::PROTOBUF_NAMESPACE_ID::uint8* target, ::PROTOBUF_NAMESPACE_ID::io::EpsCopyOutputStream* stream) const _InternalSerialize() argument
9501 RequiredFieldsByteSizeFallback() const RequiredFieldsByteSizeFallback() argument
9519 ByteSizeLong() const ByteSizeLong() argument
9596 IsInitialized() const IsInitialized() argument
9609 GetMetadata() const GetMetadata() argument
9703 SetCachedSize(int size) const SetCachedSize() argument
9838 _InternalSerialize( ::PROTOBUF_NAMESPACE_ID::uint8* target, ::PROTOBUF_NAMESPACE_ID::io::EpsCopyOutputStream* stream) const _InternalSerialize() argument
9905 ByteSizeLong() const ByteSizeLong() argument
10033 IsInitialized() const IsInitialized() argument
10054 GetMetadata() const GetMetadata() argument
10127 SetCachedSize(int size) const SetCachedSize() argument
10248 _InternalSerialize( ::PROTOBUF_NAMESPACE_ID::uint8* target, ::PROTOBUF_NAMESPACE_ID::io::EpsCopyOutputStream* stream) const _InternalSerialize() argument
10311 ByteSizeLong() const ByteSizeLong() argument
10433 IsInitialized() const IsInitialized() argument
10448 GetMetadata() const GetMetadata() argument
10495 SetCachedSize(int size) const SetCachedSize() argument
10556 _InternalSerialize( ::PROTOBUF_NAMESPACE_ID::uint8* target, ::PROTOBUF_NAMESPACE_ID::io::EpsCopyOutputStream* stream) const _InternalSerialize() argument
10578 ByteSizeLong() const ByteSizeLong() argument
10641 IsInitialized() const IsInitialized() argument
10651 GetMetadata() const GetMetadata() argument
10722 SetCachedSize(int size) const SetCachedSize() argument
10820 _InternalSerialize( ::PROTOBUF_NAMESPACE_ID::uint8* target, ::PROTOBUF_NAMESPACE_ID::io::EpsCopyOutputStream* stream) const _InternalSerialize() argument
10866 ByteSizeLong() const ByteSizeLong() argument
10974 IsInitialized() const IsInitialized() argument
10992 GetMetadata() const GetMetadata() argument
11039 SetCachedSize(int size) const SetCachedSize() argument
11100 _InternalSerialize( ::PROTOBUF_NAMESPACE_ID::uint8* target, ::PROTOBUF_NAMESPACE_ID::io::EpsCopyOutputStream* stream) const _InternalSerialize() argument
11122 ByteSizeLong() const ByteSizeLong() argument
11185 IsInitialized() const IsInitialized() argument
11195 GetMetadata() const GetMetadata() argument
[all...] |
| /third_party/python/Objects/ |
| H A D | dictobject.c | 3793 dict_vectorcall(PyObject *type, PyObject * const*args, size_t nargsf, PyObject *kwnames) dict_vectorcall() argument
[all...] |
| /third_party/vk-gl-cts/modules/gles3/functional/ |
| H A D | es3fShaderOperatorTests.cpp | 445 getValue(const glw::Functions& gl, ShaderType shaderType) const getValue() argument
469 getValueMask(const glw::Functions& gl, ShaderType shaderType) const getValueMask() argument
[all...] |
| H A D | es3fUniformApiTests.cpp | 1172 generateBasicUniforms(vector<BasicUniform>& basicUniformsDst, vector<BasicUniformReportRef>& basicUniformReportsDst, const glu::VarType& varType, const char* const varName, const bool isParentActive, int& samplerUnitCounter, Random& rnd) const generateBasicUniforms() argument
1238 writeUniformDefinitions(std::ostringstream& dst) const writeUniformDefinitions() argument
1308 writeUniformCompareExpr(std::ostringstream& dst, const BasicUniform& uniform) const writeUniformCompareExpr() argument
1318 writeUniformComparisons(std::ostringstream& dst, const vector<BasicUniform>& basicUniforms, const char* const variableName) const writeUniformComparisons() argument
1335 generateVertexSource(const vector<BasicUniform>& basicUniforms) const generateVertexSource() argument
1362 generateFragmentSource(const vector<BasicUniform>& basicUniforms) const generateFragmentSource() argument
[all...] |
| /third_party/vk-gl-cts/modules/gles31/functional/ |
| H A D | es31fSSBOLayoutCase.cpp | 217 getVariableIndex(const string& name) const getVariableIndex() argument
227 getBlockIndex(const string& name) const getBlockIndex() argument
271 findStruct(const char* name) const findStruct() argument
277 getNamedStructs(std::vector<const StructType*>& structs) const getNamedStructs() argument
2287 compareStdBlocks(const BufferLayout& refLayout, const BufferLayout& cmpLayout) const compareStdBlocks() argument
2363 compareSharedBlocks(const BufferLayout& refLayout, const BufferLayout& cmpLayout) const compareSharedBlocks() argument
2433 compareTypes(const BufferLayout& refLayout, const BufferLayout& cmpLayout) const compareTypes() argument
2501 checkLayoutIndices(const BufferLayout& layout) const checkLayoutIndices() argument
2538 checkLayoutBounds(const BufferLayout& layout) const checkLayoutBounds() argument
2586 checkIndexQueries(deUint32 program, const BufferLayout& layout) const checkIndexQueries() argument
[all...] |
| H A D | es31fShaderImageLoadStoreTests.cpp | 542 getPtr(void) const getPtr() argument
543 operator *(void) const operator *() argument
610 getImageType(void) const getImageType() argument
611 getSize(void) const getSize() argument
612 getFormat(void) const getFormat() argument
621 getPixelUint(int x, int y, int z) const getPixelUint() argument
627 getAccess(void) const getAccess() argument
628 getSliceAccess(int slice) const getSliceAccess() argument
629 getCubeFaceAccess(tcu::CubeFace face) const getCubeFaceAccess() argument
682 setPixel(int x, int y, int z, const ColorT& color) const setPixel() argument
694 getPixel(int x, int y, int z) const getPixel() argument
700 getPixelInt(int x, int y, int z) const getPixelInt() argument
706 getAccessInternal(void) const getAccessInternal() argument
717 getSliceAccessInternal(int slice) const getSliceAccessInternal() argument
723 getCubeFaceAccessInternal(tcu::CubeFace face) const getCubeFaceAccessInternal() argument
1116 operator ()(TestLog& log, const tcu::ConstPixelBufferAccess& resultSlice, int sliceOrFaceNdx) const operator ()() argument
1735 operator ()(TestLog& log, const ConstPixelBufferAccess& resultSlice, int sliceOrFaceNdx) const operator ()() argument
1842 operator ()(TestLog& log, const ConstPixelBufferAccess& resultSlice, int sliceOrFaceNdx) const operator ()() argument
1882 checkPixel(TestLog& log, const ConstPixelBufferAccess& resultSlice, int x, int y, int sliceOrFaceNdx, const IVec2 &dispatchSizeXY) const checkPixel() argument
1927 verifyOperationAccumulationIntermediateValues(AtomicOperation operation, T init, const std::vector<T> (&args), const std::vector<T> (&returnValues)) const verifyOperationAccumulationIntermediateValues() argument
1939 verifyRecursive(AtomicOperation operation, int index, T valueSoFar, std::vector<bool> (&argsUsed), const std::vector<T> (&args), const std::vector<T> (&returnValues)) const verifyRecursive() argument
2232 operator ()(TestLog& log, const ConstPixelBufferAccess& resultSlice, int sliceOrFaceNdx) const operator ()() argument
2292 operator ()(TestLog& log, const ConstPixelBufferAccess& resultSlice, int sliceOrFaceNdx) const operator ()() argument
2794 operator ()(TestLog& log, const ConstPixelBufferAccess& resultSlice, int) const operator ()() argument
[all...] |
| /third_party/vk-gl-cts/modules/glshared/ |
| H A D | glsDrawTest.cpp | 400 getValue(void) const getValue() argument
402 operator +(const WrappedType<Type>& other) const operator +() argument
403 operator *(const WrappedType<Type>& other) const operator *() argument
404 operator /(const WrappedType<Type>& other) const operator /() argument
405 operator -(const WrappedType<Type>& other) const operator -() argument
412 operator ==(const WrappedType<Type>& other) const operator ==() argument
413 operator !=(const WrappedType<Type>& other) const operator !=() argument
414 operator <(const WrappedType<Type>& other) const operator <() argument
415 operator >(const WrappedType<Type>& other) const operator >() argument
416 operator <=(const WrappedType<Type>& other) const operator <=() argument
417 operator >=(const WrappedType<Type>& other) const operator >=() argument
419 operator Type(void) const operator Type() argument
421 to(void) const to() argument
442 getValue(void) const getValue() argument
444 operator +(const Int& other) const operator +() argument
445 operator *(const Int& other) const operator *() argument
446 operator /(const Int& other) const operator /() argument
447 operator -(const Int& other) const operator -() argument
454 operator ==(const Int& other) const operator ==() argument
455 operator !=(const Int& other) const operator !=() argument
456 operator <(const Int& other) const operator <() argument
457 operator >(const Int& other) const operator >() argument
458 operator <=(const Int& other) const operator <=() argument
459 operator >=(const Int& other) const operator >=() argument
461 operator deInt32(void) const operator deInt32() argument
463 to(void) const to() argument
472 getValue(void) const getValue() argument
474 operator +(const Half& other) const operator +() argument
475 operator *(const Half& other) const operator *() argument
476 operator /(const Half& other) const operator /() argument
477 operator -(const Half& other) const operator -() argument
484 operator ==(const Half& other) const operator ==() argument
485 operator !=(const Half& other) const operator !=() argument
486 operator <(const Half& other) const operator <() argument
487 operator >(const Half& other) const operator >() argument
488 operator <=(const Half& other) const operator <=() argument
489 operator >=(const Half& other) const operator >=() argument
492 to(void) const to() argument
504 getValue(void) const getValue() argument
506 operator +(const Fixed& other) const operator +() argument
507 operator *(const Fixed& other) const operator *() argument
508 operator /(const Fixed& other) const operator /() argument
509 operator -(const Fixed& other) const operator -() argument
516 operator ==(const Fixed& other) const operator ==() argument
517 operator !=(const Fixed& other) const operator !=() argument
518 operator <(const Fixed& other) const operator <() argument
519 operator >(const Fixed& other) const operator >() argument
520 operator <=(const Fixed& other) const operator <=() argument
521 operator >=(const Fixed& other) const operator >=() argument
523 operator deInt32(void) const operator deInt32() argument
525 to(void) const to() argument
578 toFloat(void) const toFloat() argument
921 getComponentCount(void) const getComponentCount() argument
922 getTarget(void) const getTarget() argument
923 getInputType(void) const getInputType() argument
924 getOutputType(void) const getOutputType() argument
925 getStorageType(void) const getStorageType() argument
926 getNormalized(void) const getNormalized() argument
927 getStride(void) const getStride() argument
928 isBound(void) const isBound() argument
929 isPositionAttribute(void) const isPositionAttribute() argument
1219 shadeVertices(const rr::VertexAttrib* inputs, rr::VertexPacket* const* packets, const int numPackets) const shadeVertices() argument
1262 shadeFragments(rr::FragmentPacket* packets, const int numPackets, const rr::FragmentShadingContext& context) const shadeFragments() argument
1784 getSurface(void) const getSurface() argument
2118 hash(void) const hash() argument
2130 valid(glu::ApiType ctxType) const valid() argument
2221 isBufferAligned(void) const isBufferAligned() argument
2239 isBufferStrideAligned(void) const isBufferStrideAligned() argument
2435 getName(void) const getName() argument
2540 getDesc(void) const getDesc() argument
2677 getMultilineDesc(void) const getMultilineDesc() argument
2862 hash(void) const hash() argument
2884 valid(void) const valid() argument
2961 isCompatibilityTest(void) const isCompatibilityTest() argument
3787 getCoordScale(const DrawTestSpec& spec) const getCoordScale() argument
3832 getColorScale(const DrawTestSpec& spec) const getColorScale() argument
[all...] |
| /third_party/vk-gl-cts/external/vulkancts/modules_no_buildgn/vulkan/multiview/ |
| H A D | vktMultiViewRenderTests.cpp | 240 getImageView(void) const getImageView() argument
244 getImage(void) const getImage() argument
1329 getQuarterRefColor(const deUint32 quarterNdx, const int colorNdx, const int layerNdx, const bool background, const deUint32 subpassNdx) const getQuarterRefColor() argument
1410 setPoint(const tcu::PixelBufferAccess& pixelBuffer, const tcu::Vec4& pointColor, const int pointSize, const int layerNdx, const deUint32 quarter) const setPoint() argument
1423 fillTriangle(const tcu::PixelBufferAccess& pixelBuffer, const tcu::Vec4& color, const int layerNdx, const deUint32 quarter) const fillTriangle() argument
1440 fillLayer(const tcu::PixelBufferAccess& pixelBuffer, const tcu::Vec4& color, const int layerNdx) const fillLayer() argument
1447 fillQuarter(const tcu::PixelBufferAccess& pixelBuffer, const tcu::Vec4& color, const int layerNdx, const deUint32 quarter, const deUint32 subpassNdx) const fillQuarter() argument
1511 imageData(void) const imageData() argument
3508 imageData(void) const imageData() argument
3840 getDepthRanges(void) const getDepthRanges() argument
4038 createInstance(vkt::Context& context) const createInstance() argument
4091 checkSupport(Context& context) const checkSupport() argument
4127 initPrograms(SourceCollections& programCollection) const initPrograms() argument
[all...] |