| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| H A D | LiveStacks.cpp | 57 LiveStacks::getOrCreateInterval(int Slot, const TargetRegisterClass *RC) { in getOrCreateInterval() argument 82 const TargetRegisterClass *RC = getIntervalRegClass(Slot); in print() local
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| H A D | AggressiveAntiDepBreaker.h | 48 const TargetRegisterClass *RC; member
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| H A D | MIRVRegNamerUtils.cpp | 153 const TargetRegisterClass *RC = MRI.getRegClassOrNull(VReg); in createVirtualRegisterWithLowerName() local
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| H A D | RegisterClassInfo.cpp | 170 const TargetRegisterClass *RC = nullptr; computePSetLimit() local [all...] |
| H A D | SwiftErrorValueTracking.cpp | 36 const TargetRegisterClass *RC = TLI->getRegClassFor(TLI->getPointerTy(DL)); in getOrCreateVReg() local 58 const TargetRegisterClass *RC = TLI->getRegClassFor(TLI->getPointerTy(DL)); in getOrCreateVRegDefAt() local 126 auto const *RC = TLI->getRegClassFor(TLI->getPointerTy(DL)); in createEntriesInEntryBlock() local 241 auto const *RC = TLI->getRegClassFor(TLI->getPointerTy(DL)); in propagateVRegs() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyReplacePhysRegs.cpp | 86 const TargetRegisterClass *RC = TRI.getMinimalPhysRegClass(PReg); in runOnMachineFunction() local
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| H A D | WebAssemblyRegColoring.cpp | 140 const TargetRegisterClass *RC = MRI->getRegClass(Old); in runOnMachineFunction() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/ |
| H A D | XCoreMachineFunctionInfo.cpp | 38 const TargetRegisterClass &RC = XCore::GRRegsRegClass; in createLRSpillSlot() local 56 const TargetRegisterClass &RC = XCore::GRRegsRegClass; in createFPSpillSlot() local 69 const TargetRegisterClass &RC = XCore::GRRegsRegClass; in createEHSpillSlot() local [all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| H A D | InstructionSelector.cpp | 36 constrainOperandRegToRegClass( MachineInstr &I, unsigned OpIdx, const TargetRegisterClass &RC, const TargetInstrInfo &TII, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI) const constrainOperandRegToRegClass() argument
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| H A D | InstructionSelect.cpp | 200 const TargetRegisterClass *RC = MRI.getRegClassOrNull(VReg); in runOnMachineFunction() local
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| H A D | RegisterBank.cpp | 34 const TargetRegisterClass &RC = *TRI.getRegClass(RCId); in verify() local 104 const TargetRegisterClass &RC = *TRI->getRegClass(RCId); in print() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| H A D | GCNRegPressure.cpp | 88 const auto RC = MRI.getRegClass(Reg); in getRegKind() local
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| H A D | AMDGPUISelLowering.h | 282 CreateLiveInRegister(SelectionDAG &DAG, const TargetRegisterClass *RC, unsigned Reg, EVT VT) const CreateLiveInRegister() argument 289 CreateLiveInRegisterRaw(SelectionDAG &DAG, const TargetRegisterClass *RC, unsigned Reg, EVT VT) const CreateLiveInRegisterRaw() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXRegisterInfo.cpp | 28 std::string getNVPTXRegClassName(TargetRegisterClass const *RC) { in getNVPTXRegClassName() argument 72 getNVPTXRegClassStr(TargetRegisterClass const *RC) getNVPTXRegClassStr() argument [all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| H A D | X86FixupSetCC.cpp | 102 const TargetRegisterClass *RC = MF.getSubtarget<X86Subtarget>().is64Bit() in runOnMachineFunction() local
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| /third_party/lzma/C/ |
| H A D | 7zip_gcc_c.mak | 10 RC=windres.exe
macro
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| /third_party/node/deps/openssl/openssl/crypto/whrlpool/ |
| H A D | wp_block.c | 486 #define RC (&(Cx.q[256*N])) macro
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| /third_party/openssl/crypto/whrlpool/ |
| H A D | wp_block.c | 486 #define RC (&(Cx.q[256*N])) macro
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| H A D | AArch64DeadRegisterDefinitionsPass.cpp | 160 const TargetRegisterClass *RC = TII->getRegClass(Desc, I, TRI, MF); in processMachineBasicBlock() local
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| H A D | AArch64RegisterInfo.cpp | 103 AArch64RegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, in getSubClassWithSubReg() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| H A D | Thumb1InstrInfo.cpp | 78 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned SrcReg, bool isKill, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const storeRegToStackSlot() argument 106 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const loadRegFromStackSlot() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| H A D | AVRAsmPrinter.cpp | 111 const TargetRegisterClass *RC = TRI.getMinimalPhysRegClass(Reg); in PrintAsmOperand() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| H A D | BitTracker.cpp | 115 raw_ostream &operator<<(raw_ostream &OS, const BT::RegisterCell &RC) { in operator <<() argument 165 OS << "]:" << RC[Start]; in operator <<() local 201 bool BT::RegisterCell::meet(const RegisterCell &RC, unsigne argument 214 insert(const BT::RegisterCell &RC, const BitMask &M) insert() argument [all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| H A D | MipsMachineFunction.cpp | 72 const TargetRegisterClass *RC; in initGlobalBaseReg() local 153 const TargetRegisterClass &RC = in createEhDataRegsFI() local 168 const TargetRegisterClass &RC = Mips::GPR32RegClass; in createISRRegFI() local 192 getMoveF64ViaSpillFI(const TargetRegisterClass *RC) getMoveF64ViaSpillFI() argument [all...] |
| /third_party/lzma/CPP/7zip/ |
| H A D | 7zip_gcc.mak | 16 RC=windres.exe --target=pe-x86-64
macro 17 RC=windres.exe -F pe-i386
macro 18 RC=windres.exe
macro
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