| /third_party/vixl/src/aarch64/ |
| H A D | macro-assembler-sve-aarch64.cc | 1111 void MacroAssembler::SVELoadBroadcastImmHelper(const ZRegister& zt, in SVELoadBroadcastImmHelper() argument
1120 (this->*fn)(zt, pg, addr); in SVELoadBroadcastImmHelper()
1124 CalculateSVEAddress(scratch, addr, zt); in SVELoadBroadcastImmHelper()
1126 (this->*fn)(zt, pg, SVEMemOperand(scratch)); in SVELoadBroadcastImmHelper()
1159 const ZRegister& zt, in SVELoadStoreNTBroadcastQOHelper()
1176 (this->*fn)(zt, pg, addr); in SVELoadStoreNTBroadcastQOHelper()
1181 addr.IsEquivalentToLSL(zt.GetLaneSizeInBytesLog2())) { in SVELoadStoreNTBroadcastQOHelper()
1183 (this->*fn)(zt, pg, addr); in SVELoadStoreNTBroadcastQOHelper()
1189 (this->*fn)(zt, pg, SVEMemOperand(addr.GetScalarBase())); in SVELoadStoreNTBroadcastQOHelper()
1204 (this->*fn)(zt, p in SVELoadStoreNTBroadcastQOHelper()
1158 SVELoadStoreNTBroadcastQOHelper( const ZRegister& zt, const Tg& pg, const SVEMemOperand& addr, Tf fn, int imm_bits, int shift_amount, SVEOffsetModifier supported_modifier, int vl_divisor_log2) SVELoadStoreNTBroadcastQOHelper() argument
1208 SVELoadStore1Helper(int msize_in_bytes_log2, const ZRegister& zt, const Tg& pg, const SVEMemOperand& addr, Tf fn) SVELoadStore1Helper() argument
1279 SVELoadFFHelper(int msize_in_bytes_log2, const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr, Tf fn) SVELoadFFHelper() argument
1305 Ld1b(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ld1b() argument
1316 Ld1h(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ld1h() argument
1327 Ld1w(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ld1w() argument
1338 Ld1d(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ld1d() argument
1349 Ld1sb(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ld1sb() argument
1360 Ld1sh(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ld1sh() argument
1371 Ld1sw(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ld1sw() argument
1382 St1b(const ZRegister& zt, const PRegister& pg, const SVEMemOperand& addr) St1b() argument
1393 St1h(const ZRegister& zt, const PRegister& pg, const SVEMemOperand& addr) St1h() argument
1404 St1w(const ZRegister& zt, const PRegister& pg, const SVEMemOperand& addr) St1w() argument
1415 St1d(const ZRegister& zt, const PRegister& pg, const SVEMemOperand& addr) St1d() argument
1426 Ldff1b(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ldff1b() argument
1437 Ldff1h(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ldff1h() argument
1448 Ldff1w(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ldff1w() argument
1459 Ldff1d(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ldff1d() argument
1470 Ldff1sb(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ldff1sb() argument
1481 Ldff1sh(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ldff1sh() argument
1492 Ldff1sw(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ldff1sw() argument
1526 Ldnt1b(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ldnt1b() argument
1544 Ldnt1d(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ldnt1d() argument
1562 Ldnt1h(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ldnt1h() argument
1580 Ldnt1w(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ldnt1w() argument
1598 Stnt1b(const ZRegister& zt, const PRegister& pg, const SVEMemOperand& addr) Stnt1b() argument
1615 Stnt1d(const ZRegister& zt, const PRegister& pg, const SVEMemOperand& addr) Stnt1d() argument
1632 Stnt1h(const ZRegister& zt, const PRegister& pg, const SVEMemOperand& addr) Stnt1h() argument
1649 Stnt1w(const ZRegister& zt, const PRegister& pg, const SVEMemOperand& addr) Stnt1w() argument
[all...] |
| H A D | assembler-sve-aarch64.cc | 3820 const ZRegister& zt, in SVELdSt1Helper()
3829 SVEDtype(msize_in_bytes_log2, zt.GetLaneSizeInBytesLog2(), is_signed); in SVELdSt1Helper()
3830 Emit(op | mem_op | dtype | Rt(zt) | PgLow8(pg)); in SVELdSt1Helper()
3848 const ZRegister& zt, in SVELd1Helper()
3852 VIXL_ASSERT(zt.GetLaneSizeInBytesLog2() >= msize_in_bytes_log2); in SVELd1Helper()
3856 VIXL_ASSERT(zt.GetLaneSizeInBytesLog2() != msize_in_bytes_log2); in SVELd1Helper()
3863 zt, in SVELd1Helper()
3882 SVELdSt1Helper(msize_in_bytes_log2, zt, pg, addr, is_signed, op); in SVELd1Helper()
3886 const ZRegister& zt, in SVELdff1Helper()
3890 VIXL_ASSERT(zt in SVELdff1Helper()
3819 SVELdSt1Helper(unsigned msize_in_bytes_log2, const ZRegister& zt, const PRegister& pg, const SVEMemOperand& addr, bool is_signed, Instr op) SVELdSt1Helper() argument
3847 SVELd1Helper(unsigned msize_in_bytes_log2, const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr, bool is_signed) SVELd1Helper() argument
3885 SVELdff1Helper(unsigned msize_in_bytes_log2, const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr, bool is_signed) SVELdff1Helper() argument
3933 SVEScatterGatherHelper(unsigned msize_in_bytes_log2, const ZRegister& zt, const PRegister& pg, const SVEMemOperand& addr, bool is_load, bool is_signed, bool is_first_fault) SVEScatterGatherHelper() argument
4127 SVELd1BroadcastHelper(unsigned msize_in_bytes_log2, const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr, bool is_signed) SVELd1BroadcastHelper() argument
4156 ld1rb(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) ld1rb() argument
4168 ld1rh(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) ld1rh() argument
4179 ld1rw(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) ld1rw() argument
4187 ld1rd(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) ld1rd() argument
4199 ld1rsb(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) ld1rsb() argument
4210 ld1rsh(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) ld1rsh() argument
4218 ld1rsw(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) ld1rsw() argument
4251 ldff1b(const ZRegister& zt, const PRegisterZ& pg, const Register& xn, const ZRegister& zm) ldff1b() argument
4268 ldff1b(const ZRegister& zt, const PRegisterZ& pg, const ZRegister& zn, int imm5) ldff1b() argument
4287 ldff1d(const ZRegister& zt, const PRegisterZ& pg, const Register& xn, const ZRegister& zm) ldff1d() argument
4301 ldff1d(const ZRegister& zt, const PRegisterZ& pg, const ZRegister& zn, int imm5) ldff1d() argument
4320 ldff1h(const ZRegister& zt, const PRegisterZ& pg, const Register& xn, const ZRegister& zm) ldff1h() argument
4337 ldff1h(const ZRegister& zt, const PRegisterZ& pg, const ZRegister& zn, int imm5) ldff1h() argument
4354 ldff1sb(const ZRegister& zt, const PRegisterZ& pg, const Register& xn, const ZRegister& zm) ldff1sb() argument
4371 ldff1sb(const ZRegister& zt, const PRegisterZ& pg, const ZRegister& zn, int imm5) ldff1sb() argument
4391 ldff1sh(const ZRegister& zt, const PRegisterZ& pg, const Register& xn, const ZRegister& zm) ldff1sh() argument
4408 ldff1sh(const ZRegister& zt, const PRegisterZ& pg, const ZRegister& zn, int imm5) ldff1sh() argument
4428 ldff1sw(const ZRegister& zt, const PRegisterZ& pg, const Register& xn, const ZRegister& zm) ldff1sw() argument
4442 ldff1sw(const ZRegister& zt, const PRegisterZ& pg, const ZRegister& zn, int imm5) ldff1sw() argument
4462 ldff1w(const ZRegister& zt, const PRegisterZ& pg, const Register& xn, const ZRegister& zm) ldff1w() argument
4479 ldff1w(const ZRegister& zt, const PRegisterZ& pg, const ZRegister& zn, int imm5) ldff1w() argument
4746 SVELd1St1ScaImmHelper(const ZRegister& zt, const PRegister& pg, const SVEMemOperand& addr, Instr regoffset_op, Instr immoffset_op, int imm_divisor) SVELd1St1ScaImmHelper() argument
4766 SVELd1VecScaHelper(const ZRegister& zt, const PRegister& pg, const SVEMemOperand& addr, uint32_t msize_bytes_log2, bool is_signed) SVELd1VecScaHelper() argument
4787 SVESt1VecScaHelper(const ZRegister& zt, const PRegister& pg, const SVEMemOperand& addr, uint32_t msize_bytes_log2) SVESt1VecScaHelper() argument
4846 ldnf1b(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) ldnf1b() argument
4862 ldnf1d(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) ldnf1d() argument
4878 ldnf1h(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) ldnf1h() argument
4894 ldnf1sb(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) ldnf1sb() argument
4910 ldnf1sh(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) ldnf1sh() argument
4926 ldnf1sw(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) ldnf1sw() argument
4942 ldnf1w(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) ldnf1w() argument
4958 ldnt1b(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) ldnt1b() argument
4976 ldnt1d(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) ldnt1d() argument
4994 ldnt1h(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) ldnt1h() argument
5012 ldnt1w(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) ldnt1w() argument
5030 ldnt1sb(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) ldnt1sb() argument
5037 ldnt1sh(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) ldnt1sh() argument
5044 ldnt1sw(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) ldnt1sw() argument
5123 SVESt1Helper(unsigned msize_in_bytes_log2, const ZRegister& zt, const PRegister& pg, const SVEMemOperand& addr) SVESt1Helper() argument
5231 stnt1b(const ZRegister& zt, const PRegister& pg, const SVEMemOperand& addr) stnt1b() argument
5249 stnt1d(const ZRegister& zt, const PRegister& pg, const SVEMemOperand& addr) stnt1d() argument
5267 stnt1h(const ZRegister& zt, const PRegister& pg, const SVEMemOperand& addr) stnt1h() argument
5285 stnt1w(const ZRegister& zt, const PRegister& pg, const SVEMemOperand& addr) stnt1w() argument
[all...] |
| H A D | macro-assembler-aarch64.h | 4980 void Ld1b(const ZRegister& zt,
4983 void Ld1h(const ZRegister& zt,
4986 void Ld1w(const ZRegister& zt,
4989 void Ld1d(const ZRegister& zt,
4992 void Ld1rb(const ZRegister& zt, in Ld1rb() argument
4996 SVELoadBroadcastImmHelper(zt, in Ld1rb()
5002 void Ld1rh(const ZRegister& zt, in Ld1rh() argument
5006 SVELoadBroadcastImmHelper(zt, in Ld1rh()
5012 void Ld1rw(const ZRegister& zt, in Ld1rw() argument
5016 SVELoadBroadcastImmHelper(zt, in Ld1rw()
5022 Ld1rd(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ld1rd() argument
5056 Ld1rsb(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ld1rsb() argument
5066 Ld1rsh(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ld1rsh() argument
5076 Ld1rsw(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ld1rsw() argument
5224 Ldff1b(const ZRegister& zt, const PRegisterZ& pg, const Register& xn, const ZRegister& zm) Ldff1b() argument
5232 Ldff1b(const ZRegister& zt, const PRegisterZ& pg, const ZRegister& zn, int imm5) Ldff1b() argument
5240 Ldff1d(const ZRegister& zt, const PRegisterZ& pg, const Register& xn, const ZRegister& zm) Ldff1d() argument
5248 Ldff1d(const ZRegister& zt, const PRegisterZ& pg, const ZRegister& zn, int imm5) Ldff1d() argument
5256 Ldff1h(const ZRegister& zt, const PRegisterZ& pg, const Register& xn, const ZRegister& zm) Ldff1h() argument
5264 Ldff1h(const ZRegister& zt, const PRegisterZ& pg, const ZRegister& zn, int imm5) Ldff1h() argument
5272 Ldff1sb(const ZRegister& zt, const PRegisterZ& pg, const Register& xn, const ZRegister& zm) Ldff1sb() argument
5280 Ldff1sb(const ZRegister& zt, const PRegisterZ& pg, const ZRegister& zn, int imm5) Ldff1sb() argument
5288 Ldff1sh(const ZRegister& zt, const PRegisterZ& pg, const Register& xn, const ZRegister& zm) Ldff1sh() argument
5296 Ldff1sh(const ZRegister& zt, const PRegisterZ& pg, const ZRegister& zn, int imm5) Ldff1sh() argument
5304 Ldff1sw(const ZRegister& zt, const PRegisterZ& pg, const Register& xn, const ZRegister& zm) Ldff1sw() argument
5312 Ldff1sw(const ZRegister& zt, const PRegisterZ& pg, const ZRegister& zn, int imm5) Ldff1sw() argument
5320 Ldff1w(const ZRegister& zt, const PRegisterZ& pg, const Register& xn, const ZRegister& zm) Ldff1w() argument
5328 Ldff1w(const ZRegister& zt, const PRegisterZ& pg, const ZRegister& zn, int imm5) Ldff1w() argument
5336 Ldnf1b(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ldnf1b() argument
5343 Ldnf1d(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ldnf1d() argument
5350 Ldnf1h(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ldnf1h() argument
5357 Ldnf1sb(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ldnf1sb() argument
5364 Ldnf1sh(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ldnf1sh() argument
5371 Ldnf1sw(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ldnf1sw() argument
5378 Ldnf1w(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ldnf1w() argument
6749 Ldnt1sb(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ldnt1sb() argument
6756 Ldnt1sh(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ldnt1sh() argument
6763 Ldnt1sw(const ZRegister& zt, const PRegisterZ& pg, const SVEMemOperand& addr) Ldnt1sw() argument
[all...] |
| H A D | assembler-aarch64.h | 4583 void ld1b(const ZRegister& zt,
4588 void ld1h(const ZRegister& zt,
4593 void ld1w(const ZRegister& zt,
4598 void ld1d(const ZRegister& zt,
4605 void ld1rb(const ZRegister& zt,
4610 void ld1rh(const ZRegister& zt,
4615 void ld1rw(const ZRegister& zt,
4620 void ld1rd(const ZRegister& zt,
4625 void ld1rqb(const ZRegister& zt,
4630 void ld1rqh(const ZRegister& zt,
[all...] |
| H A D | simulator-aarch64.cc | 12094 SimVRegister& zt = ReadVRegister(instr->GetRt()); in Simulator() local
12101 zt.Insert(i, MemRead<uint8_t>(address + i)); in Simulator()
12467 SimVRegister& zt = ReadVRegister(instr->GetRt()); in Simulator() local
12487 ld1(kFormatVnD, zt, i, addr + offset + (i * kDRegSizeInBytes)); in Simulator()
12489 mov_zeroing(vform, zt, pg, zt); in Simulator()
12490 dup_element(vform_dst, zt, zt, 0); in Simulator()
12495 SimVRegister& zt = ReadVRegister(instr->GetRt()); in Simulator() local
12514 ld1(kFormatVnB, zt, in Simulator()
13049 SimVRegister& zt = ReadVRegister(instr->GetRt()); Simulator() local
[all...] |
| H A D | logic-aarch64.cc | 7258 LogicVRegister zt[4] = {
7277 StoreLane(zt[r], unpack_vform, i << unpack_shift, element_address);
7319 LogicVRegister zt[4] = {
7331 zt[r].SetUint(vform, i, 0);
7336 LoadIntToLane(zt[r], vform, msize_in_bytes, i, element_address);
7338 LoadUintToLane(zt[r], vform, msize_in_bytes, i, element_address);
7446 LogicVRegister zt = ReadVRegister(zt_code);
7496 zt.SetInt(vform, i, ExtractSignedBitfield64(msb, 0, value));
7498 zt.SetUint(vform, i, ExtractUnsignedBitfield64(msb, 0, value));
|
| /third_party/skia/third_party/externals/dng_sdk/source/ |
| H A D | dng_date_time.cpp | 694 tm zt; in CurrentDateTimeAndZone() local
701 zt = *gmtime (&sec); in CurrentDateTimeAndZone()
716 int tzHour = t.tm_hour - zt.tm_hour; in CurrentDateTimeAndZone()
717 int tzMin = t.tm_min - zt.tm_min; in CurrentDateTimeAndZone()
719 bool zonePositive = (t.tm_year > zt.tm_year) || in CurrentDateTimeAndZone()
720 (t.tm_year == zt.tm_year && t.tm_yday > zt.tm_yday) || in CurrentDateTimeAndZone()
721 (t.tm_year == zt.tm_year && t.tm_yday == zt.tm_yday && tzHour > 0) || in CurrentDateTimeAndZone()
722 (t.tm_year == zt in CurrentDateTimeAndZone()
[all...] |
| /third_party/python/Lib/test/test_zoneinfo/ |
| H A D | test_zoneinfo.py | 112 for zt in transition_examples:
113 dt = zt.transition
115 new_zt = dataclasses.replace(zt, transition=new_dt)
312 for zt in self.load_transition_examples(key):
313 if zt.fold:
315 elif zt.gap:
325 dt = zt.anomaly_start - timedelta(seconds=1)
326 test_group.append((dt, 0, zt.offset_before))
327 test_group.append((dt, 1, zt.offset_before))
329 dt = zt
[all...] |
| /third_party/libuv/src/unix/ |
| H A D | aix.c | 792 struct timeval zt; in uv_fs_event_start() local
842 memset(&zt, 0, sizeof(zt)); in uv_fs_event_start()
845 rc = select(fd + 1, &pollfd, NULL, NULL, &zt); in uv_fs_event_start()
|
| /third_party/node/deps/uv/src/unix/ |
| H A D | aix.c | 776 struct timeval zt; in uv_fs_event_start() local
826 memset(&zt, 0, sizeof(zt)); in uv_fs_event_start()
829 rc = select(fd + 1, &pollfd, NULL, NULL, &zt); in uv_fs_event_start()
|
| /third_party/vixl/test/aarch64/ |
| H A D | test-assembler-aarch64.cc | 2726 Label zt, zt_end;
2727 __ Cbz(w16, &zt);
2729 __ Bind(&zt);
|
| H A D | test-assembler-sve-aarch64.cc | 8799 typedef void (MacroAssembler::*Ld1Macro)(const ZRegister& zt,
9855 ZRegister zt = z2.WithLaneSize(esize_in_bits);
9900 (masm.*ld1)(zt, pg, SVEMemOperand(x0, zn, mod, shift));
9922 ASSERT_EQUAL_SVE(zt_ref, zt);
|