| /third_party/mesa3d/src/intel/compiler/ |
| H A D | brw_nir_lower_cs_intrinsics.c | 97 size_x = nir_imm_int(b, nir->info.workgroup_size[0]); in lower_cs_intrinsics_convert_block()
98 size_y = nir_imm_int(b, nir->info.workgroup_size[1]); in lower_cs_intrinsics_convert_block()
132 nir->info.workgroup_size[1] % 4 == 0) { in lower_cs_intrinsics_convert_block()
231 size = nir_imm_int(b, nir->info.workgroup_size[0] * in lower_cs_intrinsics_convert_block()
232 nir->info.workgroup_size[1] * in lower_cs_intrinsics_convert_block()
233 nir->info.workgroup_size[2]); in lower_cs_intrinsics_convert_block()
286 assert(nir->info.workgroup_size[0] % 2 == 0); in brw_nir_lower_cs_intrinsics()
287 assert(nir->info.workgroup_size[1] % 2 == 0); in brw_nir_lower_cs_intrinsics()
289 ASSERTED unsigned workgroup_size = in brw_nir_lower_cs_intrinsics() local
290 nir->info.workgroup_size[ in brw_nir_lower_cs_intrinsics()
[all...] |
| H A D | brw_simd_selection.c | 75 const unsigned workgroup_size = prog_data->local_size[0] * in brw_simd_should_compile() local
89 workgroup_size <= (width / 2)) { in brw_simd_should_compile()
92 width, workgroup_size, width / 2); in brw_simd_should_compile()
96 if (DIV_ROUND_UP(workgroup_size, width) > max_threads) { in brw_simd_should_compile()
99 width, workgroup_size, max_threads); in brw_simd_should_compile()
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| H A D | brw_mesh.cpp | 210 prog_data->base.local_size[0] = nir->info.workgroup_size[0]; in brw_compile_task()
211 prog_data->base.local_size[1] = nir->info.workgroup_size[1]; in brw_compile_task()
212 prog_data->base.local_size[2] = nir->info.workgroup_size[2]; in brw_compile_task()
553 const unsigned workgroup_size = nir->info.workgroup_size[0] * in brw_nir_initialize_mue() local
554 nir->info.workgroup_size[1] * in brw_nir_initialize_mue()
555 nir->info.workgroup_size[2]; in brw_nir_initialize_mue()
560 unsigned prims_per_inv = map->max_primitives / workgroup_size; in brw_nir_initialize_mue()
568 /* Zero primitive headers distanced by workgroup_size, starting from in brw_nir_initialize_mue()
573 prim_in_inv * workgroup_size); in brw_nir_initialize_mue()
[all...] |
| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| H A D | si_shaderlib_nir.c | 145 b.shader->info.workgroup_size[0] = 8; in si_create_dcc_retile_cs()
146 b.shader->info.workgroup_size[1] = 8; in si_create_dcc_retile_cs()
147 b.shader->info.workgroup_size[2] = 1; in si_create_dcc_retile_cs()
193 b.shader->info.workgroup_size[0] = 8; in gfx9_create_clear_dcc_msaa_cs()
194 b.shader->info.workgroup_size[1] = 8; in gfx9_create_clear_dcc_msaa_cs()
195 b.shader->info.workgroup_size[2] = 1; in gfx9_create_clear_dcc_msaa_cs()
241 b.shader->info.workgroup_size[0] = 64; in si_create_clear_buffer_rmw_cs()
242 b.shader->info.workgroup_size[1] = 1; in si_create_clear_buffer_rmw_cs()
243 b.shader->info.workgroup_size[2] = 1; in si_create_clear_buffer_rmw_cs()
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| /third_party/mesa3d/src/mesa/main/ |
| H A D | compute.c | 330 info.block[0] = prog->info.workgroup_size[0]; in dispatch_compute()
331 info.block[1] = prog->info.workgroup_size[1]; in dispatch_compute()
332 info.block[2] = prog->info.workgroup_size[2]; in dispatch_compute()
375 info.block[0] = prog->info.workgroup_size[0]; in dispatch_compute_indirect()
376 info.block[1] = prog->info.workgroup_size[1]; in dispatch_compute_indirect()
377 info.block[2] = prog->info.workgroup_size[2]; in dispatch_compute_indirect()
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| /third_party/mesa3d/src/compiler/nir/ |
| H A D | nir_lower_variable_initializers.c | 158 const unsigned local_count = shader->info.workgroup_size[0] * in nir_zero_initialize_shared_memory()
159 shader->info.workgroup_size[1] * in nir_zero_initialize_shared_memory()
160 shader->info.workgroup_size[2]; in nir_zero_initialize_shared_memory()
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| H A D | nir_lower_system_values.c | 368 unsigned size_x = b->shader->info.workgroup_size[0]; in lower_compute_system_value_instr()
438 is_zero |= b->shader->info.workgroup_size[0] == 1 ? 0x1 : 0x0; in lower_compute_system_value_instr()
439 is_zero |= b->shader->info.workgroup_size[1] == 1 ? 0x2 : 0x0; in lower_compute_system_value_instr()
440 is_zero |= b->shader->info.workgroup_size[2] == 1 ? 0x4 : 0x0; in lower_compute_system_value_instr()
497 workgroup_size_const[0].u32 = b->shader->info.workgroup_size[0]; in lower_compute_system_value_instr()
498 workgroup_size_const[1].u32 = b->shader->info.workgroup_size[1]; in lower_compute_system_value_instr()
499 workgroup_size_const[2].u32 = b->shader->info.workgroup_size[2]; in lower_compute_system_value_instr()
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| H A D | nir_opt_uniform_atomics.c | 183 shader->info.workgroup_size[i] > 1) << i; in is_atomic_already_optimized()
330 shader->info.workgroup_size[0] == 1 && shader->info.workgroup_size[1] == 1 && in nir_opt_uniform_atomics()
331 shader->info.workgroup_size[2] == 1) in nir_opt_uniform_atomics()
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| H A D | nir_lower_task_shader.c | 197 const unsigned invocations = b->shader->info.workgroup_size[0] * in emit_shared_to_payload_copy()
198 b->shader->info.workgroup_size[1] * in emit_shared_to_payload_copy()
199 b->shader->info.workgroup_size[2]; in emit_shared_to_payload_copy()
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| H A D | nir_range_analysis.c | 1343 res = (shader->info.workgroup_size[0] * in nir_unsigned_upper_bound()
1344 shader->info.workgroup_size[1] * in nir_unsigned_upper_bound()
1345 shader->info.workgroup_size[2]) - 1u; in nir_unsigned_upper_bound()
1352 res = shader->info.workgroup_size[scalar.comp] - 1u; in nir_unsigned_upper_bound()
1365 res = (shader->info.workgroup_size[scalar.comp] * in nir_unsigned_upper_bound()
1394 uint32_t workgroup_size = config->max_workgroup_invocations; in nir_unsigned_upper_bound() local
1397 workgroup_size = shader->info.workgroup_size[0] * in nir_unsigned_upper_bound()
1398 shader->info.workgroup_size[1] * in nir_unsigned_upper_bound()
1399 shader->info.workgroup_size[ in nir_unsigned_upper_bound()
[all...] |
| /third_party/mesa3d/src/intel/blorp/ |
| H A D | blorp_priv.h | 450 nir->info.workgroup_size[0] = 16 / local_y; in blorp_set_cs_dims()
451 nir->info.workgroup_size[1] = local_y; in blorp_set_cs_dims()
452 nir->info.workgroup_size[2] = 1; in blorp_set_cs_dims()
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| /third_party/mesa3d/src/amd/vulkan/ |
| H A D | radv_meta_fmask_copy.c | 35 b.shader->info.workgroup_size[0] = 8; in build_fmask_copy_compute_shader()
36 b.shader->info.workgroup_size[1] = 8; in build_fmask_copy_compute_shader()
49 nir_imm_ivec3(&b, b.shader->info.workgroup_size[0], b.shader->info.workgroup_size[1], in build_fmask_copy_compute_shader()
50 b.shader->info.workgroup_size[2]); in build_fmask_copy_compute_shader()
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| H A D | radv_meta_bufimage.c | 40 b.shader->info.workgroup_size[0] = 8; in build_nir_itob_compute_shader()
41 b.shader->info.workgroup_size[1] = 8; in build_nir_itob_compute_shader()
216 b.shader->info.workgroup_size[0] = 8; in build_nir_btoi_compute_shader()
217 b.shader->info.workgroup_size[1] = 8; in build_nir_btoi_compute_shader()
391 b.shader->info.workgroup_size[0] = 8; in build_nir_btoi_r32g32b32_compute_shader()
392 b.shader->info.workgroup_size[1] = 8; in build_nir_btoi_r32g32b32_compute_shader()
543 b.shader->info.workgroup_size[0] = 8; in build_nir_itoi_compute_shader()
544 b.shader->info.workgroup_size[1] = 8; in build_nir_itoi_compute_shader()
738 b.shader->info.workgroup_size[0] = 8; in build_nir_itoi_r32g32b32_compute_shader()
739 b.shader->info.workgroup_size[ in build_nir_itoi_r32g32b32_compute_shader()
[all...] |
| H A D | radv_meta_decompress.c | 44 b.shader->info.workgroup_size[0] = 8; in build_expand_depth_stencil_compute_shader()
45 b.shader->info.workgroup_size[1] = 8; in build_expand_depth_stencil_compute_shader()
57 nir_imm_ivec4(&b, b.shader->info.workgroup_size[0], b.shader->info.workgroup_size[1], in build_expand_depth_stencil_compute_shader()
58 b.shader->info.workgroup_size[2], 0); in build_expand_depth_stencil_compute_shader()
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| H A D | radv_meta_buffer.c | 11 b.shader->info.workgroup_size[0] = 64; in build_buffer_fill_shader()
21 b.shader->info.workgroup_size[0]), in build_buffer_fill_shader()
35 b.shader->info.workgroup_size[0] = 64; in build_buffer_copy_shader()
46 b.shader->info.workgroup_size[0]), in build_buffer_copy_shader()
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| /third_party/mesa3d/src/microsoft/clc/ |
| H A D | clc_compiler.c | 1061 memcpy(metadata->local_size, nir->info.workgroup_size, in clc_spirv_to_dxil()
1068 for (unsigned i = 0; i < ARRAY_SIZE(nir->info.workgroup_size); i++) { in clc_spirv_to_dxil()
1070 conf->local_size[i] == nir->info.workgroup_size[i]) in clc_spirv_to_dxil()
1073 if (nir->info.workgroup_size[i] && in clc_spirv_to_dxil()
1074 nir->info.workgroup_size[i] != conf->local_size[i]) { in clc_spirv_to_dxil()
1079 nir->info.workgroup_size[i] = conf->local_size[i]; in clc_spirv_to_dxil()
1081 memcpy(metadata->local_size, nir->info.workgroup_size, in clc_spirv_to_dxil()
1085 for (unsigned i = 0; i < ARRAY_SIZE(nir->info.workgroup_size); i++) { in clc_spirv_to_dxil()
1086 if (nir->info.workgroup_size[i] == 0) in clc_spirv_to_dxil()
1087 nir->info.workgroup_size[ in clc_spirv_to_dxil()
[all...] |
| /third_party/skia/third_party/externals/tint/src/sem/ |
| H A D | function.h | 79 /// @param workgroup_size the new workgroup size of the function
80 void SetWorkgroupSize(sem::WorkgroupSize workgroup_size) { in SetWorkgroupSize() argument
81 workgroup_size_ = std::move(workgroup_size); in SetWorkgroupSize()
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| /third_party/mesa3d/src/amd/common/ |
| H A D | ac_shader_util.c | 767 unsigned workgroup_size = MAX2(es_verts, gs_inst_prims); in ac_compute_esgs_workgroup_size() local
768 return CLAMP(workgroup_size, 1, 256); in ac_compute_esgs_workgroup_size()
787 unsigned workgroup_size = MAX4(max_vtx_in, max_vtx_out, max_prim_in, max_prim_out); in ac_compute_ngg_workgroup_size() local
789 return CLAMP(workgroup_size, 1, 256); in ac_compute_ngg_workgroup_size()
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| /third_party/mesa3d/src/amd/compiler/ |
| H A D | aco_live_var_analysis.cpp | 286 unsigned workgroup_size = in calc_waves_per_workgroup() local
287 program->workgroup_size == UINT_MAX ? program->wave_size : program->workgroup_size; in calc_waves_per_workgroup()
289 return align(workgroup_size, program->wave_size) / program->wave_size; in calc_waves_per_workgroup()
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| H A D | aco_statistics.cpp | 361 is_vector(instr->opcode) && program->workgroup_size > 32; in add()
543 if (program->workgroup_size != UINT_MAX) in collect_preasm_stats()
545 program->workgroup_size / (double)align(program->workgroup_size, program->wave_size); in collect_preasm_stats()
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| /third_party/skia/third_party/externals/tint/src/reader/spirv/ |
| H A D | entry_point_info.cc | 36 workgroup_size(the_wg_size) {} in EntryPointInfo()
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| H A D | entry_point_info.h | 48 /// @param the_wg_size the workgroup_size, for a compute shader
88 GridSize workgroup_size; member
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| /third_party/mesa3d/src/gallium/drivers/d3d12/ |
| H A D | d3d12_compiler.cpp | 744 if (memcmp(expect->cs.workgroup_size, have->cs.workgroup_size, in d3d12_compare_shader_keys()
745 sizeof(have->cs.workgroup_size))) in d3d12_compare_shader_keys()
1049 memcpy(key->cs.workgroup_size, sel_ctx->variable_workgroup_size, sizeof(key->cs.workgroup_size)); in d3d12_fill_shader_key()
1151 new_nir_variant->info.workgroup_size[0] = key.cs.workgroup_size[0]; in select_shader_variant()
1152 new_nir_variant->info.workgroup_size[1] = key.cs.workgroup_size[1]; in select_shader_variant()
1153 new_nir_variant->info.workgroup_size[ in select_shader_variant()
[all...] |
| /third_party/mesa3d/src/panfrost/vulkan/ |
| H A D | panvk_vX_shader.c | 389 shader->local_size.x = nir->info.workgroup_size[0]; in shader_create()
390 shader->local_size.y = nir->info.workgroup_size[1]; in shader_create()
391 shader->local_size.z = nir->info.workgroup_size[2]; in shader_create()
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| /third_party/skia/third_party/externals/spirv-cross/ |
| H A D | spirv_cpp.cpp | 540 impl_type = join("ComputeShader<Impl::Shader, Impl::Shader::Resources, ", execution.workgroup_size.x, ", ", in emit_header()
541 execution.workgroup_size.y, ", ", execution.workgroup_size.z, ">"); in emit_header()
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