/third_party/node/deps/openssl/config/archs/linux-aarch64/asm/crypto/sha/ |
H A D | sha1-armv8.S | 46 ror w27,w20,#27 49 add w24,w24,w27 // e+=rot(a,5) 60 ror w27,w24,#27 63 add w23,w23,w27 // e+=rot(a,5) 71 ror w27,w23,#27 74 add w22,w22,w27 // e+=rot(a,5) 85 ror w27,w22,#27 88 add w21,w21,w27 // e+=rot(a,5) 96 ror w27,w21,#27 99 add w20,w20,w27 // [all...] |
H A D | sha256-armv8.S | 93 ldp w26,w27,[x0,#6*4] 106 add w27,w27,w19 // h+=K[i] 110 add w27,w27,w3 // h+=X[i] 115 add w27,w27,w17 // h+=Ch(e,f,g) 117 add w27,w27,w16 // h+=Sigma1(e) 119 add w23,w23,w27 // [all...] |
/third_party/node/deps/openssl/config/archs/darwin64-arm64-cc/asm/crypto/sha/ |
H A D | sha1-armv8.S | 46 ror w27,w20,#27 49 add w24,w24,w27 // e+=rot(a,5) 60 ror w27,w24,#27 63 add w23,w23,w27 // e+=rot(a,5) 71 ror w27,w23,#27 74 add w22,w22,w27 // e+=rot(a,5) 85 ror w27,w22,#27 88 add w21,w21,w27 // e+=rot(a,5) 96 ror w27,w21,#27 99 add w20,w20,w27 // [all...] |
H A D | sha256-armv8.S | 93 ldp w26,w27,[x0,#6*4] 106 add w27,w27,w19 // h+=K[i] 110 add w27,w27,w3 // h+=X[i] 115 add w27,w27,w17 // h+=Ch(e,f,g) 117 add w27,w27,w16 // h+=Sigma1(e) 119 add w23,w23,w27 // [all...] |
/third_party/node/deps/openssl/config/archs/darwin64-arm64-cc/asm_avx2/crypto/sha/ |
H A D | sha1-armv8.S | 46 ror w27,w20,#27 49 add w24,w24,w27 // e+=rot(a,5) 60 ror w27,w24,#27 63 add w23,w23,w27 // e+=rot(a,5) 71 ror w27,w23,#27 74 add w22,w22,w27 // e+=rot(a,5) 85 ror w27,w22,#27 88 add w21,w21,w27 // e+=rot(a,5) 96 ror w27,w21,#27 99 add w20,w20,w27 // [all...] |
H A D | sha256-armv8.S | 93 ldp w26,w27,[x0,#6*4] 106 add w27,w27,w19 // h+=K[i] 110 add w27,w27,w3 // h+=X[i] 115 add w27,w27,w17 // h+=Ch(e,f,g) 117 add w27,w27,w16 // h+=Sigma1(e) 119 add w23,w23,w27 // [all...] |
/third_party/node/deps/openssl/config/archs/linux-aarch64/asm_avx2/crypto/sha/ |
H A D | sha1-armv8.S | 46 ror w27,w20,#27 49 add w24,w24,w27 // e+=rot(a,5) 60 ror w27,w24,#27 63 add w23,w23,w27 // e+=rot(a,5) 71 ror w27,w23,#27 74 add w22,w22,w27 // e+=rot(a,5) 85 ror w27,w22,#27 88 add w21,w21,w27 // e+=rot(a,5) 96 ror w27,w21,#27 99 add w20,w20,w27 // [all...] |
H A D | sha256-armv8.S | 93 ldp w26,w27,[x0,#6*4] 106 add w27,w27,w19 // h+=K[i] 110 add w27,w27,w3 // h+=X[i] 115 add w27,w27,w17 // h+=Ch(e,f,g) 117 add w27,w27,w16 // h+=Sigma1(e) 119 add w23,w23,w27 // [all...] |
/third_party/node/deps/v8/src/codegen/loong64/ |
H A D | register-loong64.h | 38 V(w24) V(w25) V(w26) V(w27) V(w28) V(w29) V(w30) V(w31)
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/third_party/node/deps/v8/src/regexp/arm64/ |
H A D | regexp-macro-assembler-arm64.h | 181 static constexpr Register start_offset() { return w27; } in start_offset()
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/third_party/vixl/test/aarch64/ |
H A D | test-disasm-aarch64.cc | 641 COMPARE(crc32ch(w6, w17, w27), "crc32ch w6, w17, w27"); in TEST() 771 COMPARE(bics(w27, w28, Operand(0xfffffff7)), "ands w27, w28, #0x8"); in TEST() 815 COMPARE(bic(w27, w28, Operand(w29, ROR, 8)), "bic w27, w28, w29, ror #8"); in TEST() 827 COMPARE(orn(w27, w28, Operand(w29, ROR, 16)), "orn w27, w28, w29, ror #16"); in TEST() 839 COMPARE(eon(w27, w28, Operand(w29, ROR, 24)), "eon w27, w2 in TEST() [all...] |
H A D | test-assembler-aarch64.cc | 4866 __ Sub(w27, w3, Operand(1)); 4890 ASSERT_EQUAL_32(0xffffffff, w27); 5015 __ Add(w27, w2, Operand(w1, SXTW, 3)); 5046 ASSERT_EQUAL_32(0xc3b2a188, w27); 5655 __ Adc(w27, w2, Operand(w3, ROR, 8)); 5683 ASSERT_EQUAL_32(0x9a222221 + 1, w27); 6139 __ Cmp(w27, Operand(w22, ROR, 28)); 6577 __ Lsl(w27, w0, w6); 6595 ASSERT_EQUAL_32(value << (shift[5] & 31), w27); 6633 __ Lsr(w27, w [all...] |
H A D | test-trace-aarch64.cc | 64 __ and_(w27, w28, w29); in GenerateTestSequenceBase() 74 __ bic(w25, w26, w27); in GenerateTestSequenceBase() 114 __ crc32cw(w26, w27, w28); in GenerateTestSequenceBase() 148 __ extr(w25, w26, w27, 9); in GenerateTestSequenceBase() 224 __ ldxr(w27, MemOperand(x0)); in GenerateTestSequenceBase() 238 __ madd(w25, w26, w27, w28); in GenerateTestSequenceBase() 278 __ rorv(w26, w27, w28); in GenerateTestSequenceBase() 288 __ sdiv(w26, w27, w28); in GenerateTestSequenceBase() 606 __ ucvtf(d30, w27); in GenerateTestSequenceFP()
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H A D | test-assembler-fp-aarch64.cc | 1970 ASSERT_EQUAL_32(CVFlag, w27); in TEST()
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/third_party/node/deps/v8/src/codegen/mips64/ |
H A D | register-mips64.h | 44 V(w24) V(w25) V(w26) V(w27) V(w28) V(w29) V(w30) V(w31)
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/third_party/node/deps/v8/src/codegen/mips/ |
H A D | register-mips.h | 44 V(w24) V(w25) V(w26) V(w27) V(w28) V(w29) V(w30) V(w31)
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/third_party/node/deps/openssl/config/archs/linux-aarch64/asm/crypto/chacha/ |
H A D | chacha-armv8.S | 71 mov w15,w27 190 add w15,w15,w27 371 mov w15,w27 640 add w15,w15,w27 965 mov w15,w27 1394 add w15,w15,w27 1449 mov w15,w27 1878 add w15,w15,w27
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/third_party/node/deps/openssl/config/archs/darwin64-arm64-cc/asm/crypto/chacha/ |
H A D | chacha-armv8.S | 71 mov w15,w27 190 add w15,w15,w27 371 mov w15,w27 640 add w15,w15,w27 965 mov w15,w27 1394 add w15,w15,w27 1449 mov w15,w27 1878 add w15,w15,w27
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/third_party/node/deps/openssl/config/archs/darwin64-arm64-cc/asm_avx2/crypto/chacha/ |
H A D | chacha-armv8.S | 71 mov w15,w27 190 add w15,w15,w27 371 mov w15,w27 640 add w15,w15,w27 965 mov w15,w27 1394 add w15,w15,w27 1449 mov w15,w27 1878 add w15,w15,w27
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/third_party/node/deps/openssl/config/archs/linux-aarch64/asm_avx2/crypto/chacha/ |
H A D | chacha-armv8.S | 71 mov w15,w27 190 add w15,w15,w27 371 mov w15,w27 640 add w15,w15,w27 965 mov w15,w27 1394 add w15,w15,w27 1449 mov w15,w27 1878 add w15,w15,w27
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/third_party/node/deps/v8/src/execution/mips64/ |
H A D | simulator-mips64.h | 225 w27, enumerator
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/third_party/node/deps/v8/src/execution/mips/ |
H A D | simulator-mips.h | 225 w27, enumerator
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/third_party/lzma/Asm/arm64/ |
H A D | LzmaDecOpt.S | 184 #define checkDicSize w27
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/third_party/libwebsockets/minimal-examples/api-tests/api-test-lecp/ |
H A D | main.c | 4478 w27[] = { 0xFB, 0x3F, 0xF1, 0xF7, 0xCE, 0xD9, 0x16, 0x87, 0x2B }, variable 4970 ctx.used != sizeof(w27) || memcmp(w27, buf, ctx.used)) { in main()
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