Searched refs:vtx_base_sgpr (Results 1 - 4 of 4) sorted by relevance
| /third_party/mesa3d/src/amd/vulkan/ |
| H A D | radv_device_generated_commands.c | 122 uint16_t vtx_base_sgpr; member
126 uint16_t vtx_base_sgpr; member
144 uint16_t vtx_base_sgpr; member
241 dgc_emit_userdata_vertex(nir_builder *b, struct dgc_cmdbuf *cs, nir_ssa_def *vtx_base_sgpr, in dgc_emit_userdata_vertex() argument
244 vtx_base_sgpr = nir_u2u32(b, vtx_base_sgpr); in dgc_emit_userdata_vertex()
246 nir_test_mask(b, vtx_base_sgpr, DGC_USES_DRAWID); in dgc_emit_userdata_vertex()
248 nir_test_mask(b, vtx_base_sgpr, DGC_USES_BASEINSTANCE); in dgc_emit_userdata_vertex()
255 nir_pkt3(b, PKT3_SET_SH_REG, pkt_cnt), nir_iand_imm(b, vtx_base_sgpr, 0x3FFF), first_vertex, in dgc_emit_userdata_vertex()
780 nir_ssa_def *vtx_base_sgpr in build_dgc_prepare_shader() local
863 nir_ssa_def *vtx_base_sgpr = load_param16(&b, vtx_base_sgpr); build_dgc_prepare_shader() local
1172 uint16_t vtx_base_sgpr = radv_prepare_dgc() local
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| H A D | radv_cmd_buffer.c | 5567 cmd_buffer->state.graphics_pipeline->vtx_base_sgpr != graphics_pipeline->vtx_base_sgpr; in radv_CmdBindPipeline()
6688 uint32_t base_reg = cmd_buffer->state.graphics_pipeline->vtx_base_sgpr; in radv_cs_emit_indirect_draw_packet()
6824 uint32_t base_reg = cmd_buffer->state.graphics_pipeline->vtx_base_sgpr; in radv_cs_emit_dispatch_taskmesh_gfx_packet()
6843 radeon_set_sh_reg_seq(cs, state->graphics_pipeline->vtx_base_sgpr, state->graphics_pipeline->vtx_emit_num); in radv_emit_userdata_vertex_internal()
6882 radeon_set_sh_reg_seq(cs, state->graphics_pipeline->vtx_base_sgpr, 1 + !!drawid); in radv_emit_userdata_vertex_drawid()
6899 radeon_set_sh_reg_seq(cs, state->graphics_pipeline->vtx_base_sgpr, state->graphics_pipeline->vtx_emit_num); in radv_emit_userdata_mesh()
6919 radeon_set_sh_reg_seq(cs, pipeline->vtx_base_sgpr, 1); in radv_emit_userdata_mesh_first_task_0_draw_id_0()
6923 radeon_set_sh_reg_seq(cs, pipeline->vtx_base_sgpr + (pipeline->vtx_emit_num - 1) * 4, 1); in radv_emit_userdata_mesh_first_task_0_draw_id_0()
7010 radeon_set_sh_reg(cs, state->graphics_pipeline->vtx_base_sgpr in radv_emit_draw_packets_indexed()
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| H A D | radv_private.h | 2149 uint32_t vtx_base_sgpr;
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| H A D | radv_pipeline.c | 6820 pipeline->vtx_base_sgpr = pipeline->base.user_data_0[first_stage]; in radv_pipeline_init_shader_stages_state()
6821 pipeline->vtx_base_sgpr += loc->sgpr_idx * 4; in radv_pipeline_init_shader_stages_state()
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