| /third_party/node/deps/v8/src/diagnostics/arm/ |
| H A D | disasm-arm.cc | 2324 Format(instr, "vrsqrte.f32 'Qd, 'Qm"); in DecodeAdvancedSIMDTwoOrThreeRegisters()
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| /third_party/vixl/src/aarch32/ |
| H A D | assembler-aarch32.h | 5659 void vrsqrte(Condition cond, DataType dt, DRegister rd, DRegister rm);
5660 void vrsqrte(DataType dt, DRegister rd, DRegister rm) { in vrsqrte() function in vixl::aarch32::Assembler
5661 vrsqrte(al, dt, rd, rm); in vrsqrte()
5664 void vrsqrte(Condition cond, DataType dt, QRegister rd, QRegister rm);
5665 void vrsqrte(DataType dt, QRegister rd, QRegister rm) { in vrsqrte() function in vixl::aarch32::Assembler
5666 vrsqrte(al, dt, rd, rm); in vrsqrte()
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| H A D | disasm-aarch32.h | 2401 void vrsqrte(Condition cond, DataType dt, DRegister rd, DRegister rm);
2403 void vrsqrte(Condition cond, DataType dt, QRegister rd, QRegister rm);
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| H A D | assembler-aarch32.cc | 24987 void Assembler::vrsqrte(Condition cond, in vrsqrte() function in vixl::aarch32::Assembler
25016 Delegate(kVrsqrte, &Assembler::vrsqrte, cond, dt, rd, rm); in vrsqrte()
25019 void Assembler::vrsqrte(Condition cond, in vrsqrte() function in vixl::aarch32::Assembler
25048 Delegate(kVrsqrte, &Assembler::vrsqrte, cond, dt, rd, rm); in vrsqrte()
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| H A D | disasm-aarch32.cc | 6351 void Disassembler::vrsqrte(Condition cond, in vrsqrte() function in vixl::aarch32::Disassembler
6360 void Disassembler::vrsqrte(Condition cond, in vrsqrte() function in vixl::aarch32::Disassembler
[all...] |
| H A D | macro-assembler-aarch32.h | 11583 vrsqrte(cond, dt, rd, rm); in MacroAssembler()
11600 vrsqrte(cond, dt, rd, rm); in MacroAssembler()
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| /third_party/node/deps/v8/src/codegen/arm/ |
| H A D | assembler-arm.h | 950 // vrecpe and vrsqrte only support floating point lanes.
952 void vrsqrte(QwNeonRegister dst, QwNeonRegister src);
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| H A D | assembler-arm.cc | 4743 void Assembler::vrsqrte(QwNeonRegister dst, QwNeonRegister src) { in vrsqrte() function in v8::internal::Assembler
4745 // Qd = vrsqrte(Qm) SIMD reciprocal square root estimate. in vrsqrte()
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| /third_party/node/deps/v8/src/compiler/backend/arm/ |
| H A D | code-generator-arm.cc | 2214 __ vrsqrte(i.OutputSimd128Register(), i.InputSimd128Register(0)); in AssembleArchInstruction()
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