| /third_party/ffmpeg/libavcodec/arm/ |
| H A D | vp3dsp_neon.S | 47 vqsub.u16 q2, q15, q1
48 vqsub.u16 q3, q2, q1
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| H A D | vp8dsp_neon.S | 331 vqsub.s8 q12, q2, q5 @ clamp(PS1-QS1)
369 vqsub.s8 q4, q4, q11 @ QS0 = clamp(QS0-c1)
384 vqsub.s8 q4, q4, q11 @ QS0 = clamp(QS0-c1)
390 vqsub.s8 q5, q5, q11 @ QS1 = clamp(QS1-c3)
401 vqsub.s8 q4, q4, q11 @ QS0 = clamp(QS0-c1)
432 vqsub.s8 q6, q6, q8 @ QS2 = clamp(QS2-a)
434 vqsub.s8 q5, q5, q11 @ QS1 = clamp(QS1-a)
436 vqsub.s8 q4, q4, q14 @ QS0 = clamp(QS0-a)
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| H A D | h264dsp_neon.S | 72 vqsub.u8 q11, q9, q12
75 vqsub.u8 q11, q1, q12
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| /third_party/node/deps/v8/src/diagnostics/arm/ |
| H A D | disasm-arm.cc | 2056 Format(instr, "vqsub.s'size3 'Qd, 'Qn, 'Qm"); in DecodeAdvancedSIMDDataProcessing()
2106 Format(instr, "vqsub.u'size3 'Qd, 'Qn, 'Qm"); in DecodeAdvancedSIMDDataProcessing()
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| /third_party/node/deps/v8/src/compiler/backend/arm/ |
| H A D | code-generator-arm.cc | 2569 __ vqsub(NeonS16, i.OutputSimd128Register(), i.InputSimd128Register(0), in AssembleArchInstruction()
2633 __ vqsub(NeonU16, i.OutputSimd128Register(), i.InputSimd128Register(0), in AssembleArchInstruction()
2740 __ vqsub(NeonS8, i.OutputSimd128Register(), i.InputSimd128Register(0), in AssembleArchInstruction()
2788 __ vqsub(NeonU8, i.OutputSimd128Register(), i.InputSimd128Register(0), in AssembleArchInstruction()
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| /third_party/vixl/src/aarch32/ |
| H A D | assembler-aarch32.h | 5477 void vqsub(
5479 void vqsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vqsub() function in vixl::aarch32::Assembler
5480 vqsub(al, dt, rd, rn, rm); in vqsub()
5483 void vqsub(
5485 void vqsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vqsub() function in vixl::aarch32::Assembler
5486 vqsub(al, dt, rd, rn, rm); in vqsub()
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| H A D | disasm-aarch32.h | 2300 void vqsub(
2303 void vqsub(
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| H A D | assembler-aarch32.cc | 23779 void Assembler::vqsub( in vqsub() function in vixl::aarch32::Assembler
23806 Delegate(kVqsub, &Assembler::vqsub, cond, dt, rd, rn, rm); in vqsub()
23809 void Assembler::vqsub( in vqsub() function in vixl::aarch32::Assembler
23836 Delegate(kVqsub, &Assembler::vqsub, cond, dt, rd, rn, rm); in vqsub()
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| H A D | disasm-aarch32.cc | 6022 void Disassembler::vqsub( in vqsub() function in vixl::aarch32::Disassembler
6033 void Disassembler::vqsub( in vqsub() function in vixl::aarch32::Disassembler
[all...] |
| H A D | macro-assembler-aarch32.h | 10981 vqsub(cond, dt, rd, rn, rm); in MacroAssembler()
11000 vqsub(cond, dt, rd, rn, rm); in MacroAssembler()
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| /third_party/node/deps/v8/src/codegen/arm/ |
| H A D | macro-assembler-arm.cc | 2694 vqsub(NeonS64, dst, src2, src1); in CallRecordWriteStub()
2701 vqsub(NeonS64, dst, src1, src2); in CallRecordWriteStub()
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| H A D | assembler-arm.h | 903 void vqsub(NeonDataType dt, QwNeonRegister dst, QwNeonRegister src1,
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| H A D | assembler-arm.cc | 4508 void Assembler::vqsub(NeonDataType dt, QwNeonRegister dst, QwNeonRegister src1, in vqsub() function in v8::internal::Assembler
4511 // Qd = vqsub(Qn, Qm) SIMD integer saturating subtraction. in vqsub()
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| /third_party/node/deps/v8/src/wasm/baseline/arm/ |
| H A D | liftoff-assembler-arm.h | 3322 vqsub(NeonS16, liftoff::GetSimd128Register(dst),
3329 vqsub(NeonU16, liftoff::GetSimd128Register(dst),
3637 vqsub(NeonS8, liftoff::GetSimd128Register(dst),
3644 vqsub(NeonU8, liftoff::GetSimd128Register(dst),
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