| /third_party/ffmpeg/libavcodec/arm/ |
| H A D | idctdsp_neon.S | 51 vqmovn.s16 d0, q8
53 vqmovn.s16 d1, q9
55 vqmovn.s16 d2, q8
63 vqmovn.s16 d3, q9
65 vqmovn.s16 d4, q10
67 vqmovn.s16 d5, q11
74 vqmovn.s16 d6, q12
76 vqmovn.s16 d7, q13
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| H A D | vp9lpf_neon.S | 92 vqmovn.s16 d10, q5 @ av_clip_int8p(p1 - q1)
93 vqmovn.s16 d11, q6 @ av_clip_int8p(p1 - q1)
109 vqmovn.s16 d12, q6
110 vqmovn.s16 d13, q7 @ av_clip_int8(3 * (q0 - p0) [+ av_clip_int8(p1 - q1)], BIT_DEPTH - 1) = f
249 vqmovn.s16 \tmp1, \tmpq1 @ av_clip_int8(p1 - q1)
265 vqmovn.s16 \tmp1, \tmpq2 @ f
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| H A D | vp8dsp_neon.S | 339 vqmovn.s16 d20, q10 @ narrow result back into q10
340 vqmovn.s16 d21, q11
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| /third_party/ffmpeg/libswscale/arm/ |
| H A D | output.S | 70 vqmovn.u16 d6, q3 @ merge part 1 and part 2
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| /third_party/node/deps/v8/src/compiler/backend/arm/ |
| H A D | code-generator-arm.cc | 452 __ vqmovn(dt, sdt, dst.low(), src0); \
455 __ vqmovn(dt, sdt, dst.low(), src0); \
456 __ vqmovn(dt, sdt, dst.high(), src1); \
458 __ vqmovn(dt, sdt, dst.high(), src1); \
459 __ vqmovn(dt, sdt, dst.low(), src0); \
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| /third_party/node/deps/v8/src/diagnostics/arm/ |
| H A D | disasm-arm.cc | 2308 const char* name = op == 0b01 ? "vqmovun" : "vqmovn"; in DecodeAdvancedSIMDTwoOrThreeRegisters()
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| /third_party/node/deps/v8/src/wasm/baseline/arm/ |
| H A D | liftoff-assembler-arm.h | 262 assm->vqmovn(dt, sdt, dst.low_fp(), liftoff::GetSimd128Register(lhs)); in S128NarrowOp()
263 assm->vqmovn(dt, sdt, dst.high_fp(), liftoff::GetSimd128Register(rhs)); in S128NarrowOp()
265 assm->vqmovn(dt, sdt, dst.high_fp(), liftoff::GetSimd128Register(rhs)); in S128NarrowOp()
266 assm->vqmovn(dt, sdt, dst.low_fp(), liftoff::GetSimd128Register(lhs)); in S128NarrowOp()
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| /third_party/node/deps/v8/src/codegen/arm/ |
| H A D | assembler-arm.h | 861 void vqmovn(NeonDataType dst_dt, NeonDataType src_dt, DwVfpRegister dst,
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| H A D | assembler-arm.cc | 3848 void Assembler::vqmovn(NeonDataType dst_dt, NeonDataType src_dt, in vqmovn() function in v8::internal::Assembler
3851 // vqmovn.<type><size> Dd, Qm. ARM vector narrowing move with saturation. in vqmovn()
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| /third_party/vixl/src/aarch32/ |
| H A D | assembler-aarch32.h | 5329 void vqmovn(Condition cond, DataType dt, DRegister rd, QRegister rm);
5330 void vqmovn(DataType dt, DRegister rd, QRegister rm) { in vqmovn() function in vixl::aarch32::Assembler
5331 vqmovn(al, dt, rd, rm); in vqmovn()
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| H A D | disasm-aarch32.h | 2220 void vqmovn(Condition cond, DataType dt, DRegister rd, QRegister rm);
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| H A D | assembler-aarch32.cc | 23011 void Assembler::vqmovn(Condition cond, in vqmovn() function in vixl::aarch32::Assembler
23040 Delegate(kVqmovn, &Assembler::vqmovn, cond, dt, rd, rm); in vqmovn()
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| H A D | disasm-aarch32.cc | 5824 void Disassembler::vqmovn(Condition cond, in vqmovn() function in vixl::aarch32::Disassembler
[all...] |
| H A D | macro-assembler-aarch32.h | 10601 vqmovn(cond, dt, rd, rm); in MacroAssembler()
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